iwl3945: add apm ops
The patch adds 3945 iwl_lib_ops->apm_ops to the driver. Signed-off-by: Abhijeet Kolekar <abhijeet.kolekar@intel.com> Signed-off-by: Zhu Yi <yi.zhu@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Kolekar, Abhijeet
John W. Linville
parent
0164b9b45d
commit
01ec616d8c
2 changed files with 88 additions and 53 deletions
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@ -1077,50 +1077,54 @@ static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
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return rc;
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}
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int iwl3945_hw_nic_init(struct iwl_priv *priv)
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static int iwl3945_apm_init(struct iwl_priv *priv)
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{
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u8 rev_id;
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int rc;
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unsigned long flags;
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struct iwl_rx_queue *rxq = &priv->rxq;
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int ret = 0;
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iwl3945_power_init_handle(priv);
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spin_lock_irqsave(&priv->lock, flags);
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iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR39_ANA_PLL_CFG_VAL);
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iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
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CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
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CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
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/* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
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iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
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CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
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/* set "initialization complete" bit to move adapter
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* D0U* --> D0A* state */
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iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
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rc = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
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if (rc < 0) {
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spin_unlock_irqrestore(&priv->lock, flags);
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iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
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if (ret < 0) {
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IWL_DEBUG_INFO("Failed to init the card\n");
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return rc;
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goto out;
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}
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rc = iwl_grab_nic_access(priv);
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if (rc) {
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spin_unlock_irqrestore(&priv->lock, flags);
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return rc;
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}
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iwl_write_prph(priv, APMG_CLK_EN_REG,
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APMG_CLK_VAL_DMA_CLK_RQT |
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APMG_CLK_VAL_BSM_CLK_RQT);
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ret = iwl_grab_nic_access(priv);
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if (ret)
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goto out;
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/* enable DMA */
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iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
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APMG_CLK_VAL_BSM_CLK_RQT);
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udelay(20);
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/* disable L1-Active */
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iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
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APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
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APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
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iwl_release_nic_access(priv);
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spin_unlock_irqrestore(&priv->lock, flags);
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out:
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return ret;
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}
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/* Determine HW type */
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rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
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if (rc)
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return rc;
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IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
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static void iwl3945_nic_config(struct iwl_priv *priv)
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{
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unsigned long flags;
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u8 rev_id = 0;
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iwl3945_nic_set_pwr_src(priv, 1);
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spin_lock_irqsave(&priv->lock, flags);
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if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
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@ -1172,6 +1176,27 @@ int iwl3945_hw_nic_init(struct iwl_priv *priv)
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if (priv->eeprom39.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
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IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
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}
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int iwl3945_hw_nic_init(struct iwl_priv *priv)
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{
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u8 rev_id;
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int rc;
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unsigned long flags;
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struct iwl_rx_queue *rxq = &priv->rxq;
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spin_lock_irqsave(&priv->lock, flags);
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priv->cfg->ops->lib->apm_ops.init(priv);
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spin_unlock_irqrestore(&priv->lock, flags);
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/* Determine HW type */
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rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
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if (rc)
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return rc;
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IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
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iwl3945_nic_set_pwr_src(priv, 1);
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priv->cfg->ops->lib->apm_ops.config(priv);
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/* Allocate the RX queue, or reset if it is already allocated */
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if (!rxq->bd) {
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@ -1256,10 +1281,9 @@ void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv)
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iwl3945_hw_txq_ctx_free(priv);
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}
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int iwl3945_hw_nic_stop_master(struct iwl_priv *priv)
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static int iwl3945_apm_stop_master(struct iwl_priv *priv)
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{
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int rc = 0;
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u32 reg_val;
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int ret = 0;
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unsigned long flags;
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spin_lock_irqsave(&priv->lock, flags);
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@ -1267,33 +1291,41 @@ int iwl3945_hw_nic_stop_master(struct iwl_priv *priv)
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/* set stop master bit */
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iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
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reg_val = iwl_read32(priv, CSR_GP_CNTRL);
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iwl_poll_direct_bit(priv, CSR_RESET,
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CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
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if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
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(reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
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IWL_DEBUG_INFO("Card in power save, master is already "
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"stopped\n");
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else {
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rc = iwl_poll_direct_bit(priv, CSR_RESET,
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CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
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if (rc < 0) {
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spin_unlock_irqrestore(&priv->lock, flags);
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return rc;
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}
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}
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if (ret < 0)
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goto out;
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out:
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spin_unlock_irqrestore(&priv->lock, flags);
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IWL_DEBUG_INFO("stop master\n");
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return rc;
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return ret;
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}
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int iwl3945_hw_nic_reset(struct iwl_priv *priv)
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static void iwl3945_apm_stop(struct iwl_priv *priv)
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{
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unsigned long flags;
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iwl3945_apm_stop_master(priv);
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spin_lock_irqsave(&priv->lock, flags);
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iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
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udelay(10);
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/* clear "init complete" move adapter D0A* --> D0U state */
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iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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int iwl3945_apm_reset(struct iwl_priv *priv)
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{
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int rc;
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unsigned long flags;
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iwl3945_hw_nic_stop_master(priv);
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iwl3945_apm_stop_master(priv);
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spin_lock_irqsave(&priv->lock, flags);
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@ -2657,6 +2689,12 @@ static int iwl3945_load_bsm(struct iwl_priv *priv)
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static struct iwl_lib_ops iwl3945_lib = {
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.load_ucode = iwl3945_load_bsm,
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.apm_ops = {
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.init = iwl3945_apm_init,
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.reset = iwl3945_apm_reset,
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.stop = iwl3945_apm_stop,
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.config = iwl3945_nic_config,
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},
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};
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static struct iwl_ops iwl3945_ops = {
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@ -5468,10 +5468,7 @@ static void __iwl3945_down(struct iwl_priv *priv)
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udelay(5);
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iwl3945_hw_nic_stop_master(priv);
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iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
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iwl3945_hw_nic_reset(priv);
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priv->cfg->ops->lib->apm_ops.reset(priv);
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exit:
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memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
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@ -7541,7 +7538,7 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
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err = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
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if (err < 0) {
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IWL_DEBUG_INFO("Failed to init the card\n");
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IWL_DEBUG_INFO("Failed to init the APMG\n");
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goto out_remove_sysfs;
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}
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