sparc32,leon: operate on boot-cpu IRQ controller registers
* proper initialization of boot_cpu_id (no hardcoding to 0) * use boot_cpu_id index to address into the IRQ controller where appropriate Each CPU has a separate set of IRQ controller registers, this patch makes sure that the boot-cpu registers are used instead of CPU0's. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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3 changed files with 24 additions and 28 deletions
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@ -810,27 +810,24 @@ found_version:
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got_prop:
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#ifdef CONFIG_SPARC_LEON
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/* no cpu-type check is needed, it is a SPARC-LEON */
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sethi %hi(boot_cpu_id), %g2 ! boot-cpu index
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#ifdef CONFIG_SMP
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ba leon_smp_init
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nop
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.global leon_smp_init
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leon_smp_init:
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/* let boot_cpu_id default to 0 (master always 0) */
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rd %asr17,%g1
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srl %g1,28,%g1
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cmp %g0,%g1
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beq sun4c_continue_boot !continue with master
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nop
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ba leon_smp_cpu_startup
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nop
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#else
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ba sun4c_continue_boot
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ldub [%g2 + %lo(boot_cpu_id)], %g1
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cmp %g1, 0xff ! unset means first CPU
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bne leon_smp_cpu_startup ! continue only with master
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nop
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#endif
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/* Get CPU-ID from most significant 4-bit of ASR17 */
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rd %asr17, %g1
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srl %g1, 28, %g1
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/* Update boot_cpu_id only on boot cpu */
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stub %g1, [%g2 + %lo(boot_cpu_id)]
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ba sun4c_continue_boot
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nop
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#endif
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set cputypval, %o2
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ldub [%o2 + 0x4], %l1
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@ -20,6 +20,7 @@
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#include <asm/traps.h>
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#include <asm/cacheflush.h>
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#include <asm/smp.h>
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#include <asm/setup.h>
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#include "prom.h"
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#include "irq.h"
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@ -53,7 +54,7 @@ static inline unsigned int leon_eirq_get(int cpu)
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static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc)
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{
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unsigned int eirq;
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int cpu = hard_smp_processor_id();
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int cpu = sparc_leon3_cpuid();
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eirq = leon_eirq_get(cpu);
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if ((eirq & 0x10) && irq_map[eirq]->irq) /* bit4 tells if IRQ happened */
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@ -79,8 +80,8 @@ void leon_eirq_setup(unsigned int eirq)
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*/
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irq_link(veirq);
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mask = 1 << eirq;
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oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(0));
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LEON3_BYPASS_STORE_PA(LEON_IMASK(0), (oldmask | mask));
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oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(boot_cpu_id));
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LEON3_BYPASS_STORE_PA(LEON_IMASK(boot_cpu_id), (oldmask | mask));
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sparc_leon_eirq = eirq;
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}
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@ -106,12 +107,12 @@ static int irq_choose_cpu(const struct cpumask *affinity)
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cpus_and(mask, cpu_online_map, *affinity);
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if (cpus_equal(mask, cpu_online_map) || cpus_empty(mask))
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return 0;
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return boot_cpu_id;
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else
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return first_cpu(mask);
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}
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#else
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#define irq_choose_cpu(affinity) 0
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#define irq_choose_cpu(affinity) boot_cpu_id
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#endif
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static int leon_set_affinity(struct irq_data *data, const struct cpumask *dest,
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@ -241,7 +242,7 @@ void __init leon_init_timers(irq_handler_t counter_fn)
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struct device_node *rootnp, *np, *nnp;
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struct property *pp;
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int len;
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int cpu, icsel;
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int icsel;
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int ampopts;
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int err;
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@ -340,9 +341,8 @@ void __init leon_init_timers(irq_handler_t counter_fn)
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* accessed anyway.
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* In AMP systems, Linux must run on CPU0 for the time being.
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*/
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cpu = sparc_leon3_cpuid();
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icsel = LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->icsel[cpu/8]);
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icsel = (icsel >> ((7 - (cpu&0x7)) * 4)) & 0xf;
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icsel = LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->icsel[boot_cpu_id/8]);
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icsel = (icsel >> ((7 - (boot_cpu_id&0x7)) * 4)) & 0xf;
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leon3_irqctrl_regs += icsel;
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/* Probe extended IRQ controller */
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@ -50,7 +50,6 @@
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extern ctxd_t *srmmu_ctx_table_phys;
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static int smp_processors_ready;
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extern volatile unsigned long cpu_callin_map[NR_CPUS];
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extern unsigned char boot_cpu_id;
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extern cpumask_t smp_commenced_mask;
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void __init leon_configure_cache_smp(void);
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