ARM: S5PC100: GPIO and I2C
S5PC100 has more GPIO group then previous one. It has 34 groups of GPIO, while S3C6410 has 17 groups. For now, only header files are written. Signed-off-by: Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: subject fixup] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Byungho Min
Ben Dooks
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8acd1ade2e
commit
0164cbf439
4 changed files with 217 additions and 0 deletions
21
arch/arm/mach-s5pc100/include/mach/gpio-core.h
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arch/arm/mach-s5pc100/include/mach/gpio-core.h
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/* arch/arm/mach-s5pc100/include/mach/gpio-core.h
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*
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* Copyright 2009 Samsung Electronics Co.
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* Byungho Min <bhmin@samsung.com>
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*
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* S5PC100 - GPIO core support
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*
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* Based on mach-s3c6400/include/mach/gpio-core.h
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_GPIO_CORE_H
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#define __ASM_ARCH_GPIO_CORE_H __FILE__
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/* currently we just include the platform support */
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#include <plat/gpio-core.h>
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#endif /* __ASM_ARCH_GPIO_CORE_H */
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arch/arm/mach-s5pc100/include/mach/gpio.h
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arch/arm/mach-s5pc100/include/mach/gpio.h
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/* arch/arm/mach-s5pc100/include/mach/gpio.h
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*
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* Copyright 2009 Samsung Electronics Co.
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* Byungho Min <bhmin@samsung.com>
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*
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* S5PC100 - GPIO lib support
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*
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* Base on mach-s3c6400/include/mach/gpio.h
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define gpio_get_value __gpio_get_value
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#define gpio_set_value __gpio_set_value
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#define gpio_cansleep __gpio_cansleep
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#define gpio_to_irq __gpio_to_irq
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/* GPIO bank sizes */
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#define S5PC1XX_GPIO_A0_NR (8)
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#define S5PC1XX_GPIO_A1_NR (5)
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#define S5PC1XX_GPIO_B_NR (8)
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#define S5PC1XX_GPIO_C_NR (5)
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#define S5PC1XX_GPIO_D_NR (7)
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#define S5PC1XX_GPIO_E0_NR (8)
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#define S5PC1XX_GPIO_E1_NR (6)
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#define S5PC1XX_GPIO_F0_NR (8)
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#define S5PC1XX_GPIO_F1_NR (8)
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#define S5PC1XX_GPIO_F2_NR (8)
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#define S5PC1XX_GPIO_F3_NR (4)
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#define S5PC1XX_GPIO_G0_NR (8)
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#define S5PC1XX_GPIO_G1_NR (3)
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#define S5PC1XX_GPIO_G2_NR (7)
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#define S5PC1XX_GPIO_G3_NR (7)
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#define S5PC1XX_GPIO_H0_NR (8)
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#define S5PC1XX_GPIO_H1_NR (8)
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#define S5PC1XX_GPIO_H2_NR (8)
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#define S5PC1XX_GPIO_H3_NR (8)
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#define S5PC1XX_GPIO_I_NR (8)
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#define S5PC1XX_GPIO_J0_NR (8)
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#define S5PC1XX_GPIO_J1_NR (5)
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#define S5PC1XX_GPIO_J2_NR (8)
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#define S5PC1XX_GPIO_J3_NR (8)
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#define S5PC1XX_GPIO_J4_NR (4)
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#define S5PC1XX_GPIO_K0_NR (8)
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#define S5PC1XX_GPIO_K1_NR (6)
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#define S5PC1XX_GPIO_K2_NR (8)
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#define S5PC1XX_GPIO_K3_NR (8)
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#define S5PC1XX_GPIO_MP00_NR (8)
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#define S5PC1XX_GPIO_MP01_NR (8)
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#define S5PC1XX_GPIO_MP02_NR (8)
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#define S5PC1XX_GPIO_MP03_NR (8)
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#define S5PC1XX_GPIO_MP04_NR (5)
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/* GPIO bank numbes */
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/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
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* space for debugging purposes so that any accidental
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* change from one gpio bank to another can be caught.
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*/
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#define S5PC1XX_GPIO_NEXT(__gpio) \
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((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
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enum s3c_gpio_number {
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S5PC1XX_GPIO_A0_START = 0,
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S5PC1XX_GPIO_A1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A0),
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S5PC1XX_GPIO_B_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A1),
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S5PC1XX_GPIO_C_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_B),
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S5PC1XX_GPIO_D_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_C),
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S5PC1XX_GPIO_E0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_D),
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S5PC1XX_GPIO_E1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_E0),
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S5PC1XX_GPIO_F0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_E1),
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S5PC1XX_GPIO_F1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F0),
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S5PC1XX_GPIO_F2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F1),
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S5PC1XX_GPIO_F3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F2),
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S5PC1XX_GPIO_G0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F3),
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S5PC1XX_GPIO_G1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G0),
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S5PC1XX_GPIO_G2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G1),
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S5PC1XX_GPIO_G3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G2),
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S5PC1XX_GPIO_H0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G3),
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S5PC1XX_GPIO_H1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H0),
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S5PC1XX_GPIO_H2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H1),
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S5PC1XX_GPIO_H3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H2),
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S5PC1XX_GPIO_I_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H3),
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S5PC1XX_GPIO_J0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_I),
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S5PC1XX_GPIO_J1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J0),
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S5PC1XX_GPIO_J2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J1),
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S5PC1XX_GPIO_J3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J2),
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S5PC1XX_GPIO_J4_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J3),
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S5PC1XX_GPIO_K0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J4),
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S5PC1XX_GPIO_K1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K0),
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S5PC1XX_GPIO_K2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K1),
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S5PC1XX_GPIO_K3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K2),
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S5PC1XX_GPIO_MP00_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K3),
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S5PC1XX_GPIO_MP01_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP00),
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S5PC1XX_GPIO_MP02_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP01),
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S5PC1XX_GPIO_MP03_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP02),
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S5PC1XX_GPIO_MP04_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP03),
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};
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/* S5PC1XX GPIO number definitions. */
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#define S5PC1XX_GPA0(_nr) (S5PC1XX_GPIO_A0_START + (_nr))
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#define S5PC1XX_GPA1(_nr) (S5PC1XX_GPIO_A1_START + (_nr))
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#define S5PC1XX_GPB(_nr) (S5PC1XX_GPIO_B_START + (_nr))
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#define S5PC1XX_GPC(_nr) (S5PC1XX_GPIO_C_START + (_nr))
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#define S5PC1XX_GPD(_nr) (S5PC1XX_GPIO_D_START + (_nr))
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#define S5PC1XX_GPE0(_nr) (S5PC1XX_GPIO_E0_START + (_nr))
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#define S5PC1XX_GPE1(_nr) (S5PC1XX_GPIO_E1_START + (_nr))
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#define S5PC1XX_GPF0(_nr) (S5PC1XX_GPIO_F0_START + (_nr))
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#define S5PC1XX_GPF1(_nr) (S5PC1XX_GPIO_F1_START + (_nr))
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#define S5PC1XX_GPF2(_nr) (S5PC1XX_GPIO_F2_START + (_nr))
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#define S5PC1XX_GPF3(_nr) (S5PC1XX_GPIO_F3_START + (_nr))
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#define S5PC1XX_GPG0(_nr) (S5PC1XX_GPIO_G0_START + (_nr))
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#define S5PC1XX_GPG1(_nr) (S5PC1XX_GPIO_G1_START + (_nr))
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#define S5PC1XX_GPG2(_nr) (S5PC1XX_GPIO_G2_START + (_nr))
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#define S5PC1XX_GPG3(_nr) (S5PC1XX_GPIO_G3_START + (_nr))
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#define S5PC1XX_GPH0(_nr) (S5PC1XX_GPIO_H0_START + (_nr))
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#define S5PC1XX_GPH1(_nr) (S5PC1XX_GPIO_H1_START + (_nr))
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#define S5PC1XX_GPH2(_nr) (S5PC1XX_GPIO_H2_START + (_nr))
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#define S5PC1XX_GPH3(_nr) (S5PC1XX_GPIO_H3_START + (_nr))
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#define S5PC1XX_GPI(_nr) (S5PC1XX_GPIO_I_START + (_nr))
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#define S5PC1XX_GPJ0(_nr) (S5PC1XX_GPIO_J0_START + (_nr))
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#define S5PC1XX_GPJ1(_nr) (S5PC1XX_GPIO_J1_START + (_nr))
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#define S5PC1XX_GPJ2(_nr) (S5PC1XX_GPIO_J2_START + (_nr))
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#define S5PC1XX_GPJ3(_nr) (S5PC1XX_GPIO_J3_START + (_nr))
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#define S5PC1XX_GPJ4(_nr) (S5PC1XX_GPIO_J4_START + (_nr))
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#define S5PC1XX_GPK0(_nr) (S5PC1XX_GPIO_K0_START + (_nr))
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#define S5PC1XX_GPK1(_nr) (S5PC1XX_GPIO_K1_START + (_nr))
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#define S5PC1XX_GPK2(_nr) (S5PC1XX_GPIO_K2_START + (_nr))
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#define S5PC1XX_GPK3(_nr) (S5PC1XX_GPIO_K3_START + (_nr))
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#define S5PC1XX_MP00(_nr) (S5PC1XX_GPIO_MP00_START + (_nr))
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#define S5PC1XX_MP01(_nr) (S5PC1XX_GPIO_MP01_START + (_nr))
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#define S5PC1XX_MP02(_nr) (S5PC1XX_GPIO_MP02_START + (_nr))
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#define S5PC1XX_MP03(_nr) (S5PC1XX_GPIO_MP03_START + (_nr))
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#define S5PC1XX_MP04(_nr) (S5PC1XX_GPIO_MP04_START + (_nr))
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/* the end of the S5PC1XX specific gpios */
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#define S5PC1XX_GPIO_END (S5PC1XX_MP04(S5PC1XX_GPIO_MP04_NR) + 1)
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#define S3C_GPIO_END S5PC1XX_GPIO_END
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/* define the number of gpios we need to the one after the MP04() range */
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#define ARCH_NR_GPIOS (S5PC1XX_MP04(S5PC1XX_GPIO_MP04_NR) + 1)
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#include <asm-generic/gpio.h>
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arch/arm/plat-s5pc1xx/setup-i2c0.c
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arch/arm/plat-s5pc1xx/setup-i2c0.c
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/* linux/arch/arm/plat-s5pc1xx/setup-i2c0.c
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*
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* Copyright 2009 Samsung Electronics Co.
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* Byungho Min <bhmin@samsung.com>
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*
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* Base S5PC1XX I2C bus 0 gpio configuration
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*
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* Based on plat-s3c64xx/setup-i2c0.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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struct platform_device; /* don't need the contents */
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#include <plat/iic.h>
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void s3c_i2c0_cfg_gpio(struct platform_device *dev)
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{
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/* Pin configuration would be needed */
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}
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arch/arm/plat-s5pc1xx/setup-i2c1.c
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arch/arm/plat-s5pc1xx/setup-i2c1.c
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/* linux/arch/arm/plat-s3c64xx/setup-i2c1.c
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*
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* Copyright 2009 Samsung Electronics Co.
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* Byungho Min <bhmin@samsung.com>
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*
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* Base S5PC1XX I2C bus 1 gpio configuration
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*
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* Based on plat-s3c64xx/setup-i2c1.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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struct platform_device; /* don't need the contents */
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#include <plat/iic.h>
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void s3c_i2c1_cfg_gpio(struct platform_device *dev)
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{
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/* Pin configuration would be needed */
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}
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