ARM: LPC32xx: Fix reset function
In the recent change to the reset function API (commit
7b6d864b48
), the mode argument changed from a
char to an enum. lpc23xx_restart() only handles REBOOT_SOFT and REBOOT_HARD,
but the new kernel code emits REBOOT_COLD (0) on reboots now which leads to
lpc32xx simply not rebooting (but halting).
This patch fixes this by just resetting unconditionally as on other platforms
(e.g. mach-bcm2835).
Pulling lpc32xx_watchdog_reset() into lpc23xx_restart() since the while() in
lpc23xx_restart() is part of the procedure anyway and lpc32xx_watchdog_reset()
isn't used anywhere else anymore.
Signed-off-by: Roland Stigge <stigge@antcom.de>
This commit is contained in:
parent
8013e8c711
commit
01100c022d
1 changed files with 6 additions and 23 deletions
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@ -56,20 +56,6 @@ int clk_is_sysclk_mainosc(void)
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return 0;
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}
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/*
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* System reset via the watchdog timer
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*/
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static void lpc32xx_watchdog_reset(void)
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{
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/* Make sure WDT clocks are enabled */
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__raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN,
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LPC32XX_CLKPWR_TIMER_CLK_CTRL);
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/* Instant assert of RESETOUT_N with pulse length 1mS */
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__raw_writel(13000, io_p2v(LPC32XX_WDTIM_BASE + 0x18));
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__raw_writel(0x70, io_p2v(LPC32XX_WDTIM_BASE + 0xC));
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}
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/*
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* Detects and returns IRAM size for the device variation
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*/
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@ -210,16 +196,13 @@ void __init lpc32xx_map_io(void)
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void lpc23xx_restart(enum reboot_mode mode, const char *cmd)
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{
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switch (mode) {
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case REBOOT_SOFT:
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case REBOOT_HARD:
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lpc32xx_watchdog_reset();
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break;
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/* Make sure WDT clocks are enabled */
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__raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN,
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LPC32XX_CLKPWR_TIMER_CLK_CTRL);
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default:
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/* Do nothing */
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break;
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}
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/* Instant assert of RESETOUT_N with pulse length 1mS */
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__raw_writel(13000, io_p2v(LPC32XX_WDTIM_BASE + 0x18));
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__raw_writel(0x70, io_p2v(LPC32XX_WDTIM_BASE + 0xC));
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/* Wait for watchdog to reset system */
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while (1)
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