[PATCH] synclink_gt add gpio feature
Add driver support for general purpose I/O feature of the Synclink GT adapters. Signed-off-by: Paul Fulghum <paulkf@micrgate.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Paul Fulghum
Linus Torvalds
parent
86a34147d1
commit
0080b7aae8
2 changed files with 252 additions and 5 deletions
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@ -1,5 +1,5 @@
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/*
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* $Id: synclink_gt.c,v 4.22 2006/01/09 20:16:06 paulkf Exp $
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* $Id: synclink_gt.c,v 4.25 2006/02/06 21:20:33 paulkf Exp $
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*
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* Device driver for Microgate SyncLink GT serial adapters.
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*
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@ -92,7 +92,7 @@
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* module identification
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*/
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static char *driver_name = "SyncLink GT";
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static char *driver_version = "$Revision: 4.22 $";
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static char *driver_version = "$Revision: 4.25 $";
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static char *tty_driver_name = "synclink_gt";
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static char *tty_dev_prefix = "ttySLG";
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MODULE_LICENSE("GPL");
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@ -187,6 +187,20 @@ static void hdlcdev_exit(struct slgt_info *info);
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#define SLGT_MAX_PORTS 4
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#define SLGT_REG_SIZE 256
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/*
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* conditional wait facility
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*/
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struct cond_wait {
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struct cond_wait *next;
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wait_queue_head_t q;
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wait_queue_t wait;
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unsigned int data;
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};
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static void init_cond_wait(struct cond_wait *w, unsigned int data);
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static void add_cond_wait(struct cond_wait **head, struct cond_wait *w);
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static void remove_cond_wait(struct cond_wait **head, struct cond_wait *w);
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static void flush_cond_wait(struct cond_wait **head);
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/*
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* DMA buffer descriptor and access macros
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*/
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@ -269,6 +283,9 @@ struct slgt_info {
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struct timer_list tx_timer;
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struct timer_list rx_timer;
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unsigned int gpio_present;
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struct cond_wait *gpio_wait_q;
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spinlock_t lock; /* spinlock for synchronizing with ISR */
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struct work_struct task;
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@ -379,6 +396,11 @@ static MGSL_PARAMS default_params = {
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#define MASK_OVERRUN BIT4
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#define GSR 0x00 /* global status */
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#define JCR 0x04 /* JTAG control */
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#define IODR 0x08 /* GPIO direction */
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#define IOER 0x0c /* GPIO interrupt enable */
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#define IOVR 0x10 /* GPIO value */
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#define IOSR 0x14 /* GPIO interrupt status */
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#define TDR 0x80 /* tx data */
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#define RDR 0x80 /* rx data */
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#define TCR 0x82 /* tx control */
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@ -503,6 +525,9 @@ static int tiocmset(struct tty_struct *tty, struct file *file,
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static void set_break(struct tty_struct *tty, int break_state);
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static int get_interface(struct slgt_info *info, int __user *if_mode);
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static int set_interface(struct slgt_info *info, int if_mode);
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static int set_gpio(struct slgt_info *info, struct gpio_desc __user *gpio);
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static int get_gpio(struct slgt_info *info, struct gpio_desc __user *gpio);
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static int wait_gpio(struct slgt_info *info, struct gpio_desc __user *gpio);
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/*
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* driver functions
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@ -1112,6 +1137,12 @@ static int ioctl(struct tty_struct *tty, struct file *file,
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return get_interface(info, argp);
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case MGSL_IOCSIF:
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return set_interface(info,(int)arg);
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case MGSL_IOCSGPIO:
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return set_gpio(info, argp);
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case MGSL_IOCGGPIO:
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return get_gpio(info, argp);
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case MGSL_IOCWAITGPIO:
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return wait_gpio(info, argp);
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case TIOCGICOUNT:
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spin_lock_irqsave(&info->lock,flags);
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cnow = info->icount;
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@ -2158,6 +2189,24 @@ static void isr_txeom(struct slgt_info *info, unsigned short status)
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}
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}
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static void isr_gpio(struct slgt_info *info, unsigned int changed, unsigned int state)
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{
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struct cond_wait *w, *prev;
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/* wake processes waiting for specific transitions */
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for (w = info->gpio_wait_q, prev = NULL ; w != NULL ; w = w->next) {
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if (w->data & changed) {
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w->data = state;
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wake_up_interruptible(&w->q);
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if (prev != NULL)
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prev->next = w->next;
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else
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info->gpio_wait_q = w->next;
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} else
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prev = w;
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}
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}
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/* interrupt service routine
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*
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* irq interrupt number
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@ -2193,6 +2242,22 @@ static irqreturn_t slgt_interrupt(int irq, void *dev_id, struct pt_regs * regs)
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}
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}
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if (info->gpio_present) {
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unsigned int state;
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unsigned int changed;
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while ((changed = rd_reg32(info, IOSR)) != 0) {
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DBGISR(("%s iosr=%08x\n", info->device_name, changed));
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/* read latched state of GPIO signals */
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state = rd_reg32(info, IOVR);
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/* clear pending GPIO interrupt bits */
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wr_reg32(info, IOSR, changed);
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for (i=0 ; i < info->port_count ; i++) {
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if (info->port_array[i] != NULL)
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isr_gpio(info->port_array[i], changed, state);
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}
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}
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}
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for(i=0; i < info->port_count ; i++) {
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struct slgt_info *port = info->port_array[i];
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@ -2276,6 +2341,8 @@ static void shutdown(struct slgt_info *info)
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set_signals(info);
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}
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flush_cond_wait(&info->gpio_wait_q);
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spin_unlock_irqrestore(&info->lock,flags);
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if (info->tty)
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@ -2650,6 +2717,175 @@ static int set_interface(struct slgt_info *info, int if_mode)
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return 0;
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}
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/*
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* set general purpose IO pin state and direction
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*
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* user_gpio fields:
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* state each bit indicates a pin state
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* smask set bit indicates pin state to set
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* dir each bit indicates a pin direction (0=input, 1=output)
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* dmask set bit indicates pin direction to set
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*/
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static int set_gpio(struct slgt_info *info, struct gpio_desc __user *user_gpio)
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{
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unsigned long flags;
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struct gpio_desc gpio;
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__u32 data;
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if (!info->gpio_present)
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return -EINVAL;
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if (copy_from_user(&gpio, user_gpio, sizeof(gpio)))
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return -EFAULT;
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DBGINFO(("%s set_gpio state=%08x smask=%08x dir=%08x dmask=%08x\n",
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info->device_name, gpio.state, gpio.smask,
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gpio.dir, gpio.dmask));
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spin_lock_irqsave(&info->lock,flags);
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if (gpio.dmask) {
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data = rd_reg32(info, IODR);
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data |= gpio.dmask & gpio.dir;
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data &= ~(gpio.dmask & ~gpio.dir);
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wr_reg32(info, IODR, data);
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}
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if (gpio.smask) {
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data = rd_reg32(info, IOVR);
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data |= gpio.smask & gpio.state;
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data &= ~(gpio.smask & ~gpio.state);
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wr_reg32(info, IOVR, data);
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}
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spin_unlock_irqrestore(&info->lock,flags);
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return 0;
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}
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/*
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* get general purpose IO pin state and direction
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*/
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static int get_gpio(struct slgt_info *info, struct gpio_desc __user *user_gpio)
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{
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struct gpio_desc gpio;
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if (!info->gpio_present)
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return -EINVAL;
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gpio.state = rd_reg32(info, IOVR);
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gpio.smask = 0xffffffff;
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gpio.dir = rd_reg32(info, IODR);
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gpio.dmask = 0xffffffff;
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if (copy_to_user(user_gpio, &gpio, sizeof(gpio)))
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return -EFAULT;
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DBGINFO(("%s get_gpio state=%08x dir=%08x\n",
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info->device_name, gpio.state, gpio.dir));
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return 0;
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}
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/*
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* conditional wait facility
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*/
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static void init_cond_wait(struct cond_wait *w, unsigned int data)
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{
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init_waitqueue_head(&w->q);
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init_waitqueue_entry(&w->wait, current);
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w->data = data;
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}
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static void add_cond_wait(struct cond_wait **head, struct cond_wait *w)
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{
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set_current_state(TASK_INTERRUPTIBLE);
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add_wait_queue(&w->q, &w->wait);
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w->next = *head;
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*head = w;
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}
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static void remove_cond_wait(struct cond_wait **head, struct cond_wait *cw)
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{
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struct cond_wait *w, *prev;
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remove_wait_queue(&cw->q, &cw->wait);
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set_current_state(TASK_RUNNING);
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for (w = *head, prev = NULL ; w != NULL ; prev = w, w = w->next) {
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if (w == cw) {
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if (prev != NULL)
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prev->next = w->next;
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else
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*head = w->next;
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break;
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}
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}
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}
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static void flush_cond_wait(struct cond_wait **head)
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{
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while (*head != NULL) {
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wake_up_interruptible(&(*head)->q);
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*head = (*head)->next;
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}
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}
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/*
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* wait for general purpose I/O pin(s) to enter specified state
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*
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* user_gpio fields:
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* state - bit indicates target pin state
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* smask - set bit indicates watched pin
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*
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* The wait ends when at least one watched pin enters the specified
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* state. When 0 (no error) is returned, user_gpio->state is set to the
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* state of all GPIO pins when the wait ends.
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*
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* Note: Each pin may be a dedicated input, dedicated output, or
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* configurable input/output. The number and configuration of pins
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* varies with the specific adapter model. Only input pins (dedicated
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* or configured) can be monitored with this function.
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*/
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static int wait_gpio(struct slgt_info *info, struct gpio_desc __user *user_gpio)
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{
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unsigned long flags;
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int rc = 0;
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struct gpio_desc gpio;
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struct cond_wait wait;
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u32 state;
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if (!info->gpio_present)
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return -EINVAL;
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if (copy_from_user(&gpio, user_gpio, sizeof(gpio)))
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return -EFAULT;
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DBGINFO(("%s wait_gpio() state=%08x smask=%08x\n",
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info->device_name, gpio.state, gpio.smask));
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/* ignore output pins identified by set IODR bit */
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if ((gpio.smask &= ~rd_reg32(info, IODR)) == 0)
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return -EINVAL;
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init_cond_wait(&wait, gpio.smask);
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spin_lock_irqsave(&info->lock, flags);
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/* enable interrupts for watched pins */
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wr_reg32(info, IOER, rd_reg32(info, IOER) | gpio.smask);
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/* get current pin states */
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state = rd_reg32(info, IOVR);
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if (gpio.smask & ~(state ^ gpio.state)) {
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/* already in target state */
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gpio.state = state;
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} else {
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/* wait for target state */
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add_cond_wait(&info->gpio_wait_q, &wait);
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spin_unlock_irqrestore(&info->lock, flags);
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schedule();
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if (signal_pending(current))
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rc = -ERESTARTSYS;
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else
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gpio.state = wait.data;
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spin_lock_irqsave(&info->lock, flags);
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remove_cond_wait(&info->gpio_wait_q, &wait);
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}
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/* disable all GPIO interrupts if no waiting processes */
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if (info->gpio_wait_q == NULL)
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wr_reg32(info, IOER, 0);
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spin_unlock_irqrestore(&info->lock,flags);
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if ((rc == 0) && copy_to_user(user_gpio, &gpio, sizeof(gpio)))
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rc = -EFAULT;
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return rc;
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}
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static int modem_input_wait(struct slgt_info *info,int arg)
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{
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unsigned long flags;
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@ -3166,8 +3402,10 @@ static void device_init(int adapter_num, struct pci_dev *pdev)
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} else {
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port_array[0]->irq_requested = 1;
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adapter_test(port_array[0]);
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for (i=1 ; i < port_count ; i++)
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for (i=1 ; i < port_count ; i++) {
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port_array[i]->init_error = port_array[0]->init_error;
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port_array[i]->gpio_present = port_array[0]->gpio_present;
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}
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}
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}
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}
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@ -4301,7 +4539,7 @@ static int register_test(struct slgt_info *info)
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break;
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}
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}
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info->gpio_present = (rd_reg32(info, JCR) & BIT5) ? 1 : 0;
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info->init_error = rc ? 0 : DiagStatus_AddressFailure;
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return rc;
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}
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@ -1,7 +1,7 @@
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/*
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* SyncLink Multiprotocol Serial Adapter Driver
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*
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* $Id: synclink.h,v 3.10 2005/11/08 19:50:54 paulkf Exp $
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* $Id: synclink.h,v 3.11 2006/02/06 21:20:29 paulkf Exp $
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*
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* Copyright (C) 1998-2000 by Microgate Corporation
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*
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@ -221,6 +221,12 @@ struct mgsl_icount {
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__u32 rxidle;
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};
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struct gpio_desc {
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__u32 state;
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__u32 smask;
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__u32 dir;
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__u32 dmask;
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};
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#define DEBUG_LEVEL_DATA 1
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#define DEBUG_LEVEL_ERROR 2
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@ -276,5 +282,8 @@ struct mgsl_icount {
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#define MGSL_IOCLOOPTXDONE _IO(MGSL_MAGIC_IOC,9)
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#define MGSL_IOCSIF _IO(MGSL_MAGIC_IOC,10)
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#define MGSL_IOCGIF _IO(MGSL_MAGIC_IOC,11)
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#define MGSL_IOCSGPIO _IOW(MGSL_MAGIC_IOC,16,struct gpio_desc)
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#define MGSL_IOCGGPIO _IOR(MGSL_MAGIC_IOC,17,struct gpio_desc)
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#define MGSL_IOCWAITGPIO _IOWR(MGSL_MAGIC_IOC,18,struct gpio_desc)
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#endif /* _SYNCLINK_H_ */
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