49 lines
1.7 KiB
C
49 lines
1.7 KiB
C
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/*
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* mx1_mx2-pcm.h :- ASoC platform header for Freescale i.MX1x, i.MX2x
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _MXC_PCM_H
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#define _MXC_PCM_H
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/* AUDMUX register definitions */
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#define AUDMUX_IO_BASE_ADDR IO_ADDRESS(AUDMUX_BASE_ADDR)
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#define DAM_HPCR1 (*((volatile u32 *)(AUDMUX_IO_BASE_ADDR + 0x00)))
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#define DAM_HPCR2 (*((volatile u32 *)(AUDMUX_IO_BASE_ADDR + 0x04)))
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#define DAM_HPCR3 (*((volatile u32 *)(AUDMUX_IO_BASE_ADDR + 0x08)))
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#define DAM_PPCR1 (*((volatile u32 *)(AUDMUX_IO_BASE_ADDR + 0x10)))
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#define DAM_PPCR2 (*((volatile u32 *)(AUDMUX_IO_BASE_ADDR + 0x14)))
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#define DAM_PPCR3 (*((volatile u32 *)(AUDMUX_IO_BASE_ADDR + 0x1C)))
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#define AUDMUX_HPCR_TFSDIR (1 << 31)
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#define AUDMUX_HPCR_TCLKDIR (1 << 30)
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#define AUDMUX_HPCR_TFCSEL(x) (((x) & 0xff) << 26)
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#define AUDMUX_HPCR_RXDSEL(x) (((x) & 0x7) << 13)
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#define AUDMUX_HPCR_SYN (1 << 12)
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#define AUDMUX_PPCR_TFSDIR (1 << 31)
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#define AUDMUX_PPCR_TCLKDIR (1 << 30)
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#define AUDMUX_PPCR_TFCSEL(x) (((x) & 0xff) << 26)
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#define AUDMUX_PPCR_RXDSEL(x) (((x) & 0x7) << 13)
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#define AUDMUX_PPCR_SYN (1 << 12)
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/* DMA information for mx1_mx2 platforms */
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struct mx1_mx2_pcm_dma_params {
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char *name; /* stream identifier */
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unsigned int transfer_type; /* READ or WRITE DMA transfer */
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dma_addr_t per_address; /* physical address of SSI fifo */
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int event_id; /* fixed DMA number for SSI fifo */
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int watermark_level; /* SSI fifo watermark level */
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int per_config; /* DMA Config flags for peripheral */
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int mem_config; /* DMA Config flags for RAM */
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};
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/* platform data */
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extern struct snd_soc_platform mx1_mx2_soc_platform;
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#endif
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