2005-04-16 16:20:36 -06:00
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/*
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* Setup pointers to hardware dependent routines.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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2006-01-18 10:37:07 -07:00
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* Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
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2005-04-16 16:20:36 -06:00
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* Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
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*
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*/
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#include <linux/config.h>
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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2006-01-18 10:37:07 -07:00
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#include <linux/pm.h>
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2005-02-21 09:18:36 -07:00
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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2005-04-16 16:20:36 -06:00
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#include <asm/bootinfo.h>
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#include <asm/time.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/processor.h>
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#include <asm/reboot.h>
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#include <asm/gt64120.h>
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2005-02-21 09:18:36 -07:00
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#include <asm/serial.h>
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2005-04-16 16:20:36 -06:00
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#include <asm/cobalt/cobalt.h>
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extern void cobalt_machine_restart(char *command);
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extern void cobalt_machine_halt(void);
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extern void cobalt_machine_power_off(void);
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int cobalt_board_id;
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const char *get_system_type(void)
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{
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2005-02-21 09:18:36 -07:00
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switch (cobalt_board_id) {
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case COBALT_BRD_ID_QUBE1:
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return "Cobalt Qube";
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case COBALT_BRD_ID_RAQ1:
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return "Cobalt RaQ";
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case COBALT_BRD_ID_QUBE2:
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return "Cobalt Qube2";
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case COBALT_BRD_ID_RAQ2:
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return "Cobalt RaQ2";
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}
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2005-04-16 16:20:36 -06:00
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return "MIPS Cobalt";
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}
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static void __init cobalt_timer_setup(struct irqaction *irq)
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{
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2005-02-21 09:18:36 -07:00
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/* Load timer value for 1KHz (TCLK is 50MHz) */
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GALILEO_OUTL(50*1000*1000 / 1000, GT_TC0_OFS);
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2005-04-16 16:20:36 -06:00
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2005-02-21 09:18:36 -07:00
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/* Enable timer */
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GALILEO_OUTL(GALILEO_ENTC0 | GALILEO_SELTC0, GT_TC_CONTROL_OFS);
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2005-04-16 16:20:36 -06:00
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2005-02-21 09:18:36 -07:00
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/* Register interrupt */
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setup_irq(COBALT_GALILEO_IRQ, irq);
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/* Enable interrupt */
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GALILEO_OUTL(GALILEO_INTR_T0EXP | GALILEO_INL(GT_INTRMASK_OFS), GT_INTRMASK_OFS);
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2005-04-16 16:20:36 -06:00
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}
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extern struct pci_ops gt64111_pci_ops;
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static struct resource cobalt_mem_resource = {
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2005-02-21 09:18:36 -07:00
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"PCI memory", GT64111_MEM_BASE, GT64111_MEM_END, IORESOURCE_MEM
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2005-04-16 16:20:36 -06:00
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};
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static struct resource cobalt_io_resource = {
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"PCI I/O", 0x1000, 0xffff, IORESOURCE_IO
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2005-04-16 16:20:36 -06:00
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};
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static struct resource cobalt_io_resources[] = {
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{ "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
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{ "timer", 0x40, 0x5f, IORESOURCE_BUSY },
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{ "keyboard", 0x60, 0x6f, IORESOURCE_BUSY },
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{ "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
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{ "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
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};
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#define COBALT_IO_RESOURCES (sizeof(cobalt_io_resources)/sizeof(struct resource))
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static struct pci_controller cobalt_pci_controller = {
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.pci_ops = >64111_pci_ops,
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.mem_resource = &cobalt_mem_resource,
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.mem_offset = 0,
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.io_resource = &cobalt_io_resource,
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2005-02-21 09:18:36 -07:00
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.io_offset = 0 - GT64111_IO_BASE
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2005-04-16 16:20:36 -06:00
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};
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2005-06-21 07:56:30 -06:00
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void __init plat_setup(void)
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2005-04-16 16:20:36 -06:00
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{
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static struct uart_port uart;
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2005-04-16 16:20:36 -06:00
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unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
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int i;
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_machine_restart = cobalt_machine_restart;
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_machine_halt = cobalt_machine_halt;
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2006-01-18 10:37:07 -07:00
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pm_power_off = cobalt_machine_power_off;
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2005-04-16 16:20:36 -06:00
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board_timer_setup = cobalt_timer_setup;
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2005-02-21 09:18:36 -07:00
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set_io_port_base(CKSEG1ADDR(GT64111_IO_BASE));
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/* I/O port resource must include UART and LCD/buttons */
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ioport_resource.end = 0x0fffffff;
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2005-04-16 16:20:36 -06:00
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/*
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* This is a prom style console. We just poke at the
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* UART to make it talk.
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* Only use this console if you really screw up and can't
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* get to the stage of setting up a real serial console.
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*/
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/*ns16550_setup_console();*/
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/* request I/O space for devices used on all i[345]86 PCs */
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for (i = 0; i < COBALT_IO_RESOURCES; i++)
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request_resource(&ioport_resource, cobalt_io_resources + i);
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/* Read the cobalt id register out of the PCI config space */
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PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3));
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cobalt_board_id = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
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cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8);
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cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);
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2005-02-21 09:18:36 -07:00
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printk("Cobalt board ID: %d\n", cobalt_board_id);
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2005-04-16 16:20:36 -06:00
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#ifdef CONFIG_PCI
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register_pci_controller(&cobalt_pci_controller);
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#endif
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2005-02-21 09:18:36 -07:00
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#ifdef CONFIG_SERIAL_8250
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if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
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uart.line = 0;
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uart.type = PORT_UNKNOWN;
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uart.uartclk = 18432000;
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uart.irq = COBALT_SERIAL_IRQ;
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uart.flags = STD_COM_FLAGS;
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uart.iobase = 0xc800000;
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uart.iotype = UPIO_PORT;
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early_serial_setup(&uart);
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}
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#endif
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2005-04-16 16:20:36 -06:00
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}
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/*
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* Prom init. We read our one and only communication with the firmware.
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2005-02-21 09:18:36 -07:00
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* Grab the amount of installed memory.
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* Better boot loaders (CoLo) pass a command line too :-)
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2005-04-16 16:20:36 -06:00
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*/
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void __init prom_init(void)
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{
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2005-02-21 09:18:36 -07:00
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int narg, indx, posn, nchr;
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unsigned long memsz;
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char **argv;
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2005-04-16 16:20:36 -06:00
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mips_machgroup = MACH_GROUP_COBALT;
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2005-02-21 09:18:36 -07:00
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memsz = fw_arg0 & 0x7fff0000;
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narg = fw_arg0 & 0x0000ffff;
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if (narg) {
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arcs_cmdline[0] = '\0';
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argv = (char **) fw_arg1;
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posn = 0;
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for (indx = 1; indx < narg; ++indx) {
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nchr = strlen(argv[indx]);
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if (posn + 1 + nchr + 1 > sizeof(arcs_cmdline))
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break;
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if (posn)
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arcs_cmdline[posn++] = ' ';
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strcpy(arcs_cmdline + posn, argv[indx]);
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posn += nchr;
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}
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}
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add_memory_region(0x0, memsz, BOOT_MEM_RAM);
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2005-04-16 16:20:36 -06:00
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}
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unsigned long __init prom_free_prom_memory(void)
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{
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/* Nothing to do! */
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return 0;
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}
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