467 lines
11 KiB
C
467 lines
11 KiB
C
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/*
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* atari_dma_emul.c -- TT SCSI DMA emulator for the Hades.
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*
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* Copyright 1997 Wout Klaren <W.Klaren@inter.nl.net>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive
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* for more details.
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*
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* This code was written using the Hades TOS source code as a
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* reference. This source code can be found on the home page
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* of Medusa Computer Systems.
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*
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* Version 0.1, 1997-09-24.
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*
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* This code should be considered experimental. It has only been
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* tested on a Hades with a 68060. It might not work on a Hades
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* with a 68040. Make backups of your hard drives before using
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* this code.
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*/
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#include <asm/uaccess.h>
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#define hades_dma_ctrl (*(unsigned char *) 0xffff8717)
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#define hades_psdm_reg (*(unsigned char *) 0xffff8741)
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#define TRANSFER_SIZE 16
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struct m68040_frame {
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unsigned long effaddr; /* effective address */
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unsigned short ssw; /* special status word */
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unsigned short wb3s; /* write back 3 status */
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unsigned short wb2s; /* write back 2 status */
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unsigned short wb1s; /* write back 1 status */
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unsigned long faddr; /* fault address */
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unsigned long wb3a; /* write back 3 address */
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unsigned long wb3d; /* write back 3 data */
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unsigned long wb2a; /* write back 2 address */
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unsigned long wb2d; /* write back 2 data */
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unsigned long wb1a; /* write back 1 address */
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unsigned long wb1dpd0; /* write back 1 data/push data 0*/
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unsigned long pd1; /* push data 1*/
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unsigned long pd2; /* push data 2*/
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unsigned long pd3; /* push data 3*/
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};
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static void writeback (unsigned short wbs, unsigned long wba,
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unsigned long wbd, void *old_buserr)
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{
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mm_segment_t fs = get_fs();
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static void *save_buserr;
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__asm__ __volatile__ ("movec.l %%vbr,%%a0\n\t"
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"move.l %0,8(%%a0)\n\t"
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:
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: "r" (&&bus_error)
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: "a0" );
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save_buserr = old_buserr;
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set_fs (MAKE_MM_SEG(wbs & WBTM_040));
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switch (wbs & WBSIZ_040) {
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case BA_SIZE_BYTE:
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put_user (wbd & 0xff, (char *)wba);
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break;
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case BA_SIZE_WORD:
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put_user (wbd & 0xffff, (short *)wba);
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break;
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case BA_SIZE_LONG:
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put_user (wbd, (int *)wba);
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break;
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}
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set_fs (fs);
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return;
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bus_error:
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__asm__ __volatile__ ("cmp.l %0,2(%%sp)\n\t"
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"bcs.s .jump_old\n\t"
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"cmp.l %1,2(%%sp)\n\t"
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"bls.s .restore_old\n"
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".jump_old:\n\t"
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"move.l %2,-(%%sp)\n\t"
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"rts\n"
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".restore_old:\n\t"
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"move.l %%a0,-(%%sp)\n\t"
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"movec.l %%vbr,%%a0\n\t"
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"move.l %2,8(%%a0)\n\t"
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"move.l (%%sp)+,%%a0\n\t"
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"rte\n\t"
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:
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: "i" (writeback), "i" (&&bus_error),
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"m" (save_buserr) );
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}
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/*
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* static inline void set_restdata_reg(unsigned char *cur_addr)
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*
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* Set the rest data register if necessary.
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*/
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static inline void set_restdata_reg(unsigned char *cur_addr)
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{
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if (((long) cur_addr & ~3) != 0)
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tt_scsi_dma.dma_restdata =
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*((unsigned long *) ((long) cur_addr & ~3));
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}
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/*
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* void hades_dma_emulator(int irq, void *dummy, struct pt_regs *fp)
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*
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* This code emulates TT SCSI DMA on the Hades.
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*
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* Note the following:
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*
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* 1. When there is no byte available to read from the SCSI bus, or
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* when a byte cannot yet bet written to the SCSI bus, a bus
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* error occurs when reading or writing the pseudo DMA data
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* register (hades_psdm_reg). We have to catch this bus error
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* and try again to read or write the byte. If after several tries
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* we still get a bus error, the interrupt handler is left. When
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* the byte can be read or written, the interrupt handler is
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* called again.
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*
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* 2. The SCSI interrupt must be disabled in this interrupt handler.
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*
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* 3. If we set the EOP signal, the SCSI controller still expects one
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* byte to be read or written. Therefore the last byte is transferred
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* separately, after setting the EOP signal.
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*
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* 4. When this function is left, the address pointer (start_addr) is
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* converted to a physical address. Because it points one byte
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* further than the last transferred byte, it can point outside the
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* current page. If virt_to_phys() is called with this address we
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* might get an access error. Therefore virt_to_phys() is called with
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* start_addr - 1 if the count has reached zero. The result is
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* increased with one.
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*/
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static irqreturn_t hades_dma_emulator(int irq, void *dummy, struct pt_regs *fp)
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{
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unsigned long dma_base;
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register unsigned long dma_cnt asm ("d3");
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static long save_buserr;
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register unsigned long save_sp asm ("d4");
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register int tries asm ("d5");
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register unsigned char *start_addr asm ("a3"), *end_addr asm ("a4");
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register unsigned char *eff_addr;
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register unsigned char *psdm_reg;
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unsigned long rem;
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atari_disable_irq(IRQ_TT_MFP_SCSI);
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/*
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* Read the dma address and count registers.
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*/
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dma_base = SCSI_DMA_READ_P(dma_addr);
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dma_cnt = SCSI_DMA_READ_P(dma_cnt);
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/*
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* Check if DMA is still enabled.
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*/
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if ((tt_scsi_dma.dma_ctrl & 2) == 0)
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{
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atari_enable_irq(IRQ_TT_MFP_SCSI);
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return IRQ_HANDLED;
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}
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if (dma_cnt == 0)
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{
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printk(KERN_NOTICE "DMA emulation: count is zero.\n");
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tt_scsi_dma.dma_ctrl &= 0xfd; /* DMA ready. */
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atari_enable_irq(IRQ_TT_MFP_SCSI);
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return IRQ_HANDLED;
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}
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/*
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* Install new bus error routine.
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*/
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__asm__ __volatile__ ("movec.l %%vbr,%%a0\n\t"
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"move.l 8(%%a0),%0\n\t"
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"move.l %1,8(%%a0)\n\t"
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: "=&r" (save_buserr)
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: "r" (&&scsi_bus_error)
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: "a0" );
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hades_dma_ctrl &= 0xfc; /* Bus error and EOP off. */
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/*
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* Save the stack pointer.
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*/
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__asm__ __volatile__ ("move.l %%sp,%0\n\t"
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: "=&r" (save_sp) );
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tries = 100; /* Maximum number of bus errors. */
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start_addr = phys_to_virt(dma_base);
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end_addr = start_addr + dma_cnt;
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scsi_loop:
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dma_cnt--;
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rem = dma_cnt & (TRANSFER_SIZE - 1);
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dma_cnt &= ~(TRANSFER_SIZE - 1);
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psdm_reg = &hades_psdm_reg;
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if (tt_scsi_dma.dma_ctrl & 1) /* Read or write? */
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{
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/*
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* SCSI write. Abort when count is zero.
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*/
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switch (rem)
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{
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case 0:
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while (dma_cnt > 0)
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{
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dma_cnt -= TRANSFER_SIZE;
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*psdm_reg = *start_addr++;
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case 15:
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*psdm_reg = *start_addr++;
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case 14:
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*psdm_reg = *start_addr++;
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case 13:
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*psdm_reg = *start_addr++;
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case 12:
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*psdm_reg = *start_addr++;
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case 11:
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*psdm_reg = *start_addr++;
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case 10:
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*psdm_reg = *start_addr++;
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case 9:
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*psdm_reg = *start_addr++;
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case 8:
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*psdm_reg = *start_addr++;
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case 7:
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*psdm_reg = *start_addr++;
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case 6:
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*psdm_reg = *start_addr++;
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case 5:
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*psdm_reg = *start_addr++;
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case 4:
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*psdm_reg = *start_addr++;
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case 3:
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*psdm_reg = *start_addr++;
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case 2:
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*psdm_reg = *start_addr++;
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case 1:
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*psdm_reg = *start_addr++;
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}
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}
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hades_dma_ctrl |= 1; /* Set EOP. */
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udelay(10);
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*psdm_reg = *start_addr++; /* Dummy byte. */
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tt_scsi_dma.dma_ctrl &= 0xfd; /* DMA ready. */
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}
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else
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{
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/*
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* SCSI read. Abort when count is zero.
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*/
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switch (rem)
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{
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case 0:
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while (dma_cnt > 0)
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{
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dma_cnt -= TRANSFER_SIZE;
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*start_addr++ = *psdm_reg;
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case 15:
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*start_addr++ = *psdm_reg;
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case 14:
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*start_addr++ = *psdm_reg;
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case 13:
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*start_addr++ = *psdm_reg;
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case 12:
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*start_addr++ = *psdm_reg;
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case 11:
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*start_addr++ = *psdm_reg;
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case 10:
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*start_addr++ = *psdm_reg;
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case 9:
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*start_addr++ = *psdm_reg;
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case 8:
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*start_addr++ = *psdm_reg;
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case 7:
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*start_addr++ = *psdm_reg;
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case 6:
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*start_addr++ = *psdm_reg;
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case 5:
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*start_addr++ = *psdm_reg;
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case 4:
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*start_addr++ = *psdm_reg;
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case 3:
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*start_addr++ = *psdm_reg;
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case 2:
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*start_addr++ = *psdm_reg;
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case 1:
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*start_addr++ = *psdm_reg;
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}
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}
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hades_dma_ctrl |= 1; /* Set EOP. */
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udelay(10);
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*start_addr++ = *psdm_reg;
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tt_scsi_dma.dma_ctrl &= 0xfd; /* DMA ready. */
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set_restdata_reg(start_addr);
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}
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if (start_addr != end_addr)
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printk(KERN_CRIT "DMA emulation: FATAL: Count is not zero at end of transfer.\n");
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dma_cnt = end_addr - start_addr;
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scsi_end:
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dma_base = (dma_cnt == 0) ? virt_to_phys(start_addr - 1) + 1 :
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virt_to_phys(start_addr);
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SCSI_DMA_WRITE_P(dma_addr, dma_base);
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SCSI_DMA_WRITE_P(dma_cnt, dma_cnt);
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/*
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* Restore old bus error routine.
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*/
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__asm__ __volatile__ ("movec.l %%vbr,%%a0\n\t"
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"move.l %0,8(%%a0)\n\t"
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:
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: "r" (save_buserr)
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: "a0" );
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atari_enable_irq(IRQ_TT_MFP_SCSI);
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return IRQ_HANDLED;
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scsi_bus_error:
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/*
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* First check if the bus error is caused by our code.
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* If not, call the original handler.
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*/
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__asm__ __volatile__ ("cmp.l %0,2(%%sp)\n\t"
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"bcs.s .old_vector\n\t"
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"cmp.l %1,2(%%sp)\n\t"
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"bls.s .scsi_buserr\n"
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".old_vector:\n\t"
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"move.l %2,-(%%sp)\n\t"
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"rts\n"
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".scsi_buserr:\n\t"
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:
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: "i" (&&scsi_loop), "i" (&&scsi_end),
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"m" (save_buserr) );
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if (CPU_IS_060)
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{
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/*
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* Get effective address and restore the stack.
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*/
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__asm__ __volatile__ ("move.l 8(%%sp),%0\n\t"
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"move.l %1,%%sp\n\t"
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: "=a&" (eff_addr)
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: "r" (save_sp) );
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}
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else
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{
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register struct m68040_frame *frame;
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__asm__ __volatile__ ("lea 8(%%sp),%0\n\t"
|
||
|
|
: "=a&" (frame) );
|
||
|
|
|
||
|
|
if (tt_scsi_dma.dma_ctrl & 1)
|
||
|
|
{
|
||
|
|
/*
|
||
|
|
* Bus error while writing.
|
||
|
|
*/
|
||
|
|
|
||
|
|
if (frame->wb3s & WBV_040)
|
||
|
|
{
|
||
|
|
if (frame->wb3a == (long) &hades_psdm_reg)
|
||
|
|
start_addr--;
|
||
|
|
else
|
||
|
|
writeback(frame->wb3s, frame->wb3a,
|
||
|
|
frame->wb3d, &&scsi_bus_error);
|
||
|
|
}
|
||
|
|
|
||
|
|
if (frame->wb2s & WBV_040)
|
||
|
|
{
|
||
|
|
if (frame->wb2a == (long) &hades_psdm_reg)
|
||
|
|
start_addr--;
|
||
|
|
else
|
||
|
|
writeback(frame->wb2s, frame->wb2a,
|
||
|
|
frame->wb2d, &&scsi_bus_error);
|
||
|
|
}
|
||
|
|
|
||
|
|
if (frame->wb1s & WBV_040)
|
||
|
|
{
|
||
|
|
if (frame->wb1a == (long) &hades_psdm_reg)
|
||
|
|
start_addr--;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
/*
|
||
|
|
* Bus error while reading.
|
||
|
|
*/
|
||
|
|
|
||
|
|
if (frame->wb3s & WBV_040)
|
||
|
|
writeback(frame->wb3s, frame->wb3a,
|
||
|
|
frame->wb3d, &&scsi_bus_error);
|
||
|
|
}
|
||
|
|
|
||
|
|
eff_addr = (unsigned char *) frame->faddr;
|
||
|
|
|
||
|
|
__asm__ __volatile__ ("move.l %0,%%sp\n\t"
|
||
|
|
:
|
||
|
|
: "r" (save_sp) );
|
||
|
|
}
|
||
|
|
|
||
|
|
dma_cnt = end_addr - start_addr;
|
||
|
|
|
||
|
|
if (eff_addr == &hades_psdm_reg)
|
||
|
|
{
|
||
|
|
/*
|
||
|
|
* Bus error occurred while reading the pseudo
|
||
|
|
* DMA register. Time out.
|
||
|
|
*/
|
||
|
|
|
||
|
|
tries--;
|
||
|
|
|
||
|
|
if (tries <= 0)
|
||
|
|
{
|
||
|
|
if ((tt_scsi_dma.dma_ctrl & 1) == 0) /* Read or write? */
|
||
|
|
set_restdata_reg(start_addr);
|
||
|
|
|
||
|
|
if (dma_cnt <= 1)
|
||
|
|
printk(KERN_CRIT "DMA emulation: Fatal "
|
||
|
|
"error while %s the last byte.\n",
|
||
|
|
(tt_scsi_dma.dma_ctrl & 1)
|
||
|
|
? "writing" : "reading");
|
||
|
|
|
||
|
|
goto scsi_end;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
goto scsi_loop;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
/*
|
||
|
|
* Bus error during pseudo DMA transfer.
|
||
|
|
* Terminate the DMA transfer.
|
||
|
|
*/
|
||
|
|
|
||
|
|
hades_dma_ctrl |= 3; /* Set EOP and bus error. */
|
||
|
|
if ((tt_scsi_dma.dma_ctrl & 1) == 0) /* Read or write? */
|
||
|
|
set_restdata_reg(start_addr);
|
||
|
|
goto scsi_end;
|
||
|
|
}
|
||
|
|
}
|