2005-04-16 16:20:36 -06:00
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/*
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* mmconfig.c - Low-level direct PCI config space access via MMCONFIG
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2007-02-02 09:48:22 -07:00
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*
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2005-04-16 16:20:36 -06:00
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* This is an 64bit optimized version that always keeps the full mmconfig
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* space mapped. This allows lockless config space operation.
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*/
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#include <linux/pci.h>
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#include <linux/init.h>
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2005-06-23 18:35:56 -06:00
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#include <linux/acpi.h>
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2005-12-12 23:17:11 -07:00
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#include <linux/bitmap.h>
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2006-04-07 11:49:30 -06:00
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#include <asm/e820.h>
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2005-04-16 16:20:36 -06:00
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#include "pci.h"
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2006-06-15 02:41:52 -06:00
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/* aperture is up to 256MB but BIOS may reserve less */
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#define MMCONFIG_APER_MIN (2 * 1024*1024)
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#define MMCONFIG_APER_MAX (256 * 1024*1024)
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2006-04-07 11:50:12 -06:00
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/* Verify the first 16 busses. We assume that systems with more busses
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get MCFG right. */
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2007-02-13 05:26:20 -07:00
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#define PCI_MMCFG_MAX_CHECK_BUS 16
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2005-12-12 23:17:11 -07:00
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2005-04-16 16:20:36 -06:00
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/* Static virtual mapping of the MMCONFIG aperture */
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2005-06-23 18:35:56 -06:00
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struct mmcfg_virt {
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2007-02-02 09:48:22 -07:00
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struct acpi_mcfg_allocation *cfg;
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2005-12-15 02:17:44 -07:00
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char __iomem *virt;
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2005-06-23 18:35:56 -06:00
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};
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static struct mmcfg_virt *pci_mmcfg_virt;
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2005-04-16 16:20:36 -06:00
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2007-02-13 05:26:20 -07:00
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static inline int mcfg_broken(void)
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{
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struct acpi_mcfg_allocation *cfg = &pci_mmcfg_config[0];
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/* Handle more broken MCFG tables on Asus etc.
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They only contain a single entry for bus 0-0. Assume
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this applies to all busses. */
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if (pci_mmcfg_config_num == 1 &&
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cfg->pci_segment_group_number == 0 &&
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(cfg->start_bus_number | cfg->end_bus_number) == 0)
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return 1;
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return 0;
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}
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static void __iomem *mcfg_ioremap(struct acpi_mcfg_allocation *cfg)
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{
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void __iomem *addr;
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u32 size;
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if (mcfg_broken())
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size = 256 << 20;
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else
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size = (cfg->end_bus_number + 1) << 20;
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addr = ioremap_nocache(cfg->base_address, size);
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if (addr) {
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printk(KERN_INFO "PCI: Using MMCONFIG at %x - %x\n",
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cfg->base_address,
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cfg->base_address + size - 1);
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}
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return addr;
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}
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2005-12-15 02:17:44 -07:00
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static char __iomem *get_virt(unsigned int seg, unsigned bus)
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2005-04-16 16:20:36 -06:00
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{
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2005-06-23 18:35:56 -06:00
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int cfg_num = -1;
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2007-02-02 09:48:22 -07:00
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struct acpi_mcfg_allocation *cfg;
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2005-06-23 18:35:56 -06:00
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while (1) {
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++cfg_num;
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2006-01-26 18:03:50 -07:00
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if (cfg_num >= pci_mmcfg_config_num)
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break;
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2005-06-23 18:35:56 -06:00
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cfg = pci_mmcfg_virt[cfg_num].cfg;
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2007-02-02 09:48:22 -07:00
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if (cfg->pci_segment != seg)
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2005-06-23 18:35:56 -06:00
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continue;
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if ((cfg->start_bus_number <= bus) &&
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(cfg->end_bus_number >= bus))
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return pci_mmcfg_virt[cfg_num].virt;
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}
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2006-01-26 18:03:50 -07:00
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2007-02-13 05:26:20 -07:00
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if (mcfg_broken())
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2006-02-03 13:51:29 -07:00
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return pci_mmcfg_virt[0].virt;
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2006-01-26 18:03:50 -07:00
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/* Fall back to type 0 */
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2006-02-03 18:28:01 -07:00
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return NULL;
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2005-06-23 18:35:56 -06:00
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}
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2005-12-15 02:17:44 -07:00
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static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
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2005-06-23 18:35:56 -06:00
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{
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2005-12-15 02:17:44 -07:00
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char __iomem *addr;
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2007-02-13 05:26:20 -07:00
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if (seg == 0 && bus < PCI_MMCFG_MAX_CHECK_BUS &&
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test_bit(32*bus + PCI_SLOT(devfn), pci_mmcfg_fallback_slots))
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2005-12-12 23:17:11 -07:00
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return NULL;
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addr = get_virt(seg, bus);
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2005-12-12 23:17:10 -07:00
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if (!addr)
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return NULL;
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return addr + ((bus << 20) | (devfn << 12));
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2005-04-16 16:20:36 -06:00
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}
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static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 *value)
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{
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2005-12-15 02:17:44 -07:00
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char __iomem *addr;
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2005-04-16 16:20:36 -06:00
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2005-12-12 23:17:10 -07:00
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/* Why do we have this when nobody checks it. How about a BUG()!? -AK */
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2006-04-11 04:54:48 -06:00
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if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) {
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2006-04-07 11:50:15 -06:00
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*value = -1;
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2005-04-16 16:20:36 -06:00
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return -EINVAL;
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2006-04-07 11:50:15 -06:00
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}
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2005-04-16 16:20:36 -06:00
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2005-12-12 23:17:10 -07:00
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addr = pci_dev_base(seg, bus, devfn);
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if (!addr)
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return pci_conf1_read(seg,bus,devfn,reg,len,value);
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2005-04-16 16:20:36 -06:00
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switch (len) {
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case 1:
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*value = readb(addr + reg);
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break;
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case 2:
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*value = readw(addr + reg);
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break;
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case 4:
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*value = readl(addr + reg);
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break;
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}
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return 0;
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}
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static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 value)
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{
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2005-12-15 02:17:44 -07:00
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char __iomem *addr;
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2005-04-16 16:20:36 -06:00
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2005-12-12 23:17:10 -07:00
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/* Why do we have this when nobody checks it. How about a BUG()!? -AK */
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2005-04-16 16:20:36 -06:00
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if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))
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return -EINVAL;
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2005-12-12 23:17:10 -07:00
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addr = pci_dev_base(seg, bus, devfn);
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if (!addr)
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return pci_conf1_write(seg,bus,devfn,reg,len,value);
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2005-04-16 16:20:36 -06:00
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switch (len) {
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case 1:
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writeb(value, addr + reg);
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break;
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case 2:
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writew(value, addr + reg);
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break;
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case 4:
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writel(value, addr + reg);
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break;
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}
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return 0;
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}
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static struct pci_raw_ops pci_mmcfg = {
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.read = pci_mmcfg_read,
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.write = pci_mmcfg_write,
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};
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2007-02-13 05:26:20 -07:00
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int __init pci_mmcfg_arch_init(void)
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2005-04-16 16:20:36 -06:00
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{
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2005-06-23 18:35:56 -06:00
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int i;
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2007-02-13 05:26:20 -07:00
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pci_mmcfg_virt = kmalloc(sizeof(*pci_mmcfg_virt) *
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pci_mmcfg_config_num, GFP_KERNEL);
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2005-06-23 18:35:56 -06:00
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if (pci_mmcfg_virt == NULL) {
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2006-10-20 15:45:33 -06:00
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printk(KERN_ERR "PCI: Can not allocate memory for mmconfig structures\n");
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2007-02-13 05:26:20 -07:00
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return 0;
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2005-06-23 18:35:56 -06:00
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}
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2007-02-13 05:26:20 -07:00
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2005-06-23 18:35:56 -06:00
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for (i = 0; i < pci_mmcfg_config_num; ++i) {
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pci_mmcfg_virt[i].cfg = &pci_mmcfg_config[i];
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2007-02-13 05:26:20 -07:00
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pci_mmcfg_virt[i].virt = mcfg_ioremap(&pci_mmcfg_config[i]);
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2005-06-23 18:35:56 -06:00
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if (!pci_mmcfg_virt[i].virt) {
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2006-10-20 15:45:33 -06:00
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printk(KERN_ERR "PCI: Cannot map mmconfig aperture for "
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"segment %d\n",
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2007-02-02 09:48:22 -07:00
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pci_mmcfg_config[i].pci_segment);
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2007-02-13 05:26:20 -07:00
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return 0;
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2005-06-23 18:35:56 -06:00
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}
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}
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2005-04-16 16:20:36 -06:00
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raw_pci_ops = &pci_mmcfg;
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2007-02-13 05:26:20 -07:00
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return 1;
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2005-04-16 16:20:36 -06:00
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}
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