2012-10-25 10:41:39 -06:00
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/*
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* Copyright 2010-2011 Calxeda, Inc.
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* Copyright 2012 Pavel Machek <pavel@denx.de>
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* Based on platsmp.c, Copyright (C) 2002 ARM Ltd.
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* Copyright (C) 2012 Altera Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_scu.h>
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#include <asm/smp_plat.h>
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#include "core.h"
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2013-06-17 13:43:14 -06:00
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static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
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2012-10-25 10:41:39 -06:00
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{
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int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
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arm: socfpga: fix fetching cpu1start_addr for SMP
When CPU1 is brought out of reset, it's MMU is not turned on yet, so it will
only be able to use physical addresses. For systems with that have the
MMU page configured for 0xC0000000, 0x80000000, or 0x40000000
"BIC 0x40000000" will work just fine, as it was just converting the
virtual address of &cpu1start_addr into a physical address, ie. 0xC0000000
became 0x80000000. So for systems where the SDRAM controller was able to do a
wrap-around access, this was working fine, as it was just dropping the MSB,
but for systems where out of bounds memory access is not allowed, this would
not allow CPU1 to correctly fetch &cpu1start_addr.
This patch fixes the secondary_trampoline code to correctly fetch the
physical address of cpu1start_addr directly. The patch will subtract the
correct PAGE_OFFSET from &cpu1start_addr. And since on this platform, the
physical memory will always start at 0x0, subtracting PAGE_OFFSET from
&cpu1start_addr will allow CPU1 to correctly fetch the value of cpu1start_addr.
While at it, change the name of cpu1start_addr to socfpga_cpu1start_addr
to avoid any future naming collisions for multiplatform image.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v4: Updated commit log to correctly lay out the usage of PAGE_OFFSET and
add comments to the same effect.
v3: Used PAGE_OFFSET to get the physical address
v2: Correctly get the physical address instead of just a BIC hack.
2014-10-01 04:44:48 -06:00
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if (socfpga_cpu1start_addr) {
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2014-10-14 13:33:38 -06:00
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/* This will put CPU #1 into reset. */
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writel(RSTMGR_MPUMODRST_CPU1,
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rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST);
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2013-02-11 16:30:33 -07:00
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memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
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2012-10-25 10:41:39 -06:00
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2017-01-14 19:59:29 -07:00
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writel(__pa_symbol(secondary_startup),
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2014-10-14 13:33:38 -06:00
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sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff));
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2012-10-25 10:41:39 -06:00
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2013-02-11 16:30:33 -07:00
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flush_cache_all();
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smp_wmb();
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outer_clean_range(0, trampoline_size);
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2012-10-25 10:41:39 -06:00
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2014-10-14 13:33:38 -06:00
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/* This will release CPU #1 out of reset. */
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writel(0, rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST);
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2013-02-11 16:30:33 -07:00
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}
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2012-10-25 10:41:39 -06:00
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return 0;
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}
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2015-06-02 20:14:02 -06:00
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static int socfpga_a10_boot_secondary(unsigned int cpu, struct task_struct *idle)
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2012-10-25 10:41:39 -06:00
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{
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2015-06-02 20:14:02 -06:00
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int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
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2012-10-25 10:41:39 -06:00
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2015-06-02 20:14:02 -06:00
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if (socfpga_cpu1start_addr) {
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writel(RSTMGR_MPUMODRST_CPU1, rst_manager_base_addr +
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SOCFPGA_A10_RSTMGR_MODMPURST);
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memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
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2012-10-25 10:41:39 -06:00
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2017-01-14 19:59:29 -07:00
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writel(__pa_symbol(secondary_startup),
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2015-06-02 20:14:02 -06:00
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sys_manager_base_addr + (socfpga_cpu1start_addr & 0x00000fff));
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2012-10-25 10:41:39 -06:00
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2015-06-02 20:14:02 -06:00
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flush_cache_all();
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smp_wmb();
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outer_clean_range(0, trampoline_size);
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/* This will release CPU #1 out of reset. */
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writel(0, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_MODMPURST);
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2012-10-25 10:41:39 -06:00
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}
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2015-06-02 20:14:02 -06:00
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return 0;
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2012-10-25 10:41:39 -06:00
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}
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static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)
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{
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2015-05-12 15:49:21 -06:00
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struct device_node *np;
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void __iomem *socfpga_scu_base_addr;
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2012-10-25 10:41:39 -06:00
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2015-05-12 15:49:21 -06:00
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np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
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if (!np) {
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pr_err("%s: missing scu\n", __func__);
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return;
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2012-10-25 10:41:39 -06:00
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}
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2015-05-12 15:49:21 -06:00
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socfpga_scu_base_addr = of_iomap(np, 0);
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if (!socfpga_scu_base_addr)
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return;
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2012-10-25 10:41:39 -06:00
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scu_enable(socfpga_scu_base_addr);
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}
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2016-02-23 07:08:42 -07:00
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#ifdef CONFIG_HOTPLUG_CPU
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2012-10-25 10:41:39 -06:00
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/*
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* platform-specific code to shutdown a CPU
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*
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* Called with IRQs disabled
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*/
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static void socfpga_cpu_die(unsigned int cpu)
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{
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2014-10-14 13:33:38 -06:00
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/* Do WFI. If we wake up early, go back into WFI */
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while (1)
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cpu_do_idle();
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2012-10-25 10:41:39 -06:00
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}
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2015-06-10 01:47:19 -06:00
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/*
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* We need a dummy function so that platform_can_cpu_hotplug() knows
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* we support CPU hotplug. However, the function does not need to do
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* anything, because CPUs going offline just do WFI. We could reset
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* the CPUs but it would increase power consumption.
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*/
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static int socfpga_cpu_kill(unsigned int cpu)
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{
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return 1;
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}
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2016-02-23 07:08:42 -07:00
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#endif
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2015-06-10 01:47:19 -06:00
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2015-11-14 18:39:53 -07:00
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static const struct smp_operations socfpga_smp_ops __initconst = {
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2012-10-25 10:41:39 -06:00
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.smp_prepare_cpus = socfpga_smp_prepare_cpus,
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.smp_boot_secondary = socfpga_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = socfpga_cpu_die,
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2015-06-10 01:47:19 -06:00
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.cpu_kill = socfpga_cpu_kill,
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2012-10-25 10:41:39 -06:00
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#endif
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};
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2015-06-02 20:14:01 -06:00
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2015-11-14 18:39:53 -07:00
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static const struct smp_operations socfpga_a10_smp_ops __initconst = {
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2015-06-02 20:14:02 -06:00
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.smp_prepare_cpus = socfpga_smp_prepare_cpus,
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.smp_boot_secondary = socfpga_a10_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = socfpga_cpu_die,
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2015-06-10 01:47:19 -06:00
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.cpu_kill = socfpga_cpu_kill,
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2015-06-02 20:14:02 -06:00
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#endif
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};
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2015-06-02 20:14:01 -06:00
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CPU_METHOD_OF_DECLARE(socfpga_smp, "altr,socfpga-smp", &socfpga_smp_ops);
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2015-06-02 20:14:02 -06:00
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CPU_METHOD_OF_DECLARE(socfpga_a10_smp, "altr,socfpga-a10-smp", &socfpga_a10_smp_ops);
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