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kernel-fxtec-pro1x/arch/arm/mm/proc-arm9tdmi.S

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[ARM] nommu: add ARM9TDMI core support This patch adds ARM9TDMI core support which has no cache and no CP15 register(no memory control unit). Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-09-26 02:38:05 -06:00
/*
* linux/arch/arm/mm/proc-arm9tdmi.S: utility functions for ARM9TDMI
*
* Copyright (C) 2003-2006 Hyok S. Choi <hyok.choi@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
[ARM] Don't include asm/elf.h in asm code asm code really wants asm/hwcap.h, so include that instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-07 12:15:31 -06:00
#include <asm/hwcap.h>
[ARM] nommu: add ARM9TDMI core support This patch adds ARM9TDMI core support which has no cache and no CP15 register(no memory control unit). Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-09-26 02:38:05 -06:00
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
.text
/*
* cpu_arm9tdmi_proc_init()
* cpu_arm9tdmi_do_idle()
* cpu_arm9tdmi_dcache_clean_area()
* cpu_arm9tdmi_switch_mm()
*
* These are not required.
*/
ENTRY(cpu_arm9tdmi_proc_init)
ENTRY(cpu_arm9tdmi_do_idle)
ENTRY(cpu_arm9tdmi_dcache_clean_area)
ENTRY(cpu_arm9tdmi_switch_mm)
mov pc, lr
/*
* cpu_arm9tdmi_proc_fin()
*/
ENTRY(cpu_arm9tdmi_proc_fin)
mov pc, lr
/*
* Function: cpu_arm9tdmi_reset(loc)
* Params : loc(r0) address to jump to
* Purpose : Sets up everything for a reset and jump to the location for soft reset.
*/
ENTRY(cpu_arm9tdmi_reset)
mov pc, r0
ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type When hotplug CPU is enabled, we need to keep the list of supported CPUs, their setup functions, and __lookup_processor_type in place so that we can find and initialize secondary CPUs. Move these into the __CPUINIT section. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-01 08:37:05 -06:00
__CPUINIT
[ARM] nommu: add ARM9TDMI core support This patch adds ARM9TDMI core support which has no cache and no CP15 register(no memory control unit). Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-09-26 02:38:05 -06:00
.type __arm9tdmi_setup, #function
__arm9tdmi_setup:
mov pc, lr
.size __arm9tdmi_setup, . - __arm9tdmi_setup
__INITDATA
/*
* Purpose : Function pointers used to access above functions - all calls
* come through these
*/
.type arm9tdmi_processor_functions, #object
ENTRY(arm9tdmi_processor_functions)
[ARM] nommu: abort handler fixup for !CPU_CP15_MMU cores. There is no FSR/FAR register on no-CP15 or MPU cores. This patch adds a dummy abort handler which returns zero for the base restored Data Abort model !CPU_CP15_MMU cores. The abort-lv4t.S is still used with the fix-up for the base updated Data Abort model cores. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-09-28 06:46:16 -06:00
.word nommu_early_abort
ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() Instruction fault status register, IFSR, was introduced on ARMv6 to provide status information about the last insturction fault. It needed for proper prefetch abort handling. Now we have three prefetch abort model: * legacy - for CPUs before ARMv6. They doesn't provide neither IFSR nor IFAR. We simulate IFSR with section translation fault status for them to generalize code; * ARMv6 - provides IFSR, but not IFAR; * ARMv7 - provides both IFSR and IFAR. Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-09-25 06:39:47 -06:00
.word legacy_pabort
[ARM] nommu: add ARM9TDMI core support This patch adds ARM9TDMI core support which has no cache and no CP15 register(no memory control unit). Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-09-26 02:38:05 -06:00
.word cpu_arm9tdmi_proc_init
.word cpu_arm9tdmi_proc_fin
.word cpu_arm9tdmi_reset
.word cpu_arm9tdmi_do_idle
.word cpu_arm9tdmi_dcache_clean_area
.word cpu_arm9tdmi_switch_mm
.word 0 @ cpu_*_set_pte
.size arm9tdmi_processor_functions, . - arm9tdmi_processor_functions
.section ".rodata"
.type cpu_arch_name, #object
cpu_arch_name:
.asciz "armv4t"
.size cpu_arch_name, . - cpu_arch_name
.type cpu_elf_name, #object
cpu_elf_name:
.asciz "v4"
.size cpu_elf_name, . - cpu_elf_name
.type cpu_arm9tdmi_name, #object
cpu_arm9tdmi_name:
.asciz "ARM9TDMI"
.size cpu_arm9tdmi_name, . - cpu_arm9tdmi_name
.type cpu_p2001_name, #object
cpu_p2001_name:
.asciz "P2001"
.size cpu_p2001_name, . - cpu_p2001_name
.align
.section ".proc.info.init", #alloc, #execinstr
.type __arm9tdmi_proc_info, #object
__arm9tdmi_proc_info:
.long 0x41009900
.long 0xfff8ff00
.long 0
.long 0
b __arm9tdmi_setup
.long cpu_arch_name
.long cpu_elf_name
.long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
.long cpu_arm9tdmi_name
.long arm9tdmi_processor_functions
.long 0
.long 0
.long v4_cache_fns
.size __arm9tdmi_proc_info, . - __arm9dmi_proc_info
.type __p2001_proc_info, #object
__p2001_proc_info:
.long 0x41029000
.long 0xffffffff
.long 0
.long 0
b __arm9tdmi_setup
.long cpu_arch_name
.long cpu_elf_name
.long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
.long cpu_p2001_name
.long arm9tdmi_processor_functions
.long 0
.long 0
.long v4_cache_fns
.size __p2001_proc_info, . - __p2001_proc_info
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