2007-07-09 10:51:59 -06:00
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#include <linux/sched.h>
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2006-06-26 01:25:12 -06:00
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#include <linux/clocksource.h>
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2006-06-26 01:25:10 -06:00
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#include <linux/workqueue.h>
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#include <linux/cpufreq.h>
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#include <linux/jiffies.h>
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#include <linux/init.h>
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2006-06-26 01:25:12 -06:00
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#include <linux/dmi.h>
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2006-06-26 01:25:10 -06:00
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2006-06-26 01:25:12 -06:00
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#include <asm/delay.h>
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2006-06-26 01:25:10 -06:00
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#include <asm/tsc.h>
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#include <asm/io.h>
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2007-03-05 01:30:35 -07:00
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#include <asm/timer.h>
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2006-06-26 01:25:10 -06:00
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#include "mach_timer.h"
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2007-03-24 16:02:49 -06:00
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static int tsc_enabled;
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2006-06-26 01:25:10 -06:00
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/*
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* On some systems the TSC frequency does not
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* change with the cpu frequency. So we need
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* an extra value to store the TSC freq
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*/
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unsigned int tsc_khz;
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2007-07-19 02:49:23 -06:00
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EXPORT_SYMBOL_GPL(tsc_khz);
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2006-06-26 01:25:10 -06:00
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2007-01-11 00:15:36 -07:00
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int tsc_disable;
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2006-06-26 01:25:10 -06:00
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#ifdef CONFIG_X86_TSC
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static int __init tsc_setup(char *str)
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{
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printk(KERN_WARNING "notsc: Kernel compiled with CONFIG_X86_TSC, "
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"cannot disable TSC.\n");
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return 1;
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}
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#else
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/*
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* disable flag for tsc. Takes effect by clearing the TSC cpu flag
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* in cpu/common.c
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*/
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static int __init tsc_setup(char *str)
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{
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tsc_disable = 1;
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return 1;
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}
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#endif
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__setup("notsc", tsc_setup);
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/*
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* code to mark and check if the TSC is unstable
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* due to cpufreq or due to unsynced TSCs
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*/
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static int tsc_unstable;
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2007-07-19 02:49:23 -06:00
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int check_tsc_unstable(void)
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2006-06-26 01:25:10 -06:00
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{
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return tsc_unstable;
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}
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2007-07-19 02:49:23 -06:00
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EXPORT_SYMBOL_GPL(check_tsc_unstable);
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2006-06-26 01:25:10 -06:00
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2007-10-19 17:13:56 -06:00
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/* Accelerators for sched_clock()
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2006-06-26 01:25:10 -06:00
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* convert from cycles(64bits) => nanoseconds (64bits)
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* basic equation:
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* ns = cycles / (freq / ns_per_sec)
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* ns = cycles * (ns_per_sec / freq)
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* ns = cycles * (10^9 / (cpu_khz * 10^3))
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* ns = cycles * (10^6 / cpu_khz)
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*
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* Then we use scaling math (suggested by george@mvista.com) to get:
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* ns = cycles * (10^6 * SC / cpu_khz) / SC
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* ns = cycles * cyc2ns_scale / SC
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*
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* And since SC is a constant power of two, we can convert the div
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* into a shift.
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*
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2007-10-19 18:23:49 -06:00
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* We can use khz divisor instead of mhz to keep a better precision, since
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2006-06-26 01:25:10 -06:00
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* cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
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* (mathieu.desnoyers@polymtl.ca)
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*
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* -johnstul@us.ibm.com "math is hard, lets go shopping!"
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*/
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2007-07-17 19:37:04 -06:00
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unsigned long cyc2ns_scale __read_mostly;
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2006-06-26 01:25:10 -06:00
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#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
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static inline void set_cyc2ns_scale(unsigned long cpu_khz)
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{
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cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
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}
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/*
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* Scheduler clock - returns current time in nanosec units.
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*/
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2007-07-17 19:37:04 -06:00
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unsigned long long native_sched_clock(void)
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2006-06-26 01:25:10 -06:00
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{
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unsigned long long this_offset;
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/*
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2007-02-13 05:26:22 -07:00
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* Fall back to jiffies if there's no TSC available:
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2007-07-09 10:51:59 -06:00
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* ( But note that we still use it if the TSC is marked
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* unstable. We do this because unlike Time Of Day,
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* the scheduler clock tolerates small errors and it's
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* very important for it to be as fast as the platform
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* can achive it. )
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2006-06-26 01:25:10 -06:00
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*/
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2007-07-09 10:51:59 -06:00
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if (unlikely(!tsc_enabled && !tsc_unstable))
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2007-02-13 05:26:22 -07:00
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/* No locking but a rare wrong value is not a big deal: */
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2006-06-26 01:25:10 -06:00
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return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);
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/* read the Time Stamp Counter: */
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2007-07-17 19:37:04 -06:00
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rdtscll(this_offset);
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2006-06-26 01:25:10 -06:00
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/* return the value in ns */
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return cycles_2_ns(this_offset);
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}
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2007-07-17 19:37:04 -06:00
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/* We need to define a real function for sched_clock, to override the
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weak default version */
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#ifdef CONFIG_PARAVIRT
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unsigned long long sched_clock(void)
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{
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return paravirt_sched_clock();
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}
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#else
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unsigned long long sched_clock(void)
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__attribute__((alias("native_sched_clock")));
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#endif
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2007-03-05 01:30:36 -07:00
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unsigned long native_calculate_cpu_khz(void)
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2006-06-26 01:25:10 -06:00
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{
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unsigned long long start, end;
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unsigned long count;
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2007-10-23 14:37:22 -06:00
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u64 delta64 = (u64)ULLONG_MAX;
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2006-06-26 01:25:10 -06:00
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int i;
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unsigned long flags;
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local_irq_save(flags);
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/* run 3 times to ensure the cache is warm */
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for (i = 0; i < 3; i++) {
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mach_prepare_counter();
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rdtscll(start);
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mach_countup(&count);
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rdtscll(end);
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2007-10-23 14:37:22 -06:00
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delta64 = min(delta64, (end - start));
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2006-06-26 01:25:10 -06:00
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}
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/*
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* Error: ECTCNEVERSET
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* The CTC wasn't reliable: we got a hit on the very first read,
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* or the CPU was so fast/slow that the quotient wouldn't fit in
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* 32 bits..
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*/
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if (count <= 1)
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goto err;
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/* cpu freq too fast: */
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if (delta64 > (1ULL<<32))
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goto err;
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/* cpu freq too slow: */
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if (delta64 <= CALIBRATE_TIME_MSEC)
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goto err;
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delta64 += CALIBRATE_TIME_MSEC/2; /* round for do_div */
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do_div(delta64,CALIBRATE_TIME_MSEC);
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local_irq_restore(flags);
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return (unsigned long)delta64;
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err:
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local_irq_restore(flags);
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return 0;
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}
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int recalibrate_cpu_khz(void)
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{
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#ifndef CONFIG_SMP
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unsigned long cpu_khz_old = cpu_khz;
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if (cpu_has_tsc) {
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cpu_khz = calculate_cpu_khz();
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tsc_khz = cpu_khz;
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2007-10-19 12:35:04 -06:00
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cpu_data(0).loops_per_jiffy =
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cpufreq_scale(cpu_data(0).loops_per_jiffy,
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2006-06-26 01:25:10 -06:00
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cpu_khz_old, cpu_khz);
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return 0;
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} else
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return -ENODEV;
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#else
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return -ENODEV;
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#endif
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}
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EXPORT_SYMBOL(recalibrate_cpu_khz);
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#ifdef CONFIG_CPU_FREQ
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/*
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* if the CPU frequency is scaled, TSC-based delays will need a different
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* loops_per_jiffy value to function properly.
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*/
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static unsigned int ref_freq = 0;
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static unsigned long loops_per_jiffy_ref = 0;
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static unsigned long cpu_khz_ref = 0;
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static int
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time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
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{
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struct cpufreq_freqs *freq = data;
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if (!ref_freq) {
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if (!freq->old){
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ref_freq = freq->new;
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2007-05-02 11:27:18 -06:00
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return 0;
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2006-06-26 01:25:10 -06:00
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}
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ref_freq = freq->old;
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2007-10-19 12:35:04 -06:00
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loops_per_jiffy_ref = cpu_data(freq->cpu).loops_per_jiffy;
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2006-06-26 01:25:10 -06:00
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cpu_khz_ref = cpu_khz;
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}
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if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
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(val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
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(val == CPUFREQ_RESUMECHANGE)) {
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if (!(freq->flags & CPUFREQ_CONST_LOOPS))
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2007-10-19 12:35:04 -06:00
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cpu_data(freq->cpu).loops_per_jiffy =
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2006-06-26 01:25:10 -06:00
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cpufreq_scale(loops_per_jiffy_ref,
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ref_freq, freq->new);
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if (cpu_khz) {
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if (num_online_cpus() == 1)
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cpu_khz = cpufreq_scale(cpu_khz_ref,
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ref_freq, freq->new);
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if (!(freq->flags & CPUFREQ_CONST_LOOPS)) {
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tsc_khz = cpu_khz;
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set_cyc2ns_scale(cpu_khz);
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/*
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* TSC based sched_clock turns
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* to junk w/ cpufreq
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*/
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2007-05-02 11:27:08 -06:00
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mark_tsc_unstable("cpufreq changes");
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2006-06-26 01:25:10 -06:00
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}
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}
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}
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return 0;
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}
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static struct notifier_block time_cpufreq_notifier_block = {
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.notifier_call = time_cpufreq_notifier
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};
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static int __init cpufreq_tsc(void)
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{
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2007-02-16 02:27:32 -07:00
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return cpufreq_register_notifier(&time_cpufreq_notifier_block,
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CPUFREQ_TRANSITION_NOTIFIER);
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2006-06-26 01:25:10 -06:00
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}
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core_initcall(cpufreq_tsc);
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#endif
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2006-06-26 01:25:12 -06:00
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/* clock source code */
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static unsigned long current_tsc_khz = 0;
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static cycle_t read_tsc(void)
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{
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cycle_t ret;
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rdtscll(ret);
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return ret;
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}
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static struct clocksource clocksource_tsc = {
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.name = "tsc",
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.rating = 300,
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.read = read_tsc,
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2006-06-26 01:25:15 -06:00
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.mask = CLOCKSOURCE_MASK(64),
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2006-06-26 01:25:12 -06:00
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.mult = 0, /* to be set */
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.shift = 22,
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2007-02-16 02:27:36 -07:00
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.flags = CLOCK_SOURCE_IS_CONTINUOUS |
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CLOCK_SOURCE_MUST_VERIFY,
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2006-06-26 01:25:12 -06:00
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};
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2007-05-02 11:27:08 -06:00
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void mark_tsc_unstable(char *reason)
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2006-06-26 01:25:12 -06:00
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{
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2007-02-16 02:27:42 -07:00
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if (!tsc_unstable) {
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tsc_unstable = 1;
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2007-03-24 16:02:49 -06:00
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tsc_enabled = 0;
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2007-05-02 11:27:08 -06:00
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printk("Marking TSC unstable due to: %s.\n", reason);
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2007-02-16 02:27:42 -07:00
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/* Can be called before registration */
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if (clocksource_tsc.mult)
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clocksource_change_rating(&clocksource_tsc, 0);
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else
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clocksource_tsc.rating = 0;
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2006-06-26 01:25:12 -06:00
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}
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}
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2007-02-16 02:27:42 -07:00
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EXPORT_SYMBOL_GPL(mark_tsc_unstable);
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2006-06-26 01:25:12 -06:00
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2007-10-03 13:15:40 -06:00
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static int __init dmi_mark_tsc_unstable(const struct dmi_system_id *d)
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2006-06-26 01:25:12 -06:00
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{
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printk(KERN_NOTICE "%s detected: marking TSC unstable.\n",
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d->ident);
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2007-02-16 02:27:42 -07:00
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tsc_unstable = 1;
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2006-06-26 01:25:12 -06:00
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return 0;
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}
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/* List of systems that have known TSC problems */
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static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
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{
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.callback = dmi_mark_tsc_unstable,
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.ident = "IBM Thinkpad 380XD",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
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DMI_MATCH(DMI_BOARD_NAME, "2635FA0"),
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},
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},
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{}
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};
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/*
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* Make an educated guess if the TSC is trustworthy and synchronized
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* over all CPUs.
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*/
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2007-02-16 02:27:34 -07:00
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__cpuinit int unsynchronized_tsc(void)
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2006-06-26 01:25:12 -06:00
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{
|
2007-02-16 02:27:34 -07:00
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if (!cpu_has_tsc || tsc_unstable)
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return 1;
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2006-06-26 01:25:12 -06:00
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/*
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* Intel systems are normally all synchronized.
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* Exceptions must mark TSC as unstable:
|
|
|
|
*/
|
2007-02-16 02:27:42 -07:00
|
|
|
if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
|
|
|
|
/* assume multi socket systems are not synchronized: */
|
|
|
|
if (num_possible_cpus() > 1)
|
|
|
|
tsc_unstable = 1;
|
|
|
|
}
|
|
|
|
return tsc_unstable;
|
2006-06-26 01:25:12 -06:00
|
|
|
}
|
|
|
|
|
2007-02-16 02:27:44 -07:00
|
|
|
/*
|
|
|
|
* Geode_LX - the OLPC CPU has a possibly a very reliable TSC
|
|
|
|
*/
|
|
|
|
#ifdef CONFIG_MGEODE_LX
|
|
|
|
/* RTSC counts during suspend */
|
|
|
|
#define RTSC_SUSP 0x100
|
|
|
|
|
|
|
|
static void __init check_geode_tsc_reliable(void)
|
|
|
|
{
|
2007-10-17 10:04:34 -06:00
|
|
|
unsigned long res_low, res_high;
|
2007-02-16 02:27:44 -07:00
|
|
|
|
2007-10-17 10:04:34 -06:00
|
|
|
rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high);
|
|
|
|
if (res_low & RTSC_SUSP)
|
2007-02-16 02:27:44 -07:00
|
|
|
clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static inline void check_geode_tsc_reliable(void) { }
|
|
|
|
#endif
|
|
|
|
|
2007-03-05 01:30:50 -07:00
|
|
|
|
|
|
|
void __init tsc_init(void)
|
2006-06-26 01:25:12 -06:00
|
|
|
{
|
2007-03-05 01:30:50 -07:00
|
|
|
if (!cpu_has_tsc || tsc_disable)
|
|
|
|
goto out_no_tsc;
|
2006-06-26 01:25:12 -06:00
|
|
|
|
2007-03-05 01:30:50 -07:00
|
|
|
cpu_khz = calculate_cpu_khz();
|
|
|
|
tsc_khz = cpu_khz;
|
2006-06-26 01:25:12 -06:00
|
|
|
|
2007-03-05 01:30:50 -07:00
|
|
|
if (!cpu_khz)
|
|
|
|
goto out_no_tsc;
|
2006-06-26 01:25:12 -06:00
|
|
|
|
2007-03-05 01:30:50 -07:00
|
|
|
printk("Detected %lu.%03lu MHz processor.\n",
|
|
|
|
(unsigned long)cpu_khz / 1000,
|
|
|
|
(unsigned long)cpu_khz % 1000);
|
|
|
|
|
|
|
|
set_cyc2ns_scale(cpu_khz);
|
|
|
|
use_tsc_delay();
|
|
|
|
|
|
|
|
/* Check and install the TSC clocksource */
|
|
|
|
dmi_check_system(bad_tsc_dmi_table);
|
|
|
|
|
|
|
|
unsynchronized_tsc();
|
|
|
|
check_geode_tsc_reliable();
|
|
|
|
current_tsc_khz = tsc_khz;
|
|
|
|
clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz,
|
|
|
|
clocksource_tsc.shift);
|
|
|
|
/* lower the rating if we already know its unstable: */
|
|
|
|
if (check_tsc_unstable()) {
|
|
|
|
clocksource_tsc.rating = 0;
|
|
|
|
clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
|
2007-03-24 16:02:49 -06:00
|
|
|
} else
|
|
|
|
tsc_enabled = 1;
|
|
|
|
|
2007-03-05 01:30:50 -07:00
|
|
|
clocksource_register(&clocksource_tsc);
|
2006-06-26 01:25:12 -06:00
|
|
|
|
2007-03-05 01:30:50 -07:00
|
|
|
return;
|
2006-06-26 01:25:12 -06:00
|
|
|
|
2007-03-05 01:30:50 -07:00
|
|
|
out_no_tsc:
|
|
|
|
/*
|
|
|
|
* Set the tsc_disable flag if there's no TSC support, this
|
|
|
|
* makes it a fast flag for the kernel to see whether it
|
|
|
|
* should be using the TSC.
|
|
|
|
*/
|
|
|
|
tsc_disable = 1;
|
|
|
|
}
|