Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-22 21:56:01 -06:00
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/*
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* drivers/net/ibm_newemac/tah.h
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*
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* Driver for PowerPC 4xx on-chip ethernet controller, TAH support.
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*
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2007-12-04 17:14:33 -07:00
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* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
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* <benh@kernel.crashing.org>
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*
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* Based on the arch/ppc version of the driver:
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*
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Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-22 21:56:01 -06:00
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* Copyright 2004 MontaVista Software, Inc.
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* Matt Porter <mporter@kernel.crashing.org>
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*
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* Copyright (c) 2005 Eugene Surovegin <ebs@ebshome.net>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __IBM_NEWEMAC_TAH_H
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#define __IBM_NEWEMAC_TAH_H
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/* TAH */
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struct tah_regs {
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u32 revid;
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u32 pad[3];
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u32 mr;
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u32 ssr0;
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u32 ssr1;
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u32 ssr2;
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u32 ssr3;
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u32 ssr4;
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u32 ssr5;
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u32 tsr;
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};
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/* TAH device */
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struct tah_instance {
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struct tah_regs __iomem *base;
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/* Only one EMAC whacks us at a time */
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struct mutex lock;
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/* number of EMACs using this TAH */
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int users;
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/* OF device instance */
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struct of_device *ofdev;
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};
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/* TAH engine */
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#define TAH_MR_CVR 0x80000000
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#define TAH_MR_SR 0x40000000
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#define TAH_MR_ST_256 0x01000000
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#define TAH_MR_ST_512 0x02000000
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#define TAH_MR_ST_768 0x03000000
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#define TAH_MR_ST_1024 0x04000000
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#define TAH_MR_ST_1280 0x05000000
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#define TAH_MR_ST_1536 0x06000000
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#define TAH_MR_TFS_16KB 0x00000000
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#define TAH_MR_TFS_2KB 0x00200000
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#define TAH_MR_TFS_4KB 0x00400000
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#define TAH_MR_TFS_6KB 0x00600000
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#define TAH_MR_TFS_8KB 0x00800000
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#define TAH_MR_TFS_10KB 0x00a00000
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#define TAH_MR_DTFP 0x00100000
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#define TAH_MR_DIG 0x00080000
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#ifdef CONFIG_IBM_NEW_EMAC_TAH
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extern int tah_init(void);
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extern void tah_exit(void);
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extern int tah_attach(struct of_device *ofdev, int channel);
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extern void tah_detach(struct of_device *ofdev, int channel);
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extern void tah_reset(struct of_device *ofdev);
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extern int tah_get_regs_len(struct of_device *ofdev);
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extern void *tah_dump_regs(struct of_device *ofdev, void *buf);
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#else
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# define tah_init() 0
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# define tah_exit() do { } while(0)
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# define tah_attach(x,y) (-ENXIO)
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# define tah_detach(x,y) do { } while(0)
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# define tah_reset(x) do { } while(0)
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# define tah_get_regs_len(x) 0
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# define tah_dump_regs(x,buf) (buf)
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#endif /* !CONFIG_IBM_NEW_EMAC_TAH */
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#endif /* __IBM_NEWEMAC_TAH_H */
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