2005-04-16 16:20:36 -06:00
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/*
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* Copyright (C) 1995 Linus Torvalds
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*/
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/*
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* This file handles the architecture-dependent parts of initialization
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/user.h>
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#include <linux/a.out.h>
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2006-07-10 05:44:13 -06:00
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#include <linux/screen_info.h>
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2005-04-16 16:20:36 -06:00
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#include <linux/ioport.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/initrd.h>
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#include <linux/highmem.h>
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#include <linux/bootmem.h>
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#include <linux/module.h>
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#include <asm/processor.h>
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#include <linux/console.h>
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#include <linux/seq_file.h>
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2006-01-09 21:51:47 -07:00
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#include <linux/crash_dump.h>
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2005-04-16 16:20:36 -06:00
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#include <linux/root_dev.h>
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#include <linux/pci.h>
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#include <linux/acpi.h>
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#include <linux/kallsyms.h>
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#include <linux/edd.h>
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2005-06-23 01:08:07 -06:00
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#include <linux/mmzone.h>
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2005-06-25 15:58:04 -06:00
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#include <linux/kexec.h>
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2005-12-02 11:43:20 -07:00
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#include <linux/cpufreq.h>
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2006-01-11 14:43:33 -07:00
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#include <linux/dmi.h>
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2006-01-11 14:44:42 -07:00
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#include <linux/dma-mapping.h>
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2006-03-25 08:29:46 -07:00
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#include <linux/ctype.h>
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2005-06-23 01:08:07 -06:00
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2005-04-16 16:20:36 -06:00
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#include <asm/mtrr.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/smp.h>
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#include <asm/msr.h>
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#include <asm/desc.h>
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#include <video/edid.h>
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#include <asm/e820.h>
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#include <asm/dma.h>
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#include <asm/mpspec.h>
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#include <asm/mmu_context.h>
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#include <asm/bootsetup.h>
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#include <asm/proto.h>
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#include <asm/setup.h>
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#include <asm/mach_apic.h>
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#include <asm/numa.h>
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2005-11-05 09:25:53 -07:00
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#include <asm/sections.h>
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2006-03-25 08:30:22 -07:00
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#include <asm/dmi.h>
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2005-04-16 16:20:36 -06:00
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/*
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* Machine setup..
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*/
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2005-09-06 16:17:45 -06:00
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struct cpuinfo_x86 boot_cpu_data __read_mostly;
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2006-06-26 05:59:44 -06:00
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EXPORT_SYMBOL(boot_cpu_data);
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2005-04-16 16:20:36 -06:00
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unsigned long mmu_cr4_features;
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/* Boot loader ID as an integer, for the benefit of proc_dointvec */
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int bootloader_type;
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unsigned long saved_video_mode;
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2007-05-02 11:27:12 -06:00
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int force_mwait __cpuinitdata;
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2006-03-25 08:30:22 -07:00
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/*
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* Early DMI memory
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*/
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int dmi_alloc_index;
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char dmi_alloc_data[DMI_MAX_DATA];
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2005-04-16 16:20:36 -06:00
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/*
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* Setup options
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*/
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struct screen_info screen_info;
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2006-06-26 05:59:44 -06:00
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EXPORT_SYMBOL(screen_info);
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2005-04-16 16:20:36 -06:00
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struct sys_desc_table_struct {
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unsigned short length;
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unsigned char table[0];
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};
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struct edid_info edid_info;
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2006-06-26 01:26:37 -06:00
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EXPORT_SYMBOL_GPL(edid_info);
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2005-04-16 16:20:36 -06:00
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extern int root_mountflags;
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2007-02-12 01:54:25 -07:00
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char __initdata command_line[COMMAND_LINE_SIZE];
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2005-04-16 16:20:36 -06:00
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struct resource standard_io_resources[] = {
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{ .name = "dma1", .start = 0x00, .end = 0x1f,
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.flags = IORESOURCE_BUSY | IORESOURCE_IO },
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{ .name = "pic1", .start = 0x20, .end = 0x21,
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.flags = IORESOURCE_BUSY | IORESOURCE_IO },
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{ .name = "timer0", .start = 0x40, .end = 0x43,
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.flags = IORESOURCE_BUSY | IORESOURCE_IO },
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{ .name = "timer1", .start = 0x50, .end = 0x53,
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.flags = IORESOURCE_BUSY | IORESOURCE_IO },
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{ .name = "keyboard", .start = 0x60, .end = 0x6f,
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.flags = IORESOURCE_BUSY | IORESOURCE_IO },
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{ .name = "dma page reg", .start = 0x80, .end = 0x8f,
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.flags = IORESOURCE_BUSY | IORESOURCE_IO },
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{ .name = "pic2", .start = 0xa0, .end = 0xa1,
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.flags = IORESOURCE_BUSY | IORESOURCE_IO },
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{ .name = "dma2", .start = 0xc0, .end = 0xdf,
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.flags = IORESOURCE_BUSY | IORESOURCE_IO },
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{ .name = "fpu", .start = 0xf0, .end = 0xff,
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.flags = IORESOURCE_BUSY | IORESOURCE_IO }
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};
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#define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
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struct resource data_resource = {
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.name = "Kernel data",
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_RAM,
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};
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struct resource code_resource = {
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.name = "Kernel code",
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_RAM,
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};
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2006-09-26 02:52:32 -06:00
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#ifdef CONFIG_PROC_VMCORE
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/* elfcorehdr= specifies the location of elf core header
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* stored by the crashed kernel. This option will be passed
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* by kexec loader to the capture kernel.
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*/
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static int __init setup_elfcorehdr(char *arg)
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2006-03-25 08:29:46 -07:00
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{
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2006-09-26 02:52:32 -06:00
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char *end;
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if (!arg)
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return -EINVAL;
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elfcorehdr_addr = memparse(arg, &end);
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return end > arg ? 0 : -EINVAL;
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2006-03-25 08:29:46 -07:00
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}
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2006-09-26 02:52:32 -06:00
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early_param("elfcorehdr", setup_elfcorehdr);
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2006-02-25 20:18:46 -07:00
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#endif
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2005-06-23 01:08:06 -06:00
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#ifndef CONFIG_NUMA
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2005-06-23 01:08:07 -06:00
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static void __init
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contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
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2005-04-16 16:20:36 -06:00
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{
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2005-06-23 01:08:07 -06:00
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unsigned long bootmap_size, bootmap;
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bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
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bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
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if (bootmap == -1L)
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panic("Cannot find bootmem map of size %ld\n",bootmap_size);
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bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
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2006-09-27 02:49:52 -06:00
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e820_register_active_regions(0, start_pfn, end_pfn);
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free_bootmem_with_active_regions(0, end_pfn);
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2005-06-23 01:08:07 -06:00
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reserve_bootmem(bootmap, bootmap_size);
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2005-04-16 16:20:36 -06:00
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}
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#endif
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#if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
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struct edd edd;
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#ifdef CONFIG_EDD_MODULE
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EXPORT_SYMBOL(edd);
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#endif
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/**
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* copy_edd() - Copy the BIOS EDD information
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* from boot_params into a safe place.
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*
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*/
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static inline void copy_edd(void)
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{
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memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
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memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
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edd.mbr_signature_nr = EDD_MBR_SIG_NR;
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edd.edd_info_nr = EDD_NR;
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}
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#else
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static inline void copy_edd(void)
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{
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}
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#endif
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#define EBDA_ADDR_POINTER 0x40E
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2006-05-08 07:17:28 -06:00
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unsigned __initdata ebda_addr;
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unsigned __initdata ebda_size;
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static void discover_ebda(void)
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2005-04-16 16:20:36 -06:00
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{
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2006-05-08 07:17:28 -06:00
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/*
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2005-04-16 16:20:36 -06:00
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* there is a real-mode segmented pointer pointing to the
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* 4K EBDA area at 0x40E
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*/
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2007-05-02 11:27:07 -06:00
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ebda_addr = *(unsigned short *)__va(EBDA_ADDR_POINTER);
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2006-05-08 07:17:28 -06:00
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ebda_addr <<= 4;
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2007-05-02 11:27:07 -06:00
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ebda_size = *(unsigned short *)__va(ebda_addr);
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2006-05-08 07:17:28 -06:00
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/* Round EBDA up to pages */
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if (ebda_size == 0)
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ebda_size = 1;
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ebda_size <<= 10;
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ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
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if (ebda_size > 64*1024)
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ebda_size = 64*1024;
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2005-04-16 16:20:36 -06:00
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}
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void __init setup_arch(char **cmdline_p)
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{
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2007-02-12 01:54:25 -07:00
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printk(KERN_INFO "Command line: %s\n", boot_command_line);
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2006-09-26 02:52:32 -06:00
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2005-04-16 16:20:36 -06:00
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ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
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screen_info = SCREEN_INFO;
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edid_info = EDID_INFO;
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saved_video_mode = SAVED_VIDEO_MODE;
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bootloader_type = LOADER_TYPE;
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#ifdef CONFIG_BLK_DEV_RAM
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rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
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rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
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rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
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#endif
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setup_memory_region();
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copy_edd();
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if (!MOUNT_ROOT_RDONLY)
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root_mountflags &= ~MS_RDONLY;
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init_mm.start_code = (unsigned long) &_text;
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init_mm.end_code = (unsigned long) &_etext;
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init_mm.end_data = (unsigned long) &_edata;
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init_mm.brk = (unsigned long) &_end;
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Revert "[PATCH] x86: __pa and __pa_symbol address space separation"
This was broken. It adds complexity, for no good reason. Rather than
separate __pa() and __pa_symbol(), we should deprecate __pa_symbol(),
and preferably __pa() too - and just use "virt_to_phys()" instead, which
is more readable and has nicer semantics.
However, right now, just undo the separation, and make __pa_symbol() be
the exact same as __pa(). That fixes the bugs this patch introduced,
and we can do the fairly obvious cleanups later.
Do the new __phys_addr() function (which is now the actual workhorse for
the unified __pa()/__pa_symbol()) as a real external function, that way
all the potential issues with compile/link-time optimizations of
constant symbol addresses go away, and we can also, if we choose to, add
more sanity-checking of the argument.
Cc: Eric W. Biederman <ebiederm@xmission.com>
Cc: Vivek Goyal <vgoyal@in.ibm.com>
Cc: Andi Kleen <ak@suse.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 09:44:24 -06:00
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code_resource.start = virt_to_phys(&_text);
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code_resource.end = virt_to_phys(&_etext)-1;
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data_resource.start = virt_to_phys(&_etext);
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data_resource.end = virt_to_phys(&_edata)-1;
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2005-04-16 16:20:36 -06:00
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early_identify_cpu(&boot_cpu_data);
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2007-02-12 01:54:25 -07:00
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strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
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2006-09-26 02:52:32 -06:00
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*cmdline_p = command_line;
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parse_early_param();
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finish_e820_parsing();
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2006-09-26 02:52:32 -06:00
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2006-09-27 02:49:52 -06:00
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e820_register_active_regions(0, 0, -1UL);
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2005-04-16 16:20:36 -06:00
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/*
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* partially used pages are not usable - thus
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* we are rounding upwards:
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*/
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end_pfn = e820_end_of_ram();
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2006-09-26 02:52:31 -06:00
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num_physpages = end_pfn;
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2005-04-16 16:20:36 -06:00
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check_efer();
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2006-05-08 07:17:28 -06:00
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discover_ebda();
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2005-04-16 16:20:36 -06:00
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init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
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2006-03-25 08:30:22 -07:00
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dmi_scan_machine();
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2005-08-24 10:07:20 -06:00
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#ifdef CONFIG_ACPI
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2005-04-16 16:20:36 -06:00
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/*
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* Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
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* Call this early for SRAT node setup.
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*/
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acpi_boot_table_init();
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#endif
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2006-09-26 02:52:31 -06:00
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/* How many end-of-memory variables you have, grandma! */
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max_low_pfn = end_pfn;
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max_pfn = end_pfn;
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high_memory = (void *)__va(end_pfn * PAGE_SIZE - 1) + 1;
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2006-09-27 02:49:52 -06:00
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/* Remove active ranges so rediscovery with NUMA-awareness happens */
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remove_all_active_ranges();
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2005-04-16 16:20:36 -06:00
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#ifdef CONFIG_ACPI_NUMA
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/*
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* Parse SRAT to discover nodes.
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*/
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acpi_numa_init();
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#endif
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2005-06-23 01:08:06 -06:00
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#ifdef CONFIG_NUMA
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2005-04-16 16:20:36 -06:00
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numa_initmem_init(0, end_pfn);
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#else
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2005-06-23 01:08:07 -06:00
|
|
|
contig_initmem_init(0, end_pfn);
|
2005-04-16 16:20:36 -06:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Reserve direct mapping */
|
|
|
|
reserve_bootmem_generic(table_start << PAGE_SHIFT,
|
|
|
|
(table_end - table_start) << PAGE_SHIFT);
|
|
|
|
|
|
|
|
/* reserve kernel */
|
2006-08-30 11:37:12 -06:00
|
|
|
reserve_bootmem_generic(__pa_symbol(&_text),
|
|
|
|
__pa_symbol(&_end) - __pa_symbol(&_text));
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/*
|
|
|
|
* reserve physical page 0 - it's a special BIOS page on many boxes,
|
|
|
|
* enabling clean reboots, SMP operation, laptop functions.
|
|
|
|
*/
|
|
|
|
reserve_bootmem_generic(0, PAGE_SIZE);
|
|
|
|
|
|
|
|
/* reserve ebda region */
|
2006-05-08 07:17:28 -06:00
|
|
|
if (ebda_addr)
|
|
|
|
reserve_bootmem_generic(ebda_addr, ebda_size);
|
2007-02-13 05:26:19 -07:00
|
|
|
#ifdef CONFIG_NUMA
|
|
|
|
/* reserve nodemap region */
|
|
|
|
if (nodemap_addr)
|
|
|
|
reserve_bootmem_generic(nodemap_addr, nodemap_size);
|
|
|
|
#endif
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
/* Reserve SMP trampoline */
|
2007-05-02 11:27:07 -06:00
|
|
|
reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, 2*PAGE_SIZE);
|
2005-04-16 16:20:36 -06:00
|
|
|
#endif
|
|
|
|
|
2007-07-28 01:33:16 -06:00
|
|
|
#ifdef CONFIG_ACPI_SLEEP
|
2005-04-16 16:20:36 -06:00
|
|
|
/*
|
|
|
|
* Reserve low memory region for sleep support.
|
|
|
|
*/
|
|
|
|
acpi_reserve_bootmem();
|
|
|
|
#endif
|
|
|
|
/*
|
|
|
|
* Find and reserve possible boot-time SMP configuration:
|
|
|
|
*/
|
|
|
|
find_smp_config();
|
|
|
|
#ifdef CONFIG_BLK_DEV_INITRD
|
|
|
|
if (LOADER_TYPE && INITRD_START) {
|
|
|
|
if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
|
|
|
|
reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
|
2006-12-06 21:37:45 -07:00
|
|
|
initrd_start = INITRD_START + PAGE_OFFSET;
|
2005-04-16 16:20:36 -06:00
|
|
|
initrd_end = initrd_start+INITRD_SIZE;
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
printk(KERN_ERR "initrd extends beyond end of memory "
|
|
|
|
"(0x%08lx > 0x%08lx)\ndisabling initrd\n",
|
|
|
|
(unsigned long)(INITRD_START + INITRD_SIZE),
|
|
|
|
(unsigned long)(end_pfn << PAGE_SHIFT));
|
|
|
|
initrd_start = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
2005-06-25 15:58:04 -06:00
|
|
|
#ifdef CONFIG_KEXEC
|
|
|
|
if (crashk_res.start != crashk_res.end) {
|
2006-06-25 06:49:31 -06:00
|
|
|
reserve_bootmem_generic(crashk_res.start,
|
2005-06-25 15:58:04 -06:00
|
|
|
crashk_res.end - crashk_res.start + 1);
|
|
|
|
}
|
|
|
|
#endif
|
2005-08-06 13:47:36 -06:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
paging_init();
|
|
|
|
|
2006-09-26 02:52:41 -06:00
|
|
|
#ifdef CONFIG_PCI
|
2006-09-26 02:52:30 -06:00
|
|
|
early_quirks();
|
2006-09-26 02:52:41 -06:00
|
|
|
#endif
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2006-03-25 08:29:28 -07:00
|
|
|
/*
|
|
|
|
* set this early, so we dont allocate cpu0
|
|
|
|
* if MADT list doesnt list BSP first
|
|
|
|
* mpparse.c/MP_processor_info() allocates logical cpu numbers.
|
|
|
|
*/
|
|
|
|
cpu_set(0, cpu_present_map);
|
2005-08-24 10:07:20 -06:00
|
|
|
#ifdef CONFIG_ACPI
|
2005-04-16 16:20:36 -06:00
|
|
|
/*
|
|
|
|
* Read APIC and some other early information from ACPI tables.
|
|
|
|
*/
|
|
|
|
acpi_boot_init();
|
|
|
|
#endif
|
|
|
|
|
2006-01-11 14:45:36 -07:00
|
|
|
init_cpu_to_node();
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/*
|
|
|
|
* get boot-time SMP configuration:
|
|
|
|
*/
|
|
|
|
if (smp_found_config)
|
|
|
|
get_smp_config();
|
|
|
|
init_apic_mappings();
|
|
|
|
|
|
|
|
/*
|
2007-02-13 05:26:24 -07:00
|
|
|
* We trust e820 completely. No explicit ROM probing in memory.
|
|
|
|
*/
|
2005-04-16 16:20:36 -06:00
|
|
|
e820_reserve_resources();
|
2006-09-26 00:32:46 -06:00
|
|
|
e820_mark_nosave_regions();
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
{
|
|
|
|
unsigned i;
|
|
|
|
/* request I/O space for devices used on all i[345]86 PCs */
|
2006-09-29 17:47:55 -06:00
|
|
|
for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
|
2005-04-16 16:20:36 -06:00
|
|
|
request_resource(&ioport_resource, &standard_io_resources[i]);
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:25:12 -06:00
|
|
|
e820_setup_gap();
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
#ifdef CONFIG_VT
|
|
|
|
#if defined(CONFIG_VGA_CONSOLE)
|
|
|
|
conswitchp = &vga_con;
|
|
|
|
#elif defined(CONFIG_DUMMY_CONSOLE)
|
|
|
|
conswitchp = &dummy_con;
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
[PATCH] x86_64: Change init sections for CPU hotplug support
This patch adds __cpuinit and __cpuinitdata sections that need to exist past
boot to support cpu hotplug.
Caveat: This is done *only* for EM64T CPU Hotplug support, on request from
Andi Kleen. Much of the generic hotplug code in kernel, and none of the other
archs that support CPU hotplug today, i386, ia64, ppc64, s390 and parisc dont
mark sections with __cpuinit, but only mark them as __devinit, and
__devinitdata.
If someone is motivated to change generic code, we need to make sure all
existing hotplug code does not break, on other arch's that dont use __cpuinit,
and __cpudevinit.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Andi Kleen <ak@muc.de>
Acked-by: Zwane Mwaikambo <zwane@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-25 15:54:58 -06:00
|
|
|
static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
unsigned int *v;
|
|
|
|
|
2005-04-16 16:25:18 -06:00
|
|
|
if (c->extended_cpuid_level < 0x80000004)
|
2005-04-16 16:20:36 -06:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
v = (unsigned int *) c->x86_model_id;
|
|
|
|
cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
|
|
|
|
cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
|
|
|
|
cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
|
|
|
|
c->x86_model_id[48] = 0;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
[PATCH] x86_64: Change init sections for CPU hotplug support
This patch adds __cpuinit and __cpuinitdata sections that need to exist past
boot to support cpu hotplug.
Caveat: This is done *only* for EM64T CPU Hotplug support, on request from
Andi Kleen. Much of the generic hotplug code in kernel, and none of the other
archs that support CPU hotplug today, i386, ia64, ppc64, s390 and parisc dont
mark sections with __cpuinit, but only mark them as __devinit, and
__devinitdata.
If someone is motivated to change generic code, we need to make sure all
existing hotplug code does not break, on other arch's that dont use __cpuinit,
and __cpudevinit.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Andi Kleen <ak@muc.de>
Acked-by: Zwane Mwaikambo <zwane@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-25 15:54:58 -06:00
|
|
|
static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
unsigned int n, dummy, eax, ebx, ecx, edx;
|
|
|
|
|
2005-04-16 16:25:18 -06:00
|
|
|
n = c->extended_cpuid_level;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if (n >= 0x80000005) {
|
|
|
|
cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
|
|
|
|
printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
|
|
|
|
edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
|
|
|
|
c->x86_cache_size=(ecx>>24)+(edx>>24);
|
|
|
|
/* On K8 L1 TLB is inclusive, so don't count it */
|
|
|
|
c->x86_tlbsize = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (n >= 0x80000006) {
|
|
|
|
cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
|
|
|
|
ecx = cpuid_ecx(0x80000006);
|
|
|
|
c->x86_cache_size = ecx >> 16;
|
|
|
|
c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
|
|
|
|
|
|
|
|
printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
|
|
|
|
c->x86_cache_size, ecx & 0xFF);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (n >= 0x80000007)
|
|
|
|
cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
|
|
|
|
if (n >= 0x80000008) {
|
|
|
|
cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
|
|
|
|
c->x86_virt_bits = (eax >> 8) & 0xff;
|
|
|
|
c->x86_phys_bits = eax & 0xff;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-09-12 10:49:24 -06:00
|
|
|
#ifdef CONFIG_NUMA
|
|
|
|
static int nearby_node(int apicid)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
for (i = apicid - 1; i >= 0; i--) {
|
|
|
|
int node = apicid_to_node[i];
|
|
|
|
if (node != NUMA_NO_NODE && node_online(node))
|
|
|
|
return node;
|
|
|
|
}
|
|
|
|
for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
|
|
|
|
int node = apicid_to_node[i];
|
|
|
|
if (node != NUMA_NO_NODE && node_online(node))
|
|
|
|
return node;
|
|
|
|
}
|
|
|
|
return first_node(node_online_map); /* Shouldn't happen */
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2005-04-16 16:25:16 -06:00
|
|
|
/*
|
|
|
|
* On a AMD dual core setup the lower bits of the APIC id distingush the cores.
|
|
|
|
* Assumes number of cores is a power of two.
|
|
|
|
*/
|
|
|
|
static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_SMP
|
2005-05-20 15:27:55 -06:00
|
|
|
unsigned bits;
|
2005-09-12 10:49:24 -06:00
|
|
|
#ifdef CONFIG_NUMA
|
2006-06-26 05:58:17 -06:00
|
|
|
int cpu = smp_processor_id();
|
2005-09-12 10:49:24 -06:00
|
|
|
int node = 0;
|
2006-03-25 08:30:04 -07:00
|
|
|
unsigned apicid = hard_smp_processor_id();
|
2005-09-12 10:49:24 -06:00
|
|
|
#endif
|
2006-06-26 05:56:10 -06:00
|
|
|
unsigned ecx = cpuid_ecx(0x80000008);
|
2005-05-20 15:27:55 -06:00
|
|
|
|
2006-06-26 05:56:10 -06:00
|
|
|
c->x86_max_cores = (ecx & 0xff) + 1;
|
2005-05-20 15:27:55 -06:00
|
|
|
|
2006-06-26 05:56:10 -06:00
|
|
|
/* CPU telling us the core id bits shift? */
|
|
|
|
bits = (ecx >> 12) & 0xF;
|
|
|
|
|
|
|
|
/* Otherwise recompute */
|
|
|
|
if (bits == 0) {
|
|
|
|
while ((1 << bits) < c->x86_max_cores)
|
|
|
|
bits++;
|
|
|
|
}
|
2005-05-20 15:27:55 -06:00
|
|
|
|
|
|
|
/* Low order bits define the core id (index of core in socket) */
|
2006-06-26 05:58:17 -06:00
|
|
|
c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
|
2005-05-20 15:27:55 -06:00
|
|
|
/* Convert the APIC ID into the socket ID */
|
2006-06-26 05:58:17 -06:00
|
|
|
c->phys_proc_id = phys_pkg_id(bits);
|
2005-04-16 16:25:16 -06:00
|
|
|
|
|
|
|
#ifdef CONFIG_NUMA
|
2006-06-26 05:58:17 -06:00
|
|
|
node = c->phys_proc_id;
|
2005-09-12 10:49:24 -06:00
|
|
|
if (apicid_to_node[apicid] != NUMA_NO_NODE)
|
|
|
|
node = apicid_to_node[apicid];
|
|
|
|
if (!node_online(node)) {
|
|
|
|
/* Two possibilities here:
|
|
|
|
- The CPU is missing memory and no node was created.
|
|
|
|
In that case try picking one from a nearby CPU
|
|
|
|
- The APIC IDs differ from the HyperTransport node IDs
|
|
|
|
which the K8 northbridge parsing fills in.
|
|
|
|
Assume they are all increased by a constant offset,
|
|
|
|
but in the same order as the HT nodeids.
|
|
|
|
If that doesn't result in a usable node fall back to the
|
|
|
|
path for the previous case. */
|
2006-06-26 05:58:17 -06:00
|
|
|
int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
|
2005-09-12 10:49:24 -06:00
|
|
|
if (ht_nodeid >= 0 &&
|
|
|
|
apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
|
|
|
|
node = apicid_to_node[ht_nodeid];
|
|
|
|
/* Pick a nearby node */
|
|
|
|
if (!node_online(node))
|
|
|
|
node = nearby_node(apicid);
|
|
|
|
}
|
2005-11-05 09:25:53 -07:00
|
|
|
numa_set_node(cpu, node);
|
2005-09-12 10:49:24 -06:00
|
|
|
|
2006-06-26 05:59:14 -06:00
|
|
|
printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
|
2005-04-16 16:25:16 -06:00
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2007-10-12 15:04:07 -06:00
|
|
|
#define ENABLE_C1E_MASK 0x18000000
|
|
|
|
#define CPUID_PROCESSOR_SIGNATURE 1
|
|
|
|
#define CPUID_XFAM 0x0ff00000
|
|
|
|
#define CPUID_XFAM_K8 0x00000000
|
|
|
|
#define CPUID_XFAM_10H 0x00100000
|
|
|
|
#define CPUID_XFAM_11H 0x00200000
|
|
|
|
#define CPUID_XMOD 0x000f0000
|
|
|
|
#define CPUID_XMOD_REV_F 0x00040000
|
|
|
|
|
|
|
|
/* AMD systems with C1E don't have a working lAPIC timer. Check for that. */
|
|
|
|
static __cpuinit int amd_apic_timer_broken(void)
|
|
|
|
{
|
|
|
|
u32 lo, hi;
|
|
|
|
u32 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
|
|
|
|
switch (eax & CPUID_XFAM) {
|
|
|
|
case CPUID_XFAM_K8:
|
|
|
|
if ((eax & CPUID_XMOD) < CPUID_XMOD_REV_F)
|
|
|
|
break;
|
|
|
|
case CPUID_XFAM_10H:
|
|
|
|
case CPUID_XFAM_11H:
|
|
|
|
rdmsr(MSR_K8_ENABLE_C1E, lo, hi);
|
|
|
|
if (lo & ENABLE_C1E_MASK)
|
|
|
|
return 1;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
/* err on the side of caution */
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2006-09-26 02:52:36 -06:00
|
|
|
static void __cpuinit init_amd(struct cpuinfo_x86 *c)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2006-02-03 13:51:02 -07:00
|
|
|
unsigned level;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-17 16:41:04 -06:00
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
unsigned long value;
|
|
|
|
|
2005-09-29 14:05:55 -06:00
|
|
|
/*
|
|
|
|
* Disable TLB flush filter by setting HWCR.FFDIS on K8
|
|
|
|
* bit 6 of msr C001_0015
|
|
|
|
*
|
|
|
|
* Errata 63 for SH-B3 steppings
|
|
|
|
* Errata 122 for all steppings (F+ have it disabled by default)
|
|
|
|
*/
|
|
|
|
if (c->x86 == 15) {
|
|
|
|
rdmsrl(MSR_K8_HWCR, value);
|
|
|
|
value |= 1 << 6;
|
|
|
|
wrmsrl(MSR_K8_HWCR, value);
|
|
|
|
}
|
2005-09-17 16:41:04 -06:00
|
|
|
#endif
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
|
|
|
|
3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
|
|
|
|
clear_bit(0*32+31, &c->x86_capability);
|
|
|
|
|
2006-02-03 13:51:02 -07:00
|
|
|
/* On C+ stepping K8 rep microcode works well for copy/memset */
|
|
|
|
level = cpuid_eax(1);
|
|
|
|
if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
|
|
|
|
set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
|
2007-07-21 09:09:57 -06:00
|
|
|
if (c->x86 == 0x10)
|
|
|
|
set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
|
2006-02-03 13:51:02 -07:00
|
|
|
|
2006-04-19 18:36:45 -06:00
|
|
|
/* Enable workaround for FXSAVE leak */
|
|
|
|
if (c->x86 >= 6)
|
|
|
|
set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
|
|
|
|
|
2006-06-26 05:59:14 -06:00
|
|
|
level = get_model_name(c);
|
|
|
|
if (!level) {
|
2005-04-16 16:20:36 -06:00
|
|
|
switch (c->x86) {
|
|
|
|
case 15:
|
|
|
|
/* Should distinguish Models here, but this is only
|
|
|
|
a fallback anyways. */
|
|
|
|
strcpy(c->x86_model_id, "Hammer");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
display_cacheinfo(c);
|
|
|
|
|
2006-01-11 14:42:02 -07:00
|
|
|
/* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
|
|
|
|
if (c->x86_power & (1<<8))
|
|
|
|
set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
|
|
|
|
|
2006-06-26 05:56:10 -06:00
|
|
|
/* Multi core CPU? */
|
|
|
|
if (c->extended_cpuid_level >= 0x80000008)
|
2005-04-16 16:25:16 -06:00
|
|
|
amd_detect_cmp(c);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2007-07-21 09:10:03 -06:00
|
|
|
if (c->extended_cpuid_level >= 0x80000006 &&
|
|
|
|
(cpuid_edx(0x80000006) & 0xf000))
|
|
|
|
num_cache_leaves = 4;
|
|
|
|
else
|
|
|
|
num_cache_leaves = 3;
|
2006-09-26 02:52:41 -06:00
|
|
|
|
2007-07-22 03:12:34 -06:00
|
|
|
if (c->x86 == 0xf || c->x86 == 0x10 || c->x86 == 0x11)
|
|
|
|
set_bit(X86_FEATURE_K8, &c->x86_capability);
|
|
|
|
|
2006-12-06 18:14:12 -07:00
|
|
|
/* RDTSC can be speculated around */
|
|
|
|
clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
|
2007-05-02 11:27:12 -06:00
|
|
|
|
|
|
|
/* Family 10 doesn't support C states in MWAIT so don't use it */
|
|
|
|
if (c->x86 == 0x10 && !force_mwait)
|
|
|
|
clear_bit(X86_FEATURE_MWAIT, &c->x86_capability);
|
2007-10-12 15:04:07 -06:00
|
|
|
|
|
|
|
if (amd_apic_timer_broken())
|
|
|
|
disable_apic_timer = 1;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
[PATCH] x86_64: Change init sections for CPU hotplug support
This patch adds __cpuinit and __cpuinitdata sections that need to exist past
boot to support cpu hotplug.
Caveat: This is done *only* for EM64T CPU Hotplug support, on request from
Andi Kleen. Much of the generic hotplug code in kernel, and none of the other
archs that support CPU hotplug today, i386, ia64, ppc64, s390 and parisc dont
mark sections with __cpuinit, but only mark them as __devinit, and
__devinitdata.
If someone is motivated to change generic code, we need to make sure all
existing hotplug code does not break, on other arch's that dont use __cpuinit,
and __cpudevinit.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Andi Kleen <ak@muc.de>
Acked-by: Zwane Mwaikambo <zwane@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-25 15:54:58 -06:00
|
|
|
static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
u32 eax, ebx, ecx, edx;
|
2005-11-05 09:25:54 -07:00
|
|
|
int index_msb, core_bits;
|
|
|
|
|
|
|
|
cpuid(1, &eax, &ebx, &ecx, &edx);
|
|
|
|
|
|
|
|
|
2006-06-26 05:59:14 -06:00
|
|
|
if (!cpu_has(c, X86_FEATURE_HT))
|
2005-04-16 16:20:36 -06:00
|
|
|
return;
|
2006-06-26 05:59:14 -06:00
|
|
|
if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
|
|
|
|
goto out;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
smp_num_siblings = (ebx & 0xff0000) >> 16;
|
2005-11-05 09:25:54 -07:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
if (smp_num_siblings == 1) {
|
|
|
|
printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
|
2005-11-05 09:25:54 -07:00
|
|
|
} else if (smp_num_siblings > 1 ) {
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
if (smp_num_siblings > NR_CPUS) {
|
|
|
|
printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
|
|
|
|
smp_num_siblings = 1;
|
|
|
|
return;
|
|
|
|
}
|
2005-11-05 09:25:54 -07:00
|
|
|
|
|
|
|
index_msb = get_count_order(smp_num_siblings);
|
2006-06-26 05:58:17 -06:00
|
|
|
c->phys_proc_id = phys_pkg_id(index_msb);
|
2005-04-16 16:25:15 -06:00
|
|
|
|
2005-11-05 09:25:54 -07:00
|
|
|
smp_num_siblings = smp_num_siblings / c->x86_max_cores;
|
2005-04-16 16:25:15 -06:00
|
|
|
|
2005-11-05 09:25:54 -07:00
|
|
|
index_msb = get_count_order(smp_num_siblings) ;
|
|
|
|
|
|
|
|
core_bits = get_count_order(c->x86_max_cores);
|
2005-04-16 16:25:15 -06:00
|
|
|
|
2006-06-26 05:58:17 -06:00
|
|
|
c->cpu_core_id = phys_pkg_id(index_msb) &
|
2005-11-05 09:25:54 -07:00
|
|
|
((1 << core_bits) - 1);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2006-06-26 05:59:14 -06:00
|
|
|
out:
|
|
|
|
if ((c->x86_max_cores * smp_num_siblings) > 1) {
|
|
|
|
printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
|
|
|
|
printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id);
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:25:15 -06:00
|
|
|
/*
|
|
|
|
* find out the number of processor cores on the die
|
|
|
|
*/
|
[PATCH] x86_64: Change init sections for CPU hotplug support
This patch adds __cpuinit and __cpuinitdata sections that need to exist past
boot to support cpu hotplug.
Caveat: This is done *only* for EM64T CPU Hotplug support, on request from
Andi Kleen. Much of the generic hotplug code in kernel, and none of the other
archs that support CPU hotplug today, i386, ia64, ppc64, s390 and parisc dont
mark sections with __cpuinit, but only mark them as __devinit, and
__devinitdata.
If someone is motivated to change generic code, we need to make sure all
existing hotplug code does not break, on other arch's that dont use __cpuinit,
and __cpudevinit.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Andi Kleen <ak@muc.de>
Acked-by: Zwane Mwaikambo <zwane@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-25 15:54:58 -06:00
|
|
|
static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
|
2005-04-16 16:25:15 -06:00
|
|
|
{
|
2006-06-26 05:58:02 -06:00
|
|
|
unsigned int eax, t;
|
2005-04-16 16:25:15 -06:00
|
|
|
|
|
|
|
if (c->cpuid_level < 4)
|
|
|
|
return 1;
|
|
|
|
|
2006-06-26 05:58:02 -06:00
|
|
|
cpuid_count(4, 0, &eax, &t, &t, &t);
|
2005-04-16 16:25:15 -06:00
|
|
|
|
|
|
|
if (eax & 0x1f)
|
|
|
|
return ((eax >> 26) + 1);
|
|
|
|
else
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2005-09-12 10:49:24 -06:00
|
|
|
static void srat_detect_node(void)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_NUMA
|
2005-10-03 11:36:28 -06:00
|
|
|
unsigned node;
|
2005-09-12 10:49:24 -06:00
|
|
|
int cpu = smp_processor_id();
|
2006-06-26 05:59:14 -06:00
|
|
|
int apicid = hard_smp_processor_id();
|
2005-09-12 10:49:24 -06:00
|
|
|
|
|
|
|
/* Don't do the funky fallback heuristics the AMD version employs
|
|
|
|
for now. */
|
2006-06-26 05:59:14 -06:00
|
|
|
node = apicid_to_node[apicid];
|
2005-09-12 10:49:24 -06:00
|
|
|
if (node == NUMA_NO_NODE)
|
2006-05-30 14:47:57 -06:00
|
|
|
node = first_node(node_online_map);
|
2005-11-05 09:25:53 -07:00
|
|
|
numa_set_node(cpu, node);
|
2005-09-12 10:49:24 -06:00
|
|
|
|
2006-09-26 02:52:33 -06:00
|
|
|
printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
|
2005-09-12 10:49:24 -06:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
[PATCH] x86_64: Change init sections for CPU hotplug support
This patch adds __cpuinit and __cpuinitdata sections that need to exist past
boot to support cpu hotplug.
Caveat: This is done *only* for EM64T CPU Hotplug support, on request from
Andi Kleen. Much of the generic hotplug code in kernel, and none of the other
archs that support CPU hotplug today, i386, ia64, ppc64, s390 and parisc dont
mark sections with __cpuinit, but only mark them as __devinit, and
__devinitdata.
If someone is motivated to change generic code, we need to make sure all
existing hotplug code does not break, on other arch's that dont use __cpuinit,
and __cpudevinit.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Andi Kleen <ak@muc.de>
Acked-by: Zwane Mwaikambo <zwane@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-25 15:54:58 -06:00
|
|
|
static void __cpuinit init_intel(struct cpuinfo_x86 *c)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
/* Cache sizes */
|
|
|
|
unsigned n;
|
|
|
|
|
|
|
|
init_intel_cacheinfo(c);
|
2006-06-26 05:59:59 -06:00
|
|
|
if (c->cpuid_level > 9 ) {
|
|
|
|
unsigned eax = cpuid_eax(10);
|
|
|
|
/* Check for version and the number of counters */
|
|
|
|
if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
|
|
|
|
set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability);
|
|
|
|
}
|
|
|
|
|
2006-12-06 18:14:01 -07:00
|
|
|
if (cpu_has_ds) {
|
|
|
|
unsigned int l1, l2;
|
|
|
|
rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
|
2006-12-06 18:14:11 -07:00
|
|
|
if (!(l1 & (1<<11)))
|
|
|
|
set_bit(X86_FEATURE_BTS, c->x86_capability);
|
2006-12-06 18:14:01 -07:00
|
|
|
if (!(l1 & (1<<12)))
|
|
|
|
set_bit(X86_FEATURE_PEBS, c->x86_capability);
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:25:18 -06:00
|
|
|
n = c->extended_cpuid_level;
|
2005-04-16 16:20:36 -06:00
|
|
|
if (n >= 0x80000008) {
|
|
|
|
unsigned eax = cpuid_eax(0x80000008);
|
|
|
|
c->x86_virt_bits = (eax >> 8) & 0xff;
|
|
|
|
c->x86_phys_bits = eax & 0xff;
|
2005-11-05 09:25:54 -07:00
|
|
|
/* CPUID workaround for Intel 0F34 CPU */
|
|
|
|
if (c->x86_vendor == X86_VENDOR_INTEL &&
|
|
|
|
c->x86 == 0xF && c->x86_model == 0x3 &&
|
|
|
|
c->x86_mask == 0x4)
|
|
|
|
c->x86_phys_bits = 36;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
if (c->x86 == 15)
|
|
|
|
c->x86_cache_alignment = c->x86_clflush_size * 2;
|
2006-01-11 14:42:45 -07:00
|
|
|
if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
|
|
|
|
(c->x86 == 0x6 && c->x86_model >= 0x0e))
|
2005-04-16 16:25:05 -06:00
|
|
|
set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
|
2006-09-26 02:52:41 -06:00
|
|
|
if (c->x86 == 6)
|
|
|
|
set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
|
2006-12-06 18:14:12 -07:00
|
|
|
if (c->x86 == 15)
|
|
|
|
set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
|
|
|
|
else
|
|
|
|
clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
|
2005-11-05 09:25:54 -07:00
|
|
|
c->x86_max_cores = intel_num_cpu_cores(c);
|
2005-09-12 10:49:24 -06:00
|
|
|
|
|
|
|
srat_detect_node();
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2005-09-10 01:27:21 -06:00
|
|
|
static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
char *v = c->x86_vendor_id;
|
|
|
|
|
|
|
|
if (!strcmp(v, "AuthenticAMD"))
|
|
|
|
c->x86_vendor = X86_VENDOR_AMD;
|
|
|
|
else if (!strcmp(v, "GenuineIntel"))
|
|
|
|
c->x86_vendor = X86_VENDOR_INTEL;
|
|
|
|
else
|
|
|
|
c->x86_vendor = X86_VENDOR_UNKNOWN;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct cpu_model_info {
|
|
|
|
int vendor;
|
|
|
|
int family;
|
|
|
|
char *model_names[16];
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Do some early cpuid on the boot CPU to get some parameter that are
|
|
|
|
needed before check_bugs. Everything advanced is in identify_cpu
|
|
|
|
below. */
|
[PATCH] x86_64: Change init sections for CPU hotplug support
This patch adds __cpuinit and __cpuinitdata sections that need to exist past
boot to support cpu hotplug.
Caveat: This is done *only* for EM64T CPU Hotplug support, on request from
Andi Kleen. Much of the generic hotplug code in kernel, and none of the other
archs that support CPU hotplug today, i386, ia64, ppc64, s390 and parisc dont
mark sections with __cpuinit, but only mark them as __devinit, and
__devinitdata.
If someone is motivated to change generic code, we need to make sure all
existing hotplug code does not break, on other arch's that dont use __cpuinit,
and __cpudevinit.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Andi Kleen <ak@muc.de>
Acked-by: Zwane Mwaikambo <zwane@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-25 15:54:58 -06:00
|
|
|
void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
u32 tfms;
|
|
|
|
|
|
|
|
c->loops_per_jiffy = loops_per_jiffy;
|
|
|
|
c->x86_cache_size = -1;
|
|
|
|
c->x86_vendor = X86_VENDOR_UNKNOWN;
|
|
|
|
c->x86_model = c->x86_mask = 0; /* So far unknown... */
|
|
|
|
c->x86_vendor_id[0] = '\0'; /* Unset */
|
|
|
|
c->x86_model_id[0] = '\0'; /* Unset */
|
|
|
|
c->x86_clflush_size = 64;
|
|
|
|
c->x86_cache_alignment = c->x86_clflush_size;
|
2005-11-05 09:25:54 -07:00
|
|
|
c->x86_max_cores = 1;
|
2005-04-16 16:25:18 -06:00
|
|
|
c->extended_cpuid_level = 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
memset(&c->x86_capability, 0, sizeof c->x86_capability);
|
|
|
|
|
|
|
|
/* Get vendor name */
|
|
|
|
cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
|
|
|
|
(unsigned int *)&c->x86_vendor_id[0],
|
|
|
|
(unsigned int *)&c->x86_vendor_id[8],
|
|
|
|
(unsigned int *)&c->x86_vendor_id[4]);
|
|
|
|
|
|
|
|
get_cpu_vendor(c);
|
|
|
|
|
|
|
|
/* Initialize the standard set of capabilities */
|
|
|
|
/* Note that the vendor-specific code below might override */
|
|
|
|
|
|
|
|
/* Intel-defined flags: level 0x00000001 */
|
|
|
|
if (c->cpuid_level >= 0x00000001) {
|
|
|
|
__u32 misc;
|
|
|
|
cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
|
|
|
|
&c->x86_capability[0]);
|
|
|
|
c->x86 = (tfms >> 8) & 0xf;
|
|
|
|
c->x86_model = (tfms >> 4) & 0xf;
|
|
|
|
c->x86_mask = tfms & 0xf;
|
2005-11-05 09:25:53 -07:00
|
|
|
if (c->x86 == 0xf)
|
2005-04-16 16:20:36 -06:00
|
|
|
c->x86 += (tfms >> 20) & 0xff;
|
2005-11-05 09:25:53 -07:00
|
|
|
if (c->x86 >= 0x6)
|
2005-04-16 16:20:36 -06:00
|
|
|
c->x86_model += ((tfms >> 16) & 0xF) << 4;
|
|
|
|
if (c->x86_capability[0] & (1<<19))
|
|
|
|
c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
|
|
|
|
} else {
|
|
|
|
/* Have CPUID level 0 only - unheard of */
|
|
|
|
c->x86 = 4;
|
|
|
|
}
|
2005-05-16 22:53:21 -06:00
|
|
|
|
|
|
|
#ifdef CONFIG_SMP
|
2006-06-26 05:58:17 -06:00
|
|
|
c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
|
2005-05-16 22:53:21 -06:00
|
|
|
#endif
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This does the hard work of actually picking apart the CPU stuff...
|
|
|
|
*/
|
[PATCH] x86_64: Change init sections for CPU hotplug support
This patch adds __cpuinit and __cpuinitdata sections that need to exist past
boot to support cpu hotplug.
Caveat: This is done *only* for EM64T CPU Hotplug support, on request from
Andi Kleen. Much of the generic hotplug code in kernel, and none of the other
archs that support CPU hotplug today, i386, ia64, ppc64, s390 and parisc dont
mark sections with __cpuinit, but only mark them as __devinit, and
__devinitdata.
If someone is motivated to change generic code, we need to make sure all
existing hotplug code does not break, on other arch's that dont use __cpuinit,
and __cpudevinit.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Andi Kleen <ak@muc.de>
Acked-by: Zwane Mwaikambo <zwane@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-25 15:54:58 -06:00
|
|
|
void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
u32 xlvl;
|
|
|
|
|
|
|
|
early_identify_cpu(c);
|
|
|
|
|
|
|
|
/* AMD-defined flags: level 0x80000001 */
|
|
|
|
xlvl = cpuid_eax(0x80000000);
|
2005-04-16 16:25:18 -06:00
|
|
|
c->extended_cpuid_level = xlvl;
|
2005-04-16 16:20:36 -06:00
|
|
|
if ((xlvl & 0xffff0000) == 0x80000000) {
|
|
|
|
if (xlvl >= 0x80000001) {
|
|
|
|
c->x86_capability[1] = cpuid_edx(0x80000001);
|
2005-05-01 09:58:49 -06:00
|
|
|
c->x86_capability[6] = cpuid_ecx(0x80000001);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
if (xlvl >= 0x80000004)
|
|
|
|
get_model_name(c); /* Default name */
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Transmeta-defined flags: level 0x80860001 */
|
|
|
|
xlvl = cpuid_eax(0x80860000);
|
|
|
|
if ((xlvl & 0xffff0000) == 0x80860000) {
|
|
|
|
/* Don't set x86_cpuid_level here for now to not confuse. */
|
|
|
|
if (xlvl >= 0x80860001)
|
|
|
|
c->x86_capability[2] = cpuid_edx(0x80860001);
|
|
|
|
}
|
|
|
|
|
2007-07-11 13:18:32 -06:00
|
|
|
init_scattered_cpuid_features(c);
|
|
|
|
|
2006-03-27 02:15:22 -07:00
|
|
|
c->apicid = phys_pkg_id(0);
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/*
|
|
|
|
* Vendor-specific initialization. In this section we
|
|
|
|
* canonicalize the feature flags, meaning if there are
|
|
|
|
* features a certain CPU supports which CPUID doesn't
|
|
|
|
* tell us, CPUID claiming incorrect flags, or other bugs,
|
|
|
|
* we handle them here.
|
|
|
|
*
|
|
|
|
* At the end of this section, c->x86_capability better
|
|
|
|
* indicate the features this CPU genuinely supports!
|
|
|
|
*/
|
|
|
|
switch (c->x86_vendor) {
|
|
|
|
case X86_VENDOR_AMD:
|
|
|
|
init_amd(c);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case X86_VENDOR_INTEL:
|
|
|
|
init_intel(c);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case X86_VENDOR_UNKNOWN:
|
|
|
|
default:
|
|
|
|
display_cacheinfo(c);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
select_idle_routine(c);
|
|
|
|
detect_ht(c);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* On SMP, boot_cpu_data holds the common feature set between
|
|
|
|
* all CPUs; so make sure that we indicate which features are
|
|
|
|
* common between the CPUs. The first time this routine gets
|
|
|
|
* executed, c == &boot_cpu_data.
|
|
|
|
*/
|
|
|
|
if (c != &boot_cpu_data) {
|
|
|
|
/* AND the already accumulated flags with these */
|
|
|
|
for (i = 0 ; i < NCAPINTS ; i++)
|
|
|
|
boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_X86_MCE
|
|
|
|
mcheck_init(c);
|
|
|
|
#endif
|
2007-05-11 03:23:20 -06:00
|
|
|
if (c != &boot_cpu_data)
|
2005-07-07 18:56:38 -06:00
|
|
|
mtrr_ap_init();
|
2005-04-16 16:20:36 -06:00
|
|
|
#ifdef CONFIG_NUMA
|
2005-07-28 22:15:28 -06:00
|
|
|
numa_add_cpu(smp_processor_id());
|
2005-04-16 16:20:36 -06:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
|
[PATCH] x86_64: Change init sections for CPU hotplug support
This patch adds __cpuinit and __cpuinitdata sections that need to exist past
boot to support cpu hotplug.
Caveat: This is done *only* for EM64T CPU Hotplug support, on request from
Andi Kleen. Much of the generic hotplug code in kernel, and none of the other
archs that support CPU hotplug today, i386, ia64, ppc64, s390 and parisc dont
mark sections with __cpuinit, but only mark them as __devinit, and
__devinitdata.
If someone is motivated to change generic code, we need to make sure all
existing hotplug code does not break, on other arch's that dont use __cpuinit,
and __cpudevinit.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Andi Kleen <ak@muc.de>
Acked-by: Zwane Mwaikambo <zwane@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-25 15:54:58 -06:00
|
|
|
void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
if (c->x86_model_id[0])
|
|
|
|
printk("%s", c->x86_model_id);
|
|
|
|
|
|
|
|
if (c->x86_mask || c->cpuid_level >= 0)
|
|
|
|
printk(" stepping %02x\n", c->x86_mask);
|
|
|
|
else
|
|
|
|
printk("\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Get CPU information for use by the procfs.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int show_cpuinfo(struct seq_file *m, void *v)
|
|
|
|
{
|
|
|
|
struct cpuinfo_x86 *c = v;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* These flag bits must match the definitions in <asm/cpufeature.h>.
|
|
|
|
* NULL means this bit is undefined or reserved; either way it doesn't
|
|
|
|
* have meaning as far as Linux is concerned. Note that it's important
|
|
|
|
* to realize there is a difference between this table and CPUID -- if
|
|
|
|
* applications want to get the raw CPUID data, they should access
|
|
|
|
* /dev/cpu/<cpu_nr>/cpuid instead.
|
|
|
|
*/
|
|
|
|
static char *x86_cap_flags[] = {
|
|
|
|
/* Intel-defined */
|
|
|
|
"fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
|
|
|
|
"cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
|
|
|
|
"pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
|
2007-07-11 13:18:29 -06:00
|
|
|
"fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe",
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* AMD-defined */
|
2005-05-01 09:58:51 -06:00
|
|
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
2005-04-16 16:20:36 -06:00
|
|
|
NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
|
|
|
|
NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
|
2007-02-13 05:26:25 -07:00
|
|
|
NULL, "fxsr_opt", "pdpe1gb", "rdtscp", NULL, "lm",
|
|
|
|
"3dnowext", "3dnow",
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* Transmeta-defined */
|
|
|
|
"recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
|
|
|
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
|
|
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
|
|
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
|
|
|
|
|
|
|
/* Other (Linux-defined) */
|
2007-07-11 13:18:29 -06:00
|
|
|
"cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr",
|
|
|
|
NULL, NULL, NULL, NULL,
|
|
|
|
"constant_tsc", "up", NULL, "arch_perfmon",
|
|
|
|
"pebs", "bts", NULL, "sync_rdtsc",
|
|
|
|
"rep_good", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
2005-04-16 16:20:36 -06:00
|
|
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
|
|
|
|
|
|
|
/* Intel-defined (#2) */
|
2006-03-25 08:31:22 -07:00
|
|
|
"pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
|
2006-09-26 02:52:42 -06:00
|
|
|
"tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
|
2007-02-13 05:26:25 -07:00
|
|
|
NULL, NULL, "dca", NULL, NULL, NULL, NULL, "popcnt",
|
2005-04-16 16:20:36 -06:00
|
|
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
|
|
|
|
2005-05-01 09:58:49 -06:00
|
|
|
/* VIA/Cyrix/Centaur-defined */
|
|
|
|
NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
|
2007-07-11 13:18:29 -06:00
|
|
|
"ace2", "ace2_en", "phe", "phe_en", "pmm", "pmm_en", NULL, NULL,
|
2005-05-01 09:58:49 -06:00
|
|
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
|
|
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/* AMD-defined (#2) */
|
2007-02-13 05:26:25 -07:00
|
|
|
"lahf_lm", "cmp_legacy", "svm", "extapic", "cr8_legacy",
|
|
|
|
"altmovcr8", "abm", "sse4a",
|
|
|
|
"misalignsse", "3dnowprefetch",
|
|
|
|
"osvw", "ibs", NULL, NULL, NULL, NULL,
|
2005-04-16 16:20:36 -06:00
|
|
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
2005-05-01 09:58:49 -06:00
|
|
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
2007-07-11 13:18:32 -06:00
|
|
|
|
|
|
|
/* Auxiliary (Linux-defined) */
|
|
|
|
"ida", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
|
|
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
|
|
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
|
|
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
2005-04-16 16:20:36 -06:00
|
|
|
};
|
|
|
|
static char *x86_power_flags[] = {
|
|
|
|
"ts", /* temperature sensor */
|
|
|
|
"fid", /* frequency id control */
|
|
|
|
"vid", /* voltage id control */
|
|
|
|
"ttp", /* thermal trip */
|
|
|
|
"tm",
|
2006-01-11 14:42:51 -07:00
|
|
|
"stc",
|
2007-02-13 05:26:25 -07:00
|
|
|
"100mhzsteps",
|
|
|
|
"hwpstate",
|
2007-05-02 11:27:09 -06:00
|
|
|
"", /* tsc invariant mapped to constant_tsc */
|
|
|
|
/* nothing */
|
2005-04-16 16:20:36 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
if (!cpu_online(c-cpu_data))
|
|
|
|
return 0;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
seq_printf(m,"processor\t: %u\n"
|
|
|
|
"vendor_id\t: %s\n"
|
|
|
|
"cpu family\t: %d\n"
|
|
|
|
"model\t\t: %d\n"
|
|
|
|
"model name\t: %s\n",
|
|
|
|
(unsigned)(c-cpu_data),
|
|
|
|
c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
|
|
|
|
c->x86,
|
|
|
|
(int)c->x86_model,
|
|
|
|
c->x86_model_id[0] ? c->x86_model_id : "unknown");
|
|
|
|
|
|
|
|
if (c->x86_mask || c->cpuid_level >= 0)
|
|
|
|
seq_printf(m, "stepping\t: %d\n", c->x86_mask);
|
|
|
|
else
|
|
|
|
seq_printf(m, "stepping\t: unknown\n");
|
|
|
|
|
|
|
|
if (cpu_has(c,X86_FEATURE_TSC)) {
|
2005-12-02 11:43:20 -07:00
|
|
|
unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
|
|
|
|
if (!freq)
|
|
|
|
freq = cpu_khz;
|
2005-04-16 16:20:36 -06:00
|
|
|
seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
|
2005-12-02 11:43:20 -07:00
|
|
|
freq / 1000, (freq % 1000));
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Cache size */
|
|
|
|
if (c->x86_cache_size >= 0)
|
|
|
|
seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
|
|
|
|
|
|
|
|
#ifdef CONFIG_SMP
|
2005-11-05 09:25:54 -07:00
|
|
|
if (smp_num_siblings * c->x86_max_cores > 1) {
|
2005-04-16 16:24:51 -06:00
|
|
|
int cpu = c - cpu_data;
|
2006-06-26 05:58:17 -06:00
|
|
|
seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
|
2005-11-05 09:25:54 -07:00
|
|
|
seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
|
2006-06-26 05:58:17 -06:00
|
|
|
seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
|
2005-11-05 09:25:54 -07:00
|
|
|
seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
|
2005-04-16 16:24:51 -06:00
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
#endif
|
|
|
|
|
|
|
|
seq_printf(m,
|
|
|
|
"fpu\t\t: yes\n"
|
|
|
|
"fpu_exception\t: yes\n"
|
|
|
|
"cpuid level\t: %d\n"
|
|
|
|
"wp\t\t: yes\n"
|
|
|
|
"flags\t\t:",
|
|
|
|
c->cpuid_level);
|
|
|
|
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
for ( i = 0 ; i < 32*NCAPINTS ; i++ )
|
2006-03-24 04:15:11 -07:00
|
|
|
if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
|
2005-04-16 16:20:36 -06:00
|
|
|
seq_printf(m, " %s", x86_cap_flags[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
|
|
|
|
c->loops_per_jiffy/(500000/HZ),
|
|
|
|
(c->loops_per_jiffy/(5000/HZ)) % 100);
|
|
|
|
|
|
|
|
if (c->x86_tlbsize > 0)
|
|
|
|
seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
|
|
|
|
seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
|
|
|
|
seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
|
|
|
|
|
|
|
|
seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
|
|
|
|
c->x86_phys_bits, c->x86_virt_bits);
|
|
|
|
|
|
|
|
seq_printf(m, "power management:");
|
|
|
|
{
|
|
|
|
unsigned i;
|
|
|
|
for (i = 0; i < 32; i++)
|
|
|
|
if (c->x86_power & (1 << i)) {
|
2006-01-11 14:42:51 -07:00
|
|
|
if (i < ARRAY_SIZE(x86_power_flags) &&
|
|
|
|
x86_power_flags[i])
|
|
|
|
seq_printf(m, "%s%s",
|
|
|
|
x86_power_flags[i][0]?" ":"",
|
|
|
|
x86_power_flags[i]);
|
2005-04-16 16:20:36 -06:00
|
|
|
else
|
|
|
|
seq_printf(m, " [%d]", i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:25:20 -06:00
|
|
|
seq_printf(m, "\n\n");
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void *c_start(struct seq_file *m, loff_t *pos)
|
|
|
|
{
|
|
|
|
return *pos < NR_CPUS ? cpu_data + *pos : NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void *c_next(struct seq_file *m, void *v, loff_t *pos)
|
|
|
|
{
|
|
|
|
++*pos;
|
|
|
|
return c_start(m, pos);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void c_stop(struct seq_file *m, void *v)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
struct seq_operations cpuinfo_op = {
|
|
|
|
.start =c_start,
|
|
|
|
.next = c_next,
|
|
|
|
.stop = c_stop,
|
|
|
|
.show = show_cpuinfo,
|
|
|
|
};
|