2005-11-05 09:25:53 -07:00
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/*
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2006-06-26 05:58:53 -06:00
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* (c) 2005, 2006 Advanced Micro Devices, Inc.
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2005-11-05 09:25:53 -07:00
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* Your use of this code is subject to the terms and conditions of the
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* GNU general public license version 2. See "COPYING" or
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* http://www.gnu.org/licenses/gpl.html
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*
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* Written by Jacob Shin - AMD, Inc.
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*
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* Support : jacob.shin@amd.com
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*
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2006-06-26 05:58:53 -06:00
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* April 2006
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* - added support for AMD Family 0x10 processors
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2005-11-05 09:25:53 -07:00
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*
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2006-06-26 05:58:53 -06:00
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* All MC4_MISCi registers are shared between multi-cores
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2005-11-05 09:25:53 -07:00
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*/
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#include <linux/cpu.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/kobject.h>
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#include <linux/notifier.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/sysdev.h>
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#include <linux/sysfs.h>
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#include <asm/apic.h>
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#include <asm/mce.h>
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#include <asm/msr.h>
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#include <asm/percpu.h>
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2006-01-11 14:44:36 -07:00
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#include <asm/idle.h>
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2005-11-05 09:25:53 -07:00
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2006-06-26 05:58:56 -06:00
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#define PFX "mce_threshold: "
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#define VERSION "version 1.1.1"
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#define NR_BANKS 6
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#define NR_BLOCKS 9
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#define THRESHOLD_MAX 0xFFF
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#define INT_TYPE_APIC 0x00020000
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#define MASK_VALID_HI 0x80000000
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2007-02-13 05:26:23 -07:00
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#define MASK_CNTP_HI 0x40000000
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#define MASK_LOCKED_HI 0x20000000
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2006-06-26 05:58:56 -06:00
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#define MASK_LVTOFF_HI 0x00F00000
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#define MASK_COUNT_EN_HI 0x00080000
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#define MASK_INT_TYPE_HI 0x00060000
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#define MASK_OVERFLOW_HI 0x00010000
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2005-11-05 09:25:53 -07:00
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#define MASK_ERR_COUNT_HI 0x00000FFF
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2006-06-26 05:58:53 -06:00
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#define MASK_BLKPTR_LO 0xFF000000
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#define MCG_XBLK_ADDR 0xC0000400
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2005-11-05 09:25:53 -07:00
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2006-06-26 05:58:53 -06:00
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struct threshold_block {
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unsigned int block;
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unsigned int bank;
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2005-11-05 09:25:53 -07:00
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unsigned int cpu;
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2006-06-26 05:58:53 -06:00
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u32 address;
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u16 interrupt_enable;
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2005-11-05 09:25:53 -07:00
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u16 threshold_limit;
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struct kobject kobj;
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2006-06-26 05:58:53 -06:00
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struct list_head miscj;
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2005-11-05 09:25:53 -07:00
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};
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2006-06-26 05:58:53 -06:00
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/* defaults used early on boot */
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static struct threshold_block threshold_defaults = {
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2005-11-05 09:25:53 -07:00
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.interrupt_enable = 0,
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.threshold_limit = THRESHOLD_MAX,
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};
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2006-06-26 05:58:53 -06:00
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struct threshold_bank {
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struct kobject kobj;
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struct threshold_block *blocks;
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cpumask_t cpus;
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};
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static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
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2005-11-05 09:25:53 -07:00
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#ifdef CONFIG_SMP
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static unsigned char shared_bank[NR_BANKS] = {
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0, 0, 0, 0, 1
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};
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#endif
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static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
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/*
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* CPU Initialization
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*/
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/* must be called with correct cpu affinity */
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2006-06-26 05:58:53 -06:00
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static void threshold_restart_bank(struct threshold_block *b,
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2005-11-05 09:25:53 -07:00
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int reset, u16 old_limit)
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{
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u32 mci_misc_hi, mci_misc_lo;
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2006-06-26 05:58:53 -06:00
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rdmsr(b->address, mci_misc_lo, mci_misc_hi);
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2005-11-05 09:25:53 -07:00
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if (b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
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reset = 1; /* limit cannot be lower than err count */
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if (reset) { /* reset err count and overflow bit */
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mci_misc_hi =
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(mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) |
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(THRESHOLD_MAX - b->threshold_limit);
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} else if (old_limit) { /* change limit w/o reset */
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int new_count = (mci_misc_hi & THRESHOLD_MAX) +
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(old_limit - b->threshold_limit);
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mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) |
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(new_count & THRESHOLD_MAX);
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}
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b->interrupt_enable ?
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(mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) :
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(mci_misc_hi &= ~MASK_INT_TYPE_HI);
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mci_misc_hi |= MASK_COUNT_EN_HI;
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2006-06-26 05:58:53 -06:00
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wrmsr(b->address, mci_misc_lo, mci_misc_hi);
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2005-11-05 09:25:53 -07:00
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}
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2006-06-26 05:58:53 -06:00
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/* cpu init entry point, called from mce.c with preempt off */
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2005-11-05 09:25:53 -07:00
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void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c)
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{
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2006-06-26 05:58:53 -06:00
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unsigned int bank, block;
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2005-11-05 09:25:53 -07:00
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unsigned int cpu = smp_processor_id();
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2006-06-26 05:58:53 -06:00
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u32 low = 0, high = 0, address = 0;
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2005-11-05 09:25:53 -07:00
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for (bank = 0; bank < NR_BANKS; ++bank) {
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2006-06-26 05:58:53 -06:00
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for (block = 0; block < NR_BLOCKS; ++block) {
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if (block == 0)
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address = MSR_IA32_MC0_MISC + bank * 4;
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2007-02-13 05:26:23 -07:00
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else if (block == 1) {
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address = (low & MASK_BLKPTR_LO) >> 21;
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if (!address)
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break;
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address += MCG_XBLK_ADDR;
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}
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2006-06-26 05:58:53 -06:00
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else
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++address;
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if (rdmsr_safe(address, &low, &high))
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2007-02-13 05:26:23 -07:00
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break;
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2006-06-26 05:58:53 -06:00
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if (!(high & MASK_VALID_HI)) {
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if (block)
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continue;
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else
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break;
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}
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2007-02-13 05:26:23 -07:00
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if (!(high & MASK_CNTP_HI) ||
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(high & MASK_LOCKED_HI))
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2006-06-26 05:58:53 -06:00
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continue;
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if (!block)
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per_cpu(bank_map, cpu) |= (1 << bank);
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2005-11-05 09:25:53 -07:00
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#ifdef CONFIG_SMP
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2006-06-26 05:58:53 -06:00
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if (shared_bank[bank] && c->cpu_core_id)
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break;
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2005-11-05 09:25:53 -07:00
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#endif
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2006-06-26 05:58:53 -06:00
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high &= ~MASK_LVTOFF_HI;
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high |= K8_APIC_EXT_LVT_ENTRY_THRESHOLD << 20;
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wrmsr(address, low, high);
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2007-07-21 09:10:14 -06:00
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setup_APIC_extended_lvt(K8_APIC_EXT_LVT_ENTRY_THRESHOLD,
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THRESHOLD_APIC_VECTOR,
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K8_APIC_EXT_INT_MSG_FIX, 0);
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2005-11-05 09:25:53 -07:00
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2006-06-26 05:58:53 -06:00
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threshold_defaults.address = address;
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threshold_restart_bank(&threshold_defaults, 0, 0);
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}
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2005-11-05 09:25:53 -07:00
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}
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}
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/*
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* APIC Interrupt Handler
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*/
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/*
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* threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
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* the interrupt goes off when error_count reaches threshold_limit.
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* the handler will simply log mcelog w/ software defined bank number.
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*/
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asmlinkage void mce_threshold_interrupt(void)
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{
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2006-06-26 05:58:53 -06:00
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unsigned int bank, block;
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2005-11-05 09:25:53 -07:00
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struct mce m;
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2006-06-26 05:58:53 -06:00
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u32 low = 0, high = 0, address = 0;
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2005-11-05 09:25:53 -07:00
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ack_APIC_irq();
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2006-01-11 14:44:36 -07:00
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exit_idle();
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2005-11-05 09:25:53 -07:00
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irq_enter();
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memset(&m, 0, sizeof(m));
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rdtscll(m.tsc);
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m.cpu = smp_processor_id();
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/* assume first bank caused it */
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for (bank = 0; bank < NR_BANKS; ++bank) {
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2007-02-13 05:26:23 -07:00
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if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
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continue;
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2006-06-26 05:58:53 -06:00
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for (block = 0; block < NR_BLOCKS; ++block) {
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if (block == 0)
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address = MSR_IA32_MC0_MISC + bank * 4;
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2007-02-13 05:26:23 -07:00
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else if (block == 1) {
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address = (low & MASK_BLKPTR_LO) >> 21;
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if (!address)
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break;
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address += MCG_XBLK_ADDR;
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}
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2006-06-26 05:58:53 -06:00
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else
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++address;
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if (rdmsr_safe(address, &low, &high))
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2007-02-13 05:26:23 -07:00
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break;
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2006-06-26 05:58:53 -06:00
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if (!(high & MASK_VALID_HI)) {
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if (block)
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continue;
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else
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break;
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}
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2007-02-13 05:26:23 -07:00
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if (!(high & MASK_CNTP_HI) ||
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(high & MASK_LOCKED_HI))
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2006-06-26 05:58:53 -06:00
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continue;
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2007-02-13 05:26:23 -07:00
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/* Log the machine check that caused the threshold
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event. */
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do_machine_check(NULL, 0);
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2006-06-26 05:58:53 -06:00
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if (high & MASK_OVERFLOW_HI) {
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rdmsrl(address, m.misc);
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rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
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m.status);
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m.bank = K8_MCE_THRESHOLD_BASE
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+ bank * NR_BLOCKS
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+ block;
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mce_log(&m);
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goto out;
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}
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2005-11-05 09:25:53 -07:00
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}
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}
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2006-06-26 05:58:56 -06:00
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out:
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2005-11-05 09:25:53 -07:00
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irq_exit();
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}
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/*
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* Sysfs Interface
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*/
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struct threshold_attr {
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2006-06-26 05:58:56 -06:00
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struct attribute attr;
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2006-06-26 05:58:53 -06:00
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ssize_t(*show) (struct threshold_block *, char *);
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ssize_t(*store) (struct threshold_block *, const char *, size_t count);
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2005-11-05 09:25:53 -07:00
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};
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static cpumask_t affinity_set(unsigned int cpu)
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{
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cpumask_t oldmask = current->cpus_allowed;
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cpumask_t newmask = CPU_MASK_NONE;
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cpu_set(cpu, newmask);
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set_cpus_allowed(current, newmask);
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return oldmask;
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}
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static void affinity_restore(cpumask_t oldmask)
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{
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set_cpus_allowed(current, oldmask);
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}
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2006-06-26 05:58:56 -06:00
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#define SHOW_FIELDS(name) \
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static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
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{ \
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return sprintf(buf, "%lx\n", (unsigned long) b->name); \
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}
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2005-11-05 09:25:53 -07:00
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SHOW_FIELDS(interrupt_enable)
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SHOW_FIELDS(threshold_limit)
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2006-06-26 05:58:53 -06:00
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static ssize_t store_interrupt_enable(struct threshold_block *b,
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2005-11-05 09:25:53 -07:00
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const char *buf, size_t count)
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{
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char *end;
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cpumask_t oldmask;
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unsigned long new = simple_strtoul(buf, &end, 0);
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if (end == buf)
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return -EINVAL;
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b->interrupt_enable = !!new;
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oldmask = affinity_set(b->cpu);
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threshold_restart_bank(b, 0, 0);
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affinity_restore(oldmask);
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return end - buf;
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}
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2006-06-26 05:58:53 -06:00
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static ssize_t store_threshold_limit(struct threshold_block *b,
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2005-11-05 09:25:53 -07:00
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const char *buf, size_t count)
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{
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char *end;
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cpumask_t oldmask;
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u16 old;
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unsigned long new = simple_strtoul(buf, &end, 0);
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if (end == buf)
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return -EINVAL;
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if (new > THRESHOLD_MAX)
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new = THRESHOLD_MAX;
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if (new < 1)
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new = 1;
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old = b->threshold_limit;
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b->threshold_limit = new;
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oldmask = affinity_set(b->cpu);
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threshold_restart_bank(b, 0, old);
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affinity_restore(oldmask);
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return end - buf;
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}
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2006-06-26 05:58:53 -06:00
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static ssize_t show_error_count(struct threshold_block *b, char *buf)
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2005-11-05 09:25:53 -07:00
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{
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u32 high, low;
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cpumask_t oldmask;
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oldmask = affinity_set(b->cpu);
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2006-06-26 05:58:53 -06:00
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rdmsr(b->address, low, high);
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2005-11-05 09:25:53 -07:00
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|
|
affinity_restore(oldmask);
|
|
|
|
return sprintf(buf, "%x\n",
|
|
|
|
(high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit));
|
|
|
|
}
|
|
|
|
|
2006-06-26 05:58:53 -06:00
|
|
|
static ssize_t store_error_count(struct threshold_block *b,
|
2005-11-05 09:25:53 -07:00
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
|
|
|
cpumask_t oldmask;
|
|
|
|
oldmask = affinity_set(b->cpu);
|
|
|
|
threshold_restart_bank(b, 1, 0);
|
|
|
|
affinity_restore(oldmask);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define THRESHOLD_ATTR(_name,_mode,_show,_store) { \
|
|
|
|
.attr = {.name = __stringify(_name), .mode = _mode }, \
|
|
|
|
.show = _show, \
|
|
|
|
.store = _store, \
|
|
|
|
};
|
|
|
|
|
2006-06-26 05:58:56 -06:00
|
|
|
#define RW_ATTR(name) \
|
|
|
|
static struct threshold_attr name = \
|
2005-11-05 09:25:53 -07:00
|
|
|
THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
|
|
|
|
|
2006-06-26 05:58:56 -06:00
|
|
|
RW_ATTR(interrupt_enable);
|
|
|
|
RW_ATTR(threshold_limit);
|
|
|
|
RW_ATTR(error_count);
|
2005-11-05 09:25:53 -07:00
|
|
|
|
|
|
|
static struct attribute *default_attrs[] = {
|
|
|
|
&interrupt_enable.attr,
|
|
|
|
&threshold_limit.attr,
|
|
|
|
&error_count.attr,
|
|
|
|
NULL
|
|
|
|
};
|
|
|
|
|
2006-06-26 05:58:53 -06:00
|
|
|
#define to_block(k) container_of(k, struct threshold_block, kobj)
|
2006-06-26 05:58:56 -06:00
|
|
|
#define to_attr(a) container_of(a, struct threshold_attr, attr)
|
2005-11-05 09:25:53 -07:00
|
|
|
|
|
|
|
static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
|
|
|
|
{
|
2006-06-26 05:58:53 -06:00
|
|
|
struct threshold_block *b = to_block(kobj);
|
2005-11-05 09:25:53 -07:00
|
|
|
struct threshold_attr *a = to_attr(attr);
|
|
|
|
ssize_t ret;
|
|
|
|
ret = a->show ? a->show(b, buf) : -EIO;
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t store(struct kobject *kobj, struct attribute *attr,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
2006-06-26 05:58:53 -06:00
|
|
|
struct threshold_block *b = to_block(kobj);
|
2005-11-05 09:25:53 -07:00
|
|
|
struct threshold_attr *a = to_attr(attr);
|
|
|
|
ssize_t ret;
|
|
|
|
ret = a->store ? a->store(b, buf, count) : -EIO;
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct sysfs_ops threshold_ops = {
|
|
|
|
.show = show,
|
|
|
|
.store = store,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct kobj_type threshold_ktype = {
|
|
|
|
.sysfs_ops = &threshold_ops,
|
|
|
|
.default_attrs = default_attrs,
|
|
|
|
};
|
|
|
|
|
2006-06-26 05:58:53 -06:00
|
|
|
static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
|
|
|
|
unsigned int bank,
|
|
|
|
unsigned int block,
|
|
|
|
u32 address)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
u32 low, high;
|
|
|
|
struct threshold_block *b = NULL;
|
|
|
|
|
|
|
|
if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (rdmsr_safe(address, &low, &high))
|
2007-02-13 05:26:23 -07:00
|
|
|
return 0;
|
2006-06-26 05:58:53 -06:00
|
|
|
|
|
|
|
if (!(high & MASK_VALID_HI)) {
|
|
|
|
if (block)
|
|
|
|
goto recurse;
|
|
|
|
else
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-02-13 05:26:23 -07:00
|
|
|
if (!(high & MASK_CNTP_HI) ||
|
|
|
|
(high & MASK_LOCKED_HI))
|
2006-06-26 05:58:53 -06:00
|
|
|
goto recurse;
|
|
|
|
|
|
|
|
b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
|
|
|
|
if (!b)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
b->block = block;
|
|
|
|
b->bank = bank;
|
|
|
|
b->cpu = cpu;
|
|
|
|
b->address = address;
|
|
|
|
b->interrupt_enable = 0;
|
|
|
|
b->threshold_limit = THRESHOLD_MAX;
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&b->miscj);
|
|
|
|
|
|
|
|
if (per_cpu(threshold_banks, cpu)[bank]->blocks)
|
|
|
|
list_add(&b->miscj,
|
|
|
|
&per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
|
|
|
|
else
|
|
|
|
per_cpu(threshold_banks, cpu)[bank]->blocks = b;
|
|
|
|
|
|
|
|
kobject_set_name(&b->kobj, "misc%i", block);
|
|
|
|
b->kobj.parent = &per_cpu(threshold_banks, cpu)[bank]->kobj;
|
|
|
|
b->kobj.ktype = &threshold_ktype;
|
|
|
|
err = kobject_register(&b->kobj);
|
|
|
|
if (err)
|
|
|
|
goto out_free;
|
|
|
|
recurse:
|
|
|
|
if (!block) {
|
|
|
|
address = (low & MASK_BLKPTR_LO) >> 21;
|
|
|
|
if (!address)
|
|
|
|
return 0;
|
|
|
|
address += MCG_XBLK_ADDR;
|
|
|
|
} else
|
|
|
|
++address;
|
|
|
|
|
|
|
|
err = allocate_threshold_blocks(cpu, bank, ++block, address);
|
|
|
|
if (err)
|
|
|
|
goto out_free;
|
|
|
|
|
|
|
|
return err;
|
|
|
|
|
|
|
|
out_free:
|
|
|
|
if (b) {
|
|
|
|
kobject_unregister(&b->kobj);
|
|
|
|
kfree(b);
|
|
|
|
}
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2005-11-05 09:25:53 -07:00
|
|
|
/* symlinks sibling shared banks to first core. first core owns dir/files. */
|
2006-06-26 05:58:53 -06:00
|
|
|
static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
|
2005-11-05 09:25:53 -07:00
|
|
|
{
|
2006-06-26 05:58:53 -06:00
|
|
|
int i, err = 0;
|
2006-01-11 14:45:57 -07:00
|
|
|
struct threshold_bank *b = NULL;
|
2006-06-26 05:58:53 -06:00
|
|
|
cpumask_t oldmask = CPU_MASK_NONE;
|
|
|
|
char name[32];
|
|
|
|
|
|
|
|
sprintf(name, "threshold_bank%i", bank);
|
2005-11-05 09:25:53 -07:00
|
|
|
|
|
|
|
#ifdef CONFIG_SMP
|
2006-06-26 05:58:17 -06:00
|
|
|
if (cpu_data[cpu].cpu_core_id && shared_bank[bank]) { /* symlink */
|
2006-06-26 05:58:53 -06:00
|
|
|
i = first_cpu(cpu_core_map[cpu]);
|
|
|
|
|
|
|
|
/* first core not up yet */
|
|
|
|
if (cpu_data[i].cpu_core_id)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
/* already linked */
|
|
|
|
if (per_cpu(threshold_banks, cpu)[bank])
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
b = per_cpu(threshold_banks, i)[bank];
|
2005-11-05 09:25:53 -07:00
|
|
|
|
|
|
|
if (!b)
|
|
|
|
goto out;
|
2006-06-26 05:58:53 -06:00
|
|
|
|
2006-06-26 05:58:50 -06:00
|
|
|
err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
|
2005-11-05 09:25:53 -07:00
|
|
|
&b->kobj, name);
|
|
|
|
if (err)
|
|
|
|
goto out;
|
2006-06-26 05:58:53 -06:00
|
|
|
|
|
|
|
b->cpus = cpu_core_map[cpu];
|
2005-11-05 09:25:53 -07:00
|
|
|
per_cpu(threshold_banks, cpu)[bank] = b;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2006-06-26 05:58:53 -06:00
|
|
|
b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
|
2005-11-05 09:25:53 -07:00
|
|
|
if (!b) {
|
|
|
|
err = -ENOMEM;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2006-06-26 05:58:50 -06:00
|
|
|
kobject_set_name(&b->kobj, "threshold_bank%i", bank);
|
|
|
|
b->kobj.parent = &per_cpu(device_mce, cpu).kobj;
|
2006-06-26 05:58:53 -06:00
|
|
|
#ifndef CONFIG_SMP
|
|
|
|
b->cpus = CPU_MASK_ALL;
|
|
|
|
#else
|
|
|
|
b->cpus = cpu_core_map[cpu];
|
|
|
|
#endif
|
2005-11-05 09:25:53 -07:00
|
|
|
err = kobject_register(&b->kobj);
|
2006-06-26 05:58:53 -06:00
|
|
|
if (err)
|
|
|
|
goto out_free;
|
|
|
|
|
2005-11-05 09:25:53 -07:00
|
|
|
per_cpu(threshold_banks, cpu)[bank] = b;
|
2006-06-26 05:58:53 -06:00
|
|
|
|
|
|
|
oldmask = affinity_set(cpu);
|
|
|
|
err = allocate_threshold_blocks(cpu, bank, 0,
|
|
|
|
MSR_IA32_MC0_MISC + bank * 4);
|
|
|
|
affinity_restore(oldmask);
|
|
|
|
|
|
|
|
if (err)
|
|
|
|
goto out_free;
|
|
|
|
|
|
|
|
for_each_cpu_mask(i, b->cpus) {
|
|
|
|
if (i == cpu)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
|
|
|
|
&b->kobj, name);
|
|
|
|
if (err)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
per_cpu(threshold_banks, i)[bank] = b;
|
|
|
|
}
|
|
|
|
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
out_free:
|
|
|
|
per_cpu(threshold_banks, cpu)[bank] = NULL;
|
|
|
|
kfree(b);
|
2006-06-26 05:58:56 -06:00
|
|
|
out:
|
2005-11-05 09:25:53 -07:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* create dir/files for all valid threshold banks */
|
|
|
|
static __cpuinit int threshold_create_device(unsigned int cpu)
|
|
|
|
{
|
2006-06-26 05:58:56 -06:00
|
|
|
unsigned int bank;
|
2005-11-05 09:25:53 -07:00
|
|
|
int err = 0;
|
|
|
|
|
|
|
|
for (bank = 0; bank < NR_BANKS; ++bank) {
|
|
|
|
if (!(per_cpu(bank_map, cpu) & 1 << bank))
|
|
|
|
continue;
|
|
|
|
err = threshold_create_bank(cpu, bank);
|
|
|
|
if (err)
|
|
|
|
goto out;
|
|
|
|
}
|
2006-06-26 05:58:56 -06:00
|
|
|
out:
|
2005-11-05 09:25:53 -07:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* let's be hotplug friendly.
|
|
|
|
* in case of multiple core processors, the first core always takes ownership
|
|
|
|
* of shared sysfs dir/files, and rest of the cores will be symlinked to it.
|
|
|
|
*/
|
|
|
|
|
2006-07-30 04:03:37 -06:00
|
|
|
static void deallocate_threshold_block(unsigned int cpu,
|
2006-06-26 05:58:53 -06:00
|
|
|
unsigned int bank)
|
|
|
|
{
|
|
|
|
struct threshold_block *pos = NULL;
|
|
|
|
struct threshold_block *tmp = NULL;
|
|
|
|
struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];
|
|
|
|
|
|
|
|
if (!head)
|
|
|
|
return;
|
|
|
|
|
|
|
|
list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
|
|
|
|
kobject_unregister(&pos->kobj);
|
|
|
|
list_del(&pos->miscj);
|
|
|
|
kfree(pos);
|
|
|
|
}
|
|
|
|
|
|
|
|
kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
|
|
|
|
per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
|
|
|
|
}
|
|
|
|
|
2006-07-30 04:03:37 -06:00
|
|
|
static void threshold_remove_bank(unsigned int cpu, int bank)
|
2005-11-05 09:25:53 -07:00
|
|
|
{
|
2006-06-26 05:58:53 -06:00
|
|
|
int i = 0;
|
2005-11-05 09:25:53 -07:00
|
|
|
struct threshold_bank *b;
|
2006-06-26 05:58:53 -06:00
|
|
|
char name[32];
|
2005-11-05 09:25:53 -07:00
|
|
|
|
|
|
|
b = per_cpu(threshold_banks, cpu)[bank];
|
2006-06-26 05:58:53 -06:00
|
|
|
|
2005-11-05 09:25:53 -07:00
|
|
|
if (!b)
|
|
|
|
return;
|
2006-06-26 05:58:53 -06:00
|
|
|
|
|
|
|
if (!b->blocks)
|
|
|
|
goto free_out;
|
|
|
|
|
|
|
|
sprintf(name, "threshold_bank%i", bank);
|
|
|
|
|
2006-12-06 21:38:17 -07:00
|
|
|
#ifdef CONFIG_SMP
|
2006-06-26 05:58:53 -06:00
|
|
|
/* sibling symlink */
|
|
|
|
if (shared_bank[bank] && b->blocks->cpu != cpu) {
|
2006-06-26 05:58:50 -06:00
|
|
|
sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
|
2006-07-10 09:06:09 -06:00
|
|
|
per_cpu(threshold_banks, cpu)[bank] = NULL;
|
2006-06-26 05:58:53 -06:00
|
|
|
return;
|
2005-11-05 09:25:53 -07:00
|
|
|
}
|
2006-12-06 21:38:17 -07:00
|
|
|
#endif
|
2006-06-26 05:58:53 -06:00
|
|
|
|
|
|
|
/* remove all sibling symlinks before unregistering */
|
|
|
|
for_each_cpu_mask(i, b->cpus) {
|
|
|
|
if (i == cpu)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
|
|
|
|
per_cpu(threshold_banks, i)[bank] = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
deallocate_threshold_block(cpu, bank);
|
|
|
|
|
|
|
|
free_out:
|
|
|
|
kobject_unregister(&b->kobj);
|
|
|
|
kfree(b);
|
|
|
|
per_cpu(threshold_banks, cpu)[bank] = NULL;
|
2005-11-05 09:25:53 -07:00
|
|
|
}
|
|
|
|
|
2006-07-30 04:03:37 -06:00
|
|
|
static void threshold_remove_device(unsigned int cpu)
|
2005-11-05 09:25:53 -07:00
|
|
|
{
|
2006-06-26 05:58:56 -06:00
|
|
|
unsigned int bank;
|
2005-11-05 09:25:53 -07:00
|
|
|
|
|
|
|
for (bank = 0; bank < NR_BANKS; ++bank) {
|
|
|
|
if (!(per_cpu(bank_map, cpu) & 1 << bank))
|
|
|
|
continue;
|
|
|
|
threshold_remove_bank(cpu, bank);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* get notified when a cpu comes on/off */
|
2006-07-30 04:03:37 -06:00
|
|
|
static int threshold_cpu_callback(struct notifier_block *nfb,
|
2005-11-05 09:25:53 -07:00
|
|
|
unsigned long action, void *hcpu)
|
|
|
|
{
|
|
|
|
/* cpu was unsigned int to begin with */
|
|
|
|
unsigned int cpu = (unsigned long)hcpu;
|
|
|
|
|
|
|
|
if (cpu >= NR_CPUS)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
switch (action) {
|
|
|
|
case CPU_ONLINE:
|
2007-05-09 03:35:10 -06:00
|
|
|
case CPU_ONLINE_FROZEN:
|
2005-11-05 09:25:53 -07:00
|
|
|
threshold_create_device(cpu);
|
|
|
|
break;
|
|
|
|
case CPU_DEAD:
|
2007-05-09 03:35:10 -06:00
|
|
|
case CPU_DEAD_FROZEN:
|
2005-11-05 09:25:53 -07:00
|
|
|
threshold_remove_device(cpu);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
out:
|
|
|
|
return NOTIFY_OK;
|
|
|
|
}
|
|
|
|
|
2006-07-30 04:03:37 -06:00
|
|
|
static struct notifier_block threshold_cpu_notifier = {
|
2005-11-05 09:25:53 -07:00
|
|
|
.notifier_call = threshold_cpu_callback,
|
|
|
|
};
|
|
|
|
|
|
|
|
static __init int threshold_init_device(void)
|
|
|
|
{
|
2006-06-26 05:58:56 -06:00
|
|
|
unsigned lcpu = 0;
|
2005-11-05 09:25:53 -07:00
|
|
|
|
|
|
|
/* to hit CPUs online before the notifier is up */
|
|
|
|
for_each_online_cpu(lcpu) {
|
2006-06-26 05:58:50 -06:00
|
|
|
int err = threshold_create_device(lcpu);
|
2005-11-05 09:25:53 -07:00
|
|
|
if (err)
|
2006-06-26 05:58:50 -06:00
|
|
|
return err;
|
2005-11-05 09:25:53 -07:00
|
|
|
}
|
2006-07-30 04:03:37 -06:00
|
|
|
register_hotcpu_notifier(&threshold_cpu_notifier);
|
2006-06-26 05:58:50 -06:00
|
|
|
return 0;
|
2005-11-05 09:25:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
device_initcall(threshold_init_device);
|