2009-12-11 02:24:15 -07:00
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/*
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* Copyright 2009 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Author: Ben Skeggs
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "drm_crtc_helper.h"
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#include "nouveau_drv.h"
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#include "nouveau_fb.h"
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#include "nouveau_hw.h"
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#include "nouveau_encoder.h"
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#include "nouveau_connector.h"
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static void
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nv04_display_store_initial_head_owner(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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if (dev_priv->chipset != 0x11) {
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dev_priv->crtc_owner = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_44);
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2010-07-19 19:08:25 -06:00
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return;
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2009-12-11 02:24:15 -07:00
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}
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/* reading CR44 is broken on nv11, so we attempt to infer it */
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if (nvReadMC(dev, NV_PBUS_DEBUG_1) & (1 << 28)) /* heads tied, restore both */
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dev_priv->crtc_owner = 0x4;
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else {
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uint8_t slaved_on_A, slaved_on_B;
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bool tvA = false;
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bool tvB = false;
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slaved_on_B = NVReadVgaCrtc(dev, 1, NV_CIO_CRE_PIXEL_INDEX) &
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0x80;
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if (slaved_on_B)
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tvB = !(NVReadVgaCrtc(dev, 1, NV_CIO_CRE_LCD__INDEX) &
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MASK(NV_CIO_CRE_LCD_LCD_SELECT));
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slaved_on_A = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX) &
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0x80;
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if (slaved_on_A)
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tvA = !(NVReadVgaCrtc(dev, 0, NV_CIO_CRE_LCD__INDEX) &
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MASK(NV_CIO_CRE_LCD_LCD_SELECT));
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if (slaved_on_A && !tvA)
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dev_priv->crtc_owner = 0x0;
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else if (slaved_on_B && !tvB)
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dev_priv->crtc_owner = 0x3;
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else if (slaved_on_A)
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dev_priv->crtc_owner = 0x0;
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else if (slaved_on_B)
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dev_priv->crtc_owner = 0x3;
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else
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dev_priv->crtc_owner = 0x0;
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}
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}
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2010-07-24 09:37:33 -06:00
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int
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nv04_display_early_init(struct drm_device *dev)
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{
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2010-07-24 09:42:20 -06:00
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/* Make the I2C buses accessible. */
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if (!nv_gf4_disp_arch(dev)) {
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uint32_t pmc_enable = nv_rd32(dev, NV03_PMC_ENABLE);
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if (!(pmc_enable & 1))
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nv_wr32(dev, NV03_PMC_ENABLE, pmc_enable | 1);
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}
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2010-07-24 09:37:33 -06:00
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/* Unlock the VGA CRTCs. */
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NVLockVgaCrtcs(dev, false);
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/* Make sure the CRTCs aren't in slaved mode. */
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if (nv_two_heads(dev)) {
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nv04_display_store_initial_head_owner(dev);
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NVSetOwner(dev, 0);
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}
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return 0;
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}
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void
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nv04_display_late_takedown(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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if (nv_two_heads(dev))
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NVSetOwner(dev, dev_priv->crtc_owner);
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NVLockVgaCrtcs(dev, true);
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}
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2009-12-11 02:24:15 -07:00
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int
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nv04_display_create(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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2010-02-23 17:03:05 -07:00
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struct dcb_table *dcb = &dev_priv->vbios.dcb;
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2010-06-27 22:35:50 -06:00
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struct drm_connector *connector, *ct;
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2009-12-11 02:24:15 -07:00
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struct drm_encoder *encoder;
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struct drm_crtc *crtc;
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int i, ret;
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2009-12-13 08:53:12 -07:00
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NV_DEBUG_KMS(dev, "\n");
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2009-12-11 02:24:15 -07:00
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2009-12-11 15:44:49 -07:00
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nouveau_hw_save_vga_fonts(dev, 1);
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2009-12-11 02:24:15 -07:00
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drm_mode_config_init(dev);
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drm_mode_create_scaling_mode_property(dev);
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drm_mode_create_dithering_property(dev);
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dev->mode_config.funcs = (void *)&nouveau_mode_config_funcs;
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dev->mode_config.min_width = 0;
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dev->mode_config.min_height = 0;
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switch (dev_priv->card_type) {
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case NV_04:
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dev->mode_config.max_width = 2048;
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dev->mode_config.max_height = 2048;
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break;
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default:
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dev->mode_config.max_width = 4096;
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dev->mode_config.max_height = 4096;
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break;
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}
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dev->mode_config.fb_base = dev_priv->fb_phys;
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nv04_crtc_create(dev, 0);
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if (nv_two_heads(dev))
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nv04_crtc_create(dev, 1);
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for (i = 0; i < dcb->entries; i++) {
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struct dcb_entry *dcbent = &dcb->entry[i];
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2010-06-27 22:35:50 -06:00
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connector = nouveau_connector_create(dev, dcbent->connector);
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if (IS_ERR(connector))
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continue;
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2009-12-11 02:24:15 -07:00
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switch (dcbent->type) {
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case OUTPUT_ANALOG:
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2010-06-27 22:35:50 -06:00
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ret = nv04_dac_create(connector, dcbent);
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2009-12-11 02:24:15 -07:00
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break;
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case OUTPUT_LVDS:
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case OUTPUT_TMDS:
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2010-06-27 22:35:50 -06:00
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ret = nv04_dfp_create(connector, dcbent);
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2009-12-11 02:24:15 -07:00
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break;
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case OUTPUT_TV:
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if (dcbent->location == DCB_LOC_ON_CHIP)
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2010-06-27 22:35:50 -06:00
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ret = nv17_tv_create(connector, dcbent);
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2009-12-11 02:24:15 -07:00
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else
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2010-06-27 22:35:50 -06:00
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ret = nv04_tv_create(connector, dcbent);
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2009-12-11 02:24:15 -07:00
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break;
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default:
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NV_WARN(dev, "DCB type %d not known\n", dcbent->type);
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continue;
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}
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if (ret)
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continue;
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}
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2010-06-27 22:35:50 -06:00
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list_for_each_entry_safe(connector, ct,
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&dev->mode_config.connector_list, head) {
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if (!connector->encoder_ids[0]) {
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NV_WARN(dev, "%s has no encoders, removing\n",
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drm_get_connector_name(connector));
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connector->funcs->destroy(connector);
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}
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}
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2009-12-11 02:24:15 -07:00
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/* Save previous state */
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
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crtc->funcs->save(crtc);
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list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
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struct drm_encoder_helper_funcs *func = encoder->helper_private;
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func->save(encoder);
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}
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return 0;
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}
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void
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nv04_display_destroy(struct drm_device *dev)
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{
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struct drm_encoder *encoder;
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struct drm_crtc *crtc;
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2009-12-13 08:53:12 -07:00
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NV_DEBUG_KMS(dev, "\n");
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2009-12-11 02:24:15 -07:00
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/* Turn every CRTC off. */
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
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struct drm_mode_set modeset = {
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.crtc = crtc,
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};
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crtc->funcs->set_config(&modeset);
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}
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/* Restore state */
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list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
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struct drm_encoder_helper_funcs *func = encoder->helper_private;
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func->restore(encoder);
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}
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
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crtc->funcs->restore(crtc);
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drm_mode_config_cleanup(dev);
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2009-12-11 15:44:49 -07:00
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nouveau_hw_save_vga_fonts(dev, 0);
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2009-12-11 02:24:15 -07:00
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}
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2010-07-24 09:37:33 -06:00
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int
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nv04_display_init(struct drm_device *dev)
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2009-12-11 02:24:15 -07:00
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{
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struct drm_encoder *encoder;
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struct drm_crtc *crtc;
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/* meh.. modeset apparently doesn't setup all the regs and depends
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* on pre-existing state, for now load the state of the card *before*
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* nouveau was loaded, and then do a modeset.
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*
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* best thing to do probably is to make save/restore routines not
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* save/restore "pre-load" state, but more general so we can save
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* on suspend too.
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*/
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list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
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struct drm_encoder_helper_funcs *func = encoder->helper_private;
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func->restore(encoder);
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}
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
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crtc->funcs->restore(crtc);
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2010-07-24 09:37:33 -06:00
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return 0;
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2009-12-11 02:24:15 -07:00
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}
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