2006-04-26 17:11:01 -06:00
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#ifndef _LINUX_ELF_EM_H
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#define _LINUX_ELF_EM_H
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/* These constants define the various ELF target machines */
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#define EM_NONE 0
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#define EM_M32 1
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#define EM_SPARC 2
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#define EM_386 3
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#define EM_68K 4
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#define EM_88K 5
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#define EM_486 6 /* Perhaps disused */
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#define EM_860 7
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#define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */
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2006-06-29 14:10:50 -06:00
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/* Next two are historical and binaries and
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modules of these types will be rejected by
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Linux. */
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#define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian */
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2006-04-26 17:11:01 -06:00
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#define EM_MIPS_RS4_BE 10 /* MIPS R4000 big-endian */
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2006-06-29 14:10:50 -06:00
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2006-04-26 17:11:01 -06:00
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#define EM_PARISC 15 /* HPPA */
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#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
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#define EM_PPC 20 /* PowerPC */
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2007-07-20 13:39:53 -06:00
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#define EM_PPC64 21 /* PowerPC64 */
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#define EM_SPU 23 /* Cell BE SPU */
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2006-04-26 17:11:01 -06:00
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#define EM_SH 42 /* SuperH */
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#define EM_SPARCV9 43 /* SPARC v9 64-bit */
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#define EM_IA_64 50 /* HP/Intel IA-64 */
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#define EM_X86_64 62 /* AMD x86-64 */
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#define EM_S390 22 /* IBM S/390 */
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#define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */
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#define EM_V850 87 /* NEC v850 */
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#define EM_M32R 88 /* Renesas M32R */
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#define EM_H8_300 46 /* Renesas H8/300,300H,H8S */
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2008-02-08 05:19:31 -07:00
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#define EM_MN10300 89 /* Panasonic/MEI MN10300, AM33 */
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blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 15:50:22 -06:00
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#define EM_BLACKFIN 106 /* ADI Blackfin Processor */
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2006-04-26 17:11:01 -06:00
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#define EM_FRV 0x5441 /* Fujitsu FR-V */
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[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 00:32:13 -06:00
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#define EM_AVR32 0x18ad /* Atmel AVR32 */
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2006-04-26 17:11:01 -06:00
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/*
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* This is an interim value that we will use until the committee comes
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* up with a final number.
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*/
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#define EM_ALPHA 0x9026
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/* Bogus old v850 magic number, used by old tools. */
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#define EM_CYGNUS_V850 0x9080
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/* Bogus old m32r magic number, used by old tools. */
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#define EM_CYGNUS_M32R 0x9041
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/* This is the old interim value for S/390 architecture */
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#define EM_S390_OLD 0xA390
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2008-02-08 05:19:31 -07:00
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/* Also Panasonic/MEI MN10300, AM33 */
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#define EM_CYGNUS_MN10300 0xbeef
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2006-04-26 17:11:01 -06:00
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#endif /* _LINUX_ELF_EM_H */
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