2005-04-16 16:20:36 -06:00
|
|
|
/*
|
|
|
|
* This file is subject to the terms and conditions of the GNU General Public
|
|
|
|
* License. See the file "COPYING" in the main directory of this archive
|
|
|
|
* for more details.
|
|
|
|
*
|
|
|
|
* Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 2003 Ralf Baechle
|
|
|
|
* Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
|
|
|
|
*/
|
|
|
|
#ifndef _ASM_PGTABLE_64_H
|
|
|
|
#define _ASM_PGTABLE_64_H
|
|
|
|
|
|
|
|
#include <linux/linkage.h>
|
|
|
|
|
|
|
|
#include <asm/addrspace.h>
|
|
|
|
#include <asm/page.h>
|
|
|
|
#include <asm/cachectl.h>
|
[MIPS] Load modules to CKSEG0 if CONFIG_BUILD_ELF64=n
This is a patch to load 64-bit modules to CKSEG0 so that can be
compiled with -msym32 option. This makes each module ~10% smaller.
* introduce MODULE_START and MODULE_END
* custom module_alloc()
* PGD for modules
* change XTLB refill handler synthesizer
* enable -msym32 for modules again
(revert ca78b1a5c6a6e70e052d3ea253828e49b5d07c8a)
New XTLB refill handler looks like this:
80000080 dmfc0 k0,C0_BADVADDR
80000084 bltz k0,800000e4 # goto l_module_alloc
80000088 lui k1,0x8046 # %high(pgd_current)
8000008c ld k1,24600(k1) # %low(pgd_current)
80000090 dsrl k0,k0,0x1b # l_vmalloc_done:
80000094 andi k0,k0,0x1ff8
80000098 daddu k1,k1,k0
8000009c dmfc0 k0,C0_BADVADDR
800000a0 ld k1,0(k1)
800000a4 dsrl k0,k0,0x12
800000a8 andi k0,k0,0xff8
800000ac daddu k1,k1,k0
800000b0 dmfc0 k0,C0_XCONTEXT
800000b4 ld k1,0(k1)
800000b8 andi k0,k0,0xff0
800000bc daddu k1,k1,k0
800000c0 ld k0,0(k1)
800000c4 ld k1,8(k1)
800000c8 dsrl k0,k0,0x6
800000cc mtc0 k0,C0_ENTRYLO0
800000d0 dsrl k1,k1,0x6
800000d4 mtc0 k1,C0_ENTRYL01
800000d8 nop
800000dc tlbwr
800000e0 eret
800000e4 dsll k1,k0,0x2 # l_module_alloc:
800000e8 bgez k1,80000008 # goto l_vmalloc
800000ec lui k1,0xc000
800000f0 dsubu k0,k0,k1
800000f4 lui k1,0x8046 # %high(module_pg_dir)
800000f8 beq zero,zero,80000000
800000fc nop
80000000 beq zero,zero,80000090 # goto l_vmalloc_done
80000004 daddiu k1,k1,0x4000
80000008 dsll32 k1,k1,0x0 # l_vmalloc:
8000000c dsubu k0,k0,k1
80000010 beq zero,zero,80000090 # goto l_vmalloc_done
80000014 lui k1,0x8046 # %high(swapper_pg_dir)
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-25 09:08:31 -06:00
|
|
|
#include <asm/fixmap.h>
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-12-04 14:52:36 -07:00
|
|
|
#ifdef CONFIG_PAGE_SIZE_64KB
|
|
|
|
#include <asm-generic/pgtable-nopmd.h>
|
|
|
|
#else
|
2005-02-10 05:19:59 -07:00
|
|
|
#include <asm-generic/pgtable-nopud.h>
|
2009-12-04 14:52:36 -07:00
|
|
|
#endif
|
2005-02-10 05:19:59 -07:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/*
|
|
|
|
* Each address space has 2 4K pages as its page directory, giving 1024
|
|
|
|
* (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
|
2005-02-10 05:19:59 -07:00
|
|
|
* single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
|
|
|
|
* tables. Each page table is also a single 4K page, giving 512 (==
|
|
|
|
* PTRS_PER_PTE) 8 byte ptes. Each pud entry is initialized to point to
|
|
|
|
* invalid_pmd_table, each pmd entry is initialized to point to
|
2005-04-16 16:20:36 -06:00
|
|
|
* invalid_pte_table, each pte is initialized to 0. When memory is low,
|
|
|
|
* and a pmd table or a page table allocation fails, empty_bad_pmd_table
|
|
|
|
* and empty_bad_page_table is returned back to higher layer code, so
|
|
|
|
* that the failure is recognized later on. Linux does not seem to
|
|
|
|
* handle these failures very well though. The empty_bad_page_table has
|
|
|
|
* invalid pte entries in it, to force page faults.
|
|
|
|
*
|
|
|
|
* Kernel mappings: kernel mappings are held in the swapper_pg_table.
|
|
|
|
* The layout is identical to userspace except it's indexed with the
|
|
|
|
* fault address - VMALLOC_START.
|
|
|
|
*/
|
|
|
|
|
2009-12-04 14:52:36 -07:00
|
|
|
|
|
|
|
/* PGDIR_SHIFT determines what a third-level page table entry can map */
|
|
|
|
#ifdef __PAGETABLE_PMD_FOLDED
|
|
|
|
#define PGDIR_SHIFT (PAGE_SHIFT + PAGE_SHIFT + PTE_ORDER - 3)
|
|
|
|
#else
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/* PMD_SHIFT determines the size of the area a second-level page table can map */
|
2005-02-10 05:19:59 -07:00
|
|
|
#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 3))
|
2005-04-16 16:20:36 -06:00
|
|
|
#define PMD_SIZE (1UL << PMD_SHIFT)
|
|
|
|
#define PMD_MASK (~(PMD_SIZE-1))
|
|
|
|
|
2009-12-04 14:52:36 -07:00
|
|
|
|
2005-02-10 05:19:59 -07:00
|
|
|
#define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3))
|
2009-12-04 14:52:36 -07:00
|
|
|
#endif
|
2005-04-16 16:20:36 -06:00
|
|
|
#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
|
|
|
|
#define PGDIR_MASK (~(PGDIR_SIZE-1))
|
|
|
|
|
|
|
|
/*
|
2005-02-10 05:19:59 -07:00
|
|
|
* For 4kB page size we use a 3 level page tree and an 8kB pud, which
|
2005-04-16 16:20:36 -06:00
|
|
|
* permits us mapping 40 bits of virtual address space.
|
|
|
|
*
|
|
|
|
* We used to implement 41 bits by having an order 1 pmd level but that seemed
|
|
|
|
* rather pointless.
|
|
|
|
*
|
|
|
|
* For 8kB page size we use a 3 level page tree which permits a total of
|
|
|
|
* 8TB of address space. Alternatively a 33-bit / 8GB organization using
|
|
|
|
* two levels would be easy to implement.
|
|
|
|
*
|
|
|
|
* For 16kB page size we use a 2 level page tree which permits a total of
|
2005-02-21 04:11:32 -07:00
|
|
|
* 36 bits of virtual address space. We could add a third level but it seems
|
2005-04-16 16:20:36 -06:00
|
|
|
* like at the moment there's no need for this.
|
|
|
|
*
|
|
|
|
* For 64kB page size we use a 2 level page table tree for a total of 42 bits
|
|
|
|
* of virtual address space.
|
|
|
|
*/
|
|
|
|
#ifdef CONFIG_PAGE_SIZE_4KB
|
|
|
|
#define PGD_ORDER 1
|
2005-02-10 05:19:59 -07:00
|
|
|
#define PUD_ORDER aieeee_attempt_to_allocate_pud
|
2005-04-16 16:20:36 -06:00
|
|
|
#define PMD_ORDER 0
|
|
|
|
#define PTE_ORDER 0
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_PAGE_SIZE_8KB
|
|
|
|
#define PGD_ORDER 0
|
2005-02-10 05:19:59 -07:00
|
|
|
#define PUD_ORDER aieeee_attempt_to_allocate_pud
|
2005-04-16 16:20:36 -06:00
|
|
|
#define PMD_ORDER 0
|
|
|
|
#define PTE_ORDER 0
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_PAGE_SIZE_16KB
|
|
|
|
#define PGD_ORDER 0
|
2005-02-10 05:19:59 -07:00
|
|
|
#define PUD_ORDER aieeee_attempt_to_allocate_pud
|
2005-04-16 16:20:36 -06:00
|
|
|
#define PMD_ORDER 0
|
|
|
|
#define PTE_ORDER 0
|
|
|
|
#endif
|
2009-04-02 06:07:10 -06:00
|
|
|
#ifdef CONFIG_PAGE_SIZE_32KB
|
|
|
|
#define PGD_ORDER 0
|
|
|
|
#define PUD_ORDER aieeee_attempt_to_allocate_pud
|
|
|
|
#define PMD_ORDER 0
|
|
|
|
#define PTE_ORDER 0
|
|
|
|
#endif
|
2005-04-16 16:20:36 -06:00
|
|
|
#ifdef CONFIG_PAGE_SIZE_64KB
|
|
|
|
#define PGD_ORDER 0
|
2005-02-10 05:19:59 -07:00
|
|
|
#define PUD_ORDER aieeee_attempt_to_allocate_pud
|
2009-12-04 14:52:36 -07:00
|
|
|
#define PMD_ORDER aieeee_attempt_to_allocate_pmd
|
2005-04-16 16:20:36 -06:00
|
|
|
#define PTE_ORDER 0
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
|
2009-12-04 14:52:36 -07:00
|
|
|
#ifndef __PAGETABLE_PMD_FOLDED
|
2005-04-16 16:20:36 -06:00
|
|
|
#define PTRS_PER_PMD ((PAGE_SIZE << PMD_ORDER) / sizeof(pmd_t))
|
2009-12-04 14:52:36 -07:00
|
|
|
#endif
|
2005-04-16 16:20:36 -06:00
|
|
|
#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
|
|
|
|
|
2010-10-14 12:32:33 -06:00
|
|
|
#if PGDIR_SIZE >= TASK_SIZE64
|
2006-08-23 09:15:49 -06:00
|
|
|
#define USER_PTRS_PER_PGD (1)
|
|
|
|
#else
|
2010-10-14 12:32:33 -06:00
|
|
|
#define USER_PTRS_PER_PGD (TASK_SIZE64 / PGDIR_SIZE)
|
2006-08-23 09:15:49 -06:00
|
|
|
#endif
|
|
|
|
#define FIRST_USER_ADDRESS 0UL
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2010-04-19 12:43:10 -06:00
|
|
|
/*
|
|
|
|
* TLB refill handlers also map the vmalloc area into xuseg. Avoid
|
|
|
|
* the first couple of pages so NULL pointer dereferences will still
|
|
|
|
* reliably trap.
|
|
|
|
*/
|
|
|
|
#define VMALLOC_START (MAP_BASE + (2 * PAGE_SIZE))
|
2005-04-16 16:20:36 -06:00
|
|
|
#define VMALLOC_END \
|
2010-04-19 12:43:10 -06:00
|
|
|
(MAP_BASE + \
|
2010-02-02 09:52:20 -07:00
|
|
|
min(PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \
|
|
|
|
(1UL << cpu_vmbits)) - (1UL << 32))
|
|
|
|
|
2007-02-15 06:21:36 -07:00
|
|
|
#if defined(CONFIG_MODULES) && defined(KBUILD_64BIT_SYM32) && \
|
[MIPS] Load modules to CKSEG0 if CONFIG_BUILD_ELF64=n
This is a patch to load 64-bit modules to CKSEG0 so that can be
compiled with -msym32 option. This makes each module ~10% smaller.
* introduce MODULE_START and MODULE_END
* custom module_alloc()
* PGD for modules
* change XTLB refill handler synthesizer
* enable -msym32 for modules again
(revert ca78b1a5c6a6e70e052d3ea253828e49b5d07c8a)
New XTLB refill handler looks like this:
80000080 dmfc0 k0,C0_BADVADDR
80000084 bltz k0,800000e4 # goto l_module_alloc
80000088 lui k1,0x8046 # %high(pgd_current)
8000008c ld k1,24600(k1) # %low(pgd_current)
80000090 dsrl k0,k0,0x1b # l_vmalloc_done:
80000094 andi k0,k0,0x1ff8
80000098 daddu k1,k1,k0
8000009c dmfc0 k0,C0_BADVADDR
800000a0 ld k1,0(k1)
800000a4 dsrl k0,k0,0x12
800000a8 andi k0,k0,0xff8
800000ac daddu k1,k1,k0
800000b0 dmfc0 k0,C0_XCONTEXT
800000b4 ld k1,0(k1)
800000b8 andi k0,k0,0xff0
800000bc daddu k1,k1,k0
800000c0 ld k0,0(k1)
800000c4 ld k1,8(k1)
800000c8 dsrl k0,k0,0x6
800000cc mtc0 k0,C0_ENTRYLO0
800000d0 dsrl k1,k1,0x6
800000d4 mtc0 k1,C0_ENTRYL01
800000d8 nop
800000dc tlbwr
800000e0 eret
800000e4 dsll k1,k0,0x2 # l_module_alloc:
800000e8 bgez k1,80000008 # goto l_vmalloc
800000ec lui k1,0xc000
800000f0 dsubu k0,k0,k1
800000f4 lui k1,0x8046 # %high(module_pg_dir)
800000f8 beq zero,zero,80000000
800000fc nop
80000000 beq zero,zero,80000090 # goto l_vmalloc_done
80000004 daddiu k1,k1,0x4000
80000008 dsll32 k1,k1,0x0 # l_vmalloc:
8000000c dsubu k0,k0,k1
80000010 beq zero,zero,80000090 # goto l_vmalloc_done
80000014 lui k1,0x8046 # %high(swapper_pg_dir)
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-25 09:08:31 -06:00
|
|
|
VMALLOC_START != CKSSEG
|
|
|
|
/* Load modules into 32bit-compatible segment. */
|
|
|
|
#define MODULE_START CKSSEG
|
|
|
|
#define MODULE_END (FIXADDR_START-2*PAGE_SIZE)
|
|
|
|
#endif
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
#define pte_ERROR(e) \
|
|
|
|
printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
|
2009-12-04 14:52:36 -07:00
|
|
|
#ifndef __PAGETABLE_PMD_FOLDED
|
2005-04-16 16:20:36 -06:00
|
|
|
#define pmd_ERROR(e) \
|
|
|
|
printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
|
2009-12-04 14:52:36 -07:00
|
|
|
#endif
|
2005-04-16 16:20:36 -06:00
|
|
|
#define pgd_ERROR(e) \
|
|
|
|
printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
|
|
|
|
|
2005-02-10 05:19:59 -07:00
|
|
|
extern pte_t invalid_pte_table[PTRS_PER_PTE];
|
|
|
|
extern pte_t empty_bad_page_table[PTRS_PER_PTE];
|
2009-12-04 14:52:36 -07:00
|
|
|
|
|
|
|
|
|
|
|
#ifndef __PAGETABLE_PMD_FOLDED
|
|
|
|
/*
|
|
|
|
* For 3-level pagetables we defines these ourselves, for 2-level the
|
|
|
|
* definitions are supplied by <asm-generic/pgtable-nopmd.h>.
|
|
|
|
*/
|
|
|
|
typedef struct { unsigned long pmd; } pmd_t;
|
|
|
|
#define pmd_val(x) ((x).pmd)
|
|
|
|
#define __pmd(x) ((pmd_t) { (x) } )
|
|
|
|
|
|
|
|
|
2005-02-10 05:19:59 -07:00
|
|
|
extern pmd_t invalid_pmd_table[PTRS_PER_PMD];
|
|
|
|
extern pmd_t empty_bad_pmd_table[PTRS_PER_PMD];
|
2009-12-04 14:52:36 -07:00
|
|
|
#endif
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/*
|
2005-04-01 07:07:13 -07:00
|
|
|
* Empty pgd/pmd entries point to the invalid_pte_table.
|
2005-04-16 16:20:36 -06:00
|
|
|
*/
|
|
|
|
static inline int pmd_none(pmd_t pmd)
|
|
|
|
{
|
|
|
|
return pmd_val(pmd) == (unsigned long) invalid_pte_table;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK)
|
|
|
|
|
|
|
|
static inline int pmd_present(pmd_t pmd)
|
|
|
|
{
|
|
|
|
return pmd_val(pmd) != (unsigned long) invalid_pte_table;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void pmd_clear(pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
|
|
|
|
}
|
2009-12-04 14:52:36 -07:00
|
|
|
#ifndef __PAGETABLE_PMD_FOLDED
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/*
|
2005-02-21 04:11:32 -07:00
|
|
|
* Empty pud entries point to the invalid_pmd_table.
|
2005-04-16 16:20:36 -06:00
|
|
|
*/
|
2005-02-10 05:19:59 -07:00
|
|
|
static inline int pud_none(pud_t pud)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-02-10 05:19:59 -07:00
|
|
|
return pud_val(pud) == (unsigned long) invalid_pmd_table;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2005-02-10 05:19:59 -07:00
|
|
|
static inline int pud_bad(pud_t pud)
|
|
|
|
{
|
|
|
|
return pud_val(pud) & ~PAGE_MASK;
|
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-02-10 05:19:59 -07:00
|
|
|
static inline int pud_present(pud_t pud)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-02-10 05:19:59 -07:00
|
|
|
return pud_val(pud) != (unsigned long) invalid_pmd_table;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2005-02-10 05:19:59 -07:00
|
|
|
static inline void pud_clear(pud_t *pudp)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-02-10 05:19:59 -07:00
|
|
|
pud_val(*pudp) = ((unsigned long) invalid_pmd_table);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2009-12-04 14:52:36 -07:00
|
|
|
#endif
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-04-01 07:07:13 -07:00
|
|
|
#define pte_page(x) pfn_to_page(pte_pfn(x))
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
#ifdef CONFIG_CPU_VR41XX
|
|
|
|
#define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
|
|
|
|
#define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
|
|
|
|
#else
|
2010-02-10 16:12:47 -07:00
|
|
|
#define pte_pfn(x) ((unsigned long)((x).pte >> _PFN_SHIFT))
|
|
|
|
#define pfn_pte(pfn, prot) __pte(((pfn) << _PFN_SHIFT) | pgprot_val(prot))
|
2005-04-16 16:20:36 -06:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#define __pgd_offset(address) pgd_index(address)
|
2005-02-21 04:11:32 -07:00
|
|
|
#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
|
2005-04-01 07:07:13 -07:00
|
|
|
#define __pmd_offset(address) pmd_index(address)
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* to find an entry in a kernel page-table-directory */
|
2009-09-03 08:29:53 -06:00
|
|
|
#define pgd_offset_k(address) pgd_offset(&init_mm, address)
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-02-21 04:11:32 -07:00
|
|
|
#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
|
2005-04-01 07:07:13 -07:00
|
|
|
#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* to find an entry in a page-table-directory */
|
2007-10-11 16:46:15 -06:00
|
|
|
#define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-12-04 14:52:36 -07:00
|
|
|
#ifndef __PAGETABLE_PMD_FOLDED
|
2006-09-26 00:31:48 -06:00
|
|
|
static inline unsigned long pud_page_vaddr(pud_t pud)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-02-10 05:19:59 -07:00
|
|
|
return pud_val(pud);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2007-03-19 10:36:42 -06:00
|
|
|
#define pud_phys(pud) virt_to_phys((void *)pud_val(pud))
|
2006-09-26 00:31:48 -06:00
|
|
|
#define pud_page(pud) (pfn_to_page(pud_phys(pud) >> PAGE_SHIFT))
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* Find an entry in the second-level page table.. */
|
2005-02-10 05:19:59 -07:00
|
|
|
static inline pmd_t *pmd_offset(pud_t * pud, unsigned long address)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2006-09-26 00:31:48 -06:00
|
|
|
return (pmd_t *) pud_page_vaddr(*pud) + pmd_index(address);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2009-12-04 14:52:36 -07:00
|
|
|
#endif
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* Find an entry in the third-level page table.. */
|
|
|
|
#define __pte_offset(address) \
|
|
|
|
(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
|
|
|
|
#define pte_offset(dir, address) \
|
2006-12-05 02:39:56 -07:00
|
|
|
((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
|
2005-04-16 16:20:36 -06:00
|
|
|
#define pte_offset_kernel(dir, address) \
|
2006-12-05 02:39:56 -07:00
|
|
|
((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
|
2005-04-16 16:20:36 -06:00
|
|
|
#define pte_offset_map(dir, address) \
|
|
|
|
((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
|
|
|
|
#define pte_unmap(pte) ((void)(pte))
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialize a new pgd / pmd table with invalid pointers.
|
|
|
|
*/
|
|
|
|
extern void pgd_init(unsigned long page);
|
|
|
|
extern void pmd_init(unsigned long page, unsigned long pagetable);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Non-present pages: high 24 bits are offset, next 8 bits type,
|
|
|
|
* low 32 bits zero.
|
|
|
|
*/
|
|
|
|
static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
|
|
|
|
{ pte_t pte; pte_val(pte) = (type << 32) | (offset << 40); return pte; }
|
|
|
|
|
|
|
|
#define __swp_type(x) (((x).val >> 32) & 0xff)
|
|
|
|
#define __swp_offset(x) ((x).val >> 40)
|
2007-10-11 16:46:15 -06:00
|
|
|
#define __swp_entry(type, offset) ((swp_entry_t) { pte_val(mk_swap_pte((type), (offset))) })
|
2005-04-16 16:20:36 -06:00
|
|
|
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
|
|
|
|
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
|
|
|
|
|
|
|
|
/*
|
2006-05-27 12:39:39 -06:00
|
|
|
* Bits 0, 4, 6, and 7 are taken. Let's leave bits 1, 2, 3, and 5 alone to
|
|
|
|
* make things easier, and only use the upper 56 bits for the page offset...
|
2005-04-16 16:20:36 -06:00
|
|
|
*/
|
2006-05-27 12:39:39 -06:00
|
|
|
#define PTE_FILE_MAX_BITS 56
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2006-05-27 12:39:39 -06:00
|
|
|
#define pte_to_pgoff(_pte) ((_pte).pte >> 8)
|
|
|
|
#define pgoff_to_pte(off) ((pte_t) { ((off) << 8) | _PAGE_FILE })
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
#endif /* _ASM_PGTABLE_64_H */
|