2011-01-10 21:32:31 -07:00
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/*
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* Copyright (C) 2008-2010
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*
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* - Kurt Van Dijck, EIA Electronics
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the version 2 of the GNU General Public License
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* as published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/firmware.h>
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#include <linux/sched.h>
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#include <asm/div64.h>
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2011-06-16 05:01:34 -06:00
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#include <asm/io.h>
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2011-01-10 21:32:31 -07:00
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#include "softing.h"
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/*
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* low level DPRAM command.
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* Make sure that card->dpram[DPRAM_FCT_HOST] is preset
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*/
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static int _softing_fct_cmd(struct softing *card, int16_t cmd, uint16_t vector,
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const char *msg)
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{
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int ret;
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unsigned long stamp;
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iowrite16(cmd, &card->dpram[DPRAM_FCT_PARAM]);
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iowrite8(vector >> 8, &card->dpram[DPRAM_FCT_HOST + 1]);
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iowrite8(vector, &card->dpram[DPRAM_FCT_HOST]);
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/* be sure to flush this to the card */
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wmb();
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stamp = jiffies + 1 * HZ;
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/* wait for card */
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do {
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/* DPRAM_FCT_HOST is _not_ aligned */
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ret = ioread8(&card->dpram[DPRAM_FCT_HOST]) +
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(ioread8(&card->dpram[DPRAM_FCT_HOST + 1]) << 8);
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/* don't have any cached variables */
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rmb();
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if (ret == RES_OK)
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/* read return-value now */
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return ioread16(&card->dpram[DPRAM_FCT_RESULT]);
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if ((ret != vector) || time_after(jiffies, stamp))
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break;
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/* process context => relax */
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usleep_range(500, 10000);
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} while (1);
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ret = (ret == RES_NONE) ? -ETIMEDOUT : -ECANCELED;
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dev_alert(&card->pdev->dev, "firmware %s failed (%i)\n", msg, ret);
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return ret;
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}
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static int softing_fct_cmd(struct softing *card, int16_t cmd, const char *msg)
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{
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int ret;
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ret = _softing_fct_cmd(card, cmd, 0, msg);
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if (ret > 0) {
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dev_alert(&card->pdev->dev, "%s returned %u\n", msg, ret);
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ret = -EIO;
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}
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return ret;
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}
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int softing_bootloader_command(struct softing *card, int16_t cmd,
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const char *msg)
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{
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int ret;
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unsigned long stamp;
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iowrite16(RES_NONE, &card->dpram[DPRAM_RECEIPT]);
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iowrite16(cmd, &card->dpram[DPRAM_COMMAND]);
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/* be sure to flush this to the card */
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wmb();
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stamp = jiffies + 3 * HZ;
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/* wait for card */
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do {
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ret = ioread16(&card->dpram[DPRAM_RECEIPT]);
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/* don't have any cached variables */
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rmb();
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if (ret == RES_OK)
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return 0;
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if (time_after(jiffies, stamp))
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break;
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/* process context => relax */
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usleep_range(500, 10000);
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} while (!signal_pending(current));
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ret = (ret == RES_NONE) ? -ETIMEDOUT : -ECANCELED;
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dev_alert(&card->pdev->dev, "bootloader %s failed (%i)\n", msg, ret);
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return ret;
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}
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static int fw_parse(const uint8_t **pmem, uint16_t *ptype, uint32_t *paddr,
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uint16_t *plen, const uint8_t **pdat)
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{
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uint16_t checksum[2];
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const uint8_t *mem;
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const uint8_t *end;
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/*
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* firmware records are a binary, unaligned stream composed of:
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* uint16_t type;
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* uint32_t addr;
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* uint16_t len;
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* uint8_t dat[len];
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* uint16_t checksum;
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* all values in little endian.
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* We could define a struct for this, with __attribute__((packed)),
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* but would that solve the alignment in _all_ cases (cfr. the
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* struct itself may be an odd address)?
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*
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* I chose to use leXX_to_cpup() since this solves both
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* endianness & alignment.
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*/
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mem = *pmem;
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*ptype = le16_to_cpup((void *)&mem[0]);
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*paddr = le32_to_cpup((void *)&mem[2]);
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*plen = le16_to_cpup((void *)&mem[6]);
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*pdat = &mem[8];
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/* verify checksum */
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end = &mem[8 + *plen];
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checksum[0] = le16_to_cpup((void *)end);
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for (checksum[1] = 0; mem < end; ++mem)
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checksum[1] += *mem;
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if (checksum[0] != checksum[1])
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return -EINVAL;
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/* increment */
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*pmem += 10 + *plen;
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return 0;
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}
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int softing_load_fw(const char *file, struct softing *card,
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__iomem uint8_t *dpram, unsigned int size, int offset)
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{
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const struct firmware *fw;
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int ret;
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const uint8_t *mem, *end, *dat;
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uint16_t type, len;
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uint32_t addr;
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uint8_t *buf = NULL;
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int buflen = 0;
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int8_t type_end = 0;
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ret = request_firmware(&fw, file, &card->pdev->dev);
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if (ret < 0)
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return ret;
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dev_dbg(&card->pdev->dev, "%s, firmware(%s) got %u bytes"
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", offset %c0x%04x\n",
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card->pdat->name, file, (unsigned int)fw->size,
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(offset >= 0) ? '+' : '-', (unsigned int)abs(offset));
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/* parse the firmware */
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mem = fw->data;
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end = &mem[fw->size];
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/* look for header record */
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ret = fw_parse(&mem, &type, &addr, &len, &dat);
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if (ret < 0)
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goto failed;
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if (type != 0xffff)
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goto failed;
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if (strncmp("Structured Binary Format, Softing GmbH" , dat, len)) {
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ret = -EINVAL;
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goto failed;
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}
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/* ok, we had a header */
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while (mem < end) {
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ret = fw_parse(&mem, &type, &addr, &len, &dat);
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if (ret < 0)
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goto failed;
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if (type == 3) {
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/* start address, not used here */
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continue;
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} else if (type == 1) {
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/* eof */
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type_end = 1;
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break;
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} else if (type != 0) {
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ret = -EINVAL;
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goto failed;
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}
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if ((addr + len + offset) > size)
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goto failed;
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memcpy_toio(&dpram[addr + offset], dat, len);
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/* be sure to flush caches from IO space */
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mb();
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if (len > buflen) {
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/* align buflen */
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buflen = (len + (1024-1)) & ~(1024-1);
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buf = krealloc(buf, buflen, GFP_KERNEL);
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if (!buf) {
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ret = -ENOMEM;
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goto failed;
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}
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}
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/* verify record data */
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memcpy_fromio(buf, &dpram[addr + offset], len);
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if (memcmp(buf, dat, len)) {
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/* is not ok */
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dev_alert(&card->pdev->dev, "DPRAM readback failed\n");
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ret = -EIO;
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goto failed;
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}
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}
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if (!type_end)
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/* no end record seen */
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goto failed;
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ret = 0;
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failed:
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kfree(buf);
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release_firmware(fw);
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if (ret < 0)
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dev_info(&card->pdev->dev, "firmware %s failed\n", file);
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return ret;
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}
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int softing_load_app_fw(const char *file, struct softing *card)
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{
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const struct firmware *fw;
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const uint8_t *mem, *end, *dat;
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int ret, j;
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uint16_t type, len;
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uint32_t addr, start_addr = 0;
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unsigned int sum, rx_sum;
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int8_t type_end = 0, type_entrypoint = 0;
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ret = request_firmware(&fw, file, &card->pdev->dev);
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if (ret) {
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dev_alert(&card->pdev->dev, "request_firmware(%s) got %i\n",
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file, ret);
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return ret;
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}
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dev_dbg(&card->pdev->dev, "firmware(%s) got %lu bytes\n",
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file, (unsigned long)fw->size);
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/* parse the firmware */
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mem = fw->data;
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end = &mem[fw->size];
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/* look for header record */
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ret = fw_parse(&mem, &type, &addr, &len, &dat);
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if (ret)
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goto failed;
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ret = -EINVAL;
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if (type != 0xffff) {
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dev_alert(&card->pdev->dev, "firmware starts with type 0x%x\n",
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type);
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goto failed;
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}
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if (strncmp("Structured Binary Format, Softing GmbH", dat, len)) {
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dev_alert(&card->pdev->dev, "firmware string '%.*s' fault\n",
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len, dat);
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goto failed;
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}
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/* ok, we had a header */
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while (mem < end) {
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ret = fw_parse(&mem, &type, &addr, &len, &dat);
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if (ret)
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goto failed;
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if (type == 3) {
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/* start address */
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start_addr = addr;
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type_entrypoint = 1;
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continue;
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} else if (type == 1) {
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/* eof */
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type_end = 1;
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break;
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} else if (type != 0) {
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dev_alert(&card->pdev->dev,
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"unknown record type 0x%04x\n", type);
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ret = -EINVAL;
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goto failed;
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}
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/* regualar data */
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for (sum = 0, j = 0; j < len; ++j)
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sum += dat[j];
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/* work in 16bit (target) */
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sum &= 0xffff;
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memcpy_toio(&card->dpram[card->pdat->app.offs], dat, len);
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iowrite32(card->pdat->app.offs + card->pdat->app.addr,
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&card->dpram[DPRAM_COMMAND + 2]);
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iowrite32(addr, &card->dpram[DPRAM_COMMAND + 6]);
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iowrite16(len, &card->dpram[DPRAM_COMMAND + 10]);
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iowrite8(1, &card->dpram[DPRAM_COMMAND + 12]);
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ret = softing_bootloader_command(card, 1, "loading app.");
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if (ret < 0)
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goto failed;
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/* verify checksum */
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rx_sum = ioread16(&card->dpram[DPRAM_RECEIPT + 2]);
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if (rx_sum != sum) {
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dev_alert(&card->pdev->dev, "SRAM seems to be damaged"
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", wanted 0x%04x, got 0x%04x\n", sum, rx_sum);
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ret = -EIO;
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goto failed;
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}
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}
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if (!type_end || !type_entrypoint)
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goto failed;
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/* start application in card */
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iowrite32(start_addr, &card->dpram[DPRAM_COMMAND + 2]);
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iowrite8(1, &card->dpram[DPRAM_COMMAND + 6]);
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ret = softing_bootloader_command(card, 3, "start app.");
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if (ret < 0)
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goto failed;
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ret = 0;
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failed:
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release_firmware(fw);
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if (ret < 0)
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dev_info(&card->pdev->dev, "firmware %s failed\n", file);
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return ret;
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}
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static int softing_reset_chip(struct softing *card)
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{
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int ret;
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do {
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/* reset chip */
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iowrite8(0, &card->dpram[DPRAM_RESET_RX_FIFO]);
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iowrite8(0, &card->dpram[DPRAM_RESET_RX_FIFO+1]);
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iowrite8(1, &card->dpram[DPRAM_RESET]);
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iowrite8(0, &card->dpram[DPRAM_RESET+1]);
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ret = softing_fct_cmd(card, 0, "reset_can");
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if (!ret)
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break;
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if (signal_pending(current))
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/* don't wait any longer */
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break;
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} while (1);
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card->tx.pending = 0;
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return ret;
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}
|
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|
|
int softing_chip_poweron(struct softing *card)
|
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|
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{
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int ret;
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|
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/* sync */
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ret = _softing_fct_cmd(card, 99, 0x55, "sync-a");
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if (ret < 0)
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goto failed;
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ret = _softing_fct_cmd(card, 99, 0xaa, "sync-b");
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if (ret < 0)
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goto failed;
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ret = softing_reset_chip(card);
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if (ret < 0)
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goto failed;
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|
|
/* get_serial */
|
|
|
|
ret = softing_fct_cmd(card, 43, "get_serial_number");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
card->id.serial = ioread32(&card->dpram[DPRAM_FCT_PARAM]);
|
|
|
|
/* get_version */
|
|
|
|
ret = softing_fct_cmd(card, 12, "get_version");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
card->id.fw_version = ioread16(&card->dpram[DPRAM_FCT_PARAM + 2]);
|
|
|
|
card->id.hw_version = ioread16(&card->dpram[DPRAM_FCT_PARAM + 4]);
|
|
|
|
card->id.license = ioread16(&card->dpram[DPRAM_FCT_PARAM + 6]);
|
|
|
|
card->id.chip[0] = ioread16(&card->dpram[DPRAM_FCT_PARAM + 8]);
|
|
|
|
card->id.chip[1] = ioread16(&card->dpram[DPRAM_FCT_PARAM + 10]);
|
|
|
|
return 0;
|
|
|
|
failed:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void softing_initialize_timestamp(struct softing *card)
|
|
|
|
{
|
|
|
|
uint64_t ovf;
|
|
|
|
|
|
|
|
card->ts_ref = ktime_get();
|
|
|
|
|
|
|
|
/* 16MHz is the reference */
|
|
|
|
ovf = 0x100000000ULL * 16;
|
|
|
|
do_div(ovf, card->pdat->freq ?: 16);
|
|
|
|
|
|
|
|
card->ts_overflow = ktime_add_us(ktime_set(0, 0), ovf);
|
|
|
|
}
|
|
|
|
|
|
|
|
ktime_t softing_raw2ktime(struct softing *card, u32 raw)
|
|
|
|
{
|
|
|
|
uint64_t rawl;
|
|
|
|
ktime_t now, real_offset;
|
|
|
|
ktime_t target;
|
|
|
|
ktime_t tmp;
|
|
|
|
|
|
|
|
now = ktime_get();
|
|
|
|
real_offset = ktime_sub(ktime_get_real(), now);
|
|
|
|
|
|
|
|
/* find nsec from card */
|
|
|
|
rawl = raw * 16;
|
|
|
|
do_div(rawl, card->pdat->freq ?: 16);
|
|
|
|
target = ktime_add_us(card->ts_ref, rawl);
|
|
|
|
/* test for overflows */
|
|
|
|
tmp = ktime_add(target, card->ts_overflow);
|
|
|
|
while (unlikely(ktime_to_ns(tmp) > ktime_to_ns(now))) {
|
|
|
|
card->ts_ref = ktime_add(card->ts_ref, card->ts_overflow);
|
|
|
|
target = tmp;
|
|
|
|
tmp = ktime_add(target, card->ts_overflow);
|
|
|
|
}
|
|
|
|
return ktime_add(target, real_offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int softing_error_reporting(struct net_device *netdev)
|
|
|
|
{
|
|
|
|
struct softing_priv *priv = netdev_priv(netdev);
|
|
|
|
|
|
|
|
return (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
|
|
|
|
? 1 : 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int softing_startstop(struct net_device *dev, int up)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct softing *card;
|
|
|
|
struct softing_priv *priv;
|
|
|
|
struct net_device *netdev;
|
|
|
|
int bus_bitmask_start;
|
|
|
|
int j, error_reporting;
|
|
|
|
struct can_frame msg;
|
|
|
|
const struct can_bittiming *bt;
|
|
|
|
|
|
|
|
priv = netdev_priv(dev);
|
|
|
|
card = priv->card;
|
|
|
|
|
|
|
|
if (!card->fw.up)
|
|
|
|
return -EIO;
|
|
|
|
|
|
|
|
ret = mutex_lock_interruptible(&card->fw.lock);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
bus_bitmask_start = 0;
|
|
|
|
if (dev && up)
|
|
|
|
/* prepare to start this bus as well */
|
|
|
|
bus_bitmask_start |= (1 << priv->index);
|
|
|
|
/* bring netdevs down */
|
|
|
|
for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
|
|
|
|
netdev = card->net[j];
|
|
|
|
if (!netdev)
|
|
|
|
continue;
|
|
|
|
priv = netdev_priv(netdev);
|
|
|
|
|
|
|
|
if (dev != netdev)
|
|
|
|
netif_stop_queue(netdev);
|
|
|
|
|
|
|
|
if (netif_running(netdev)) {
|
|
|
|
if (dev != netdev)
|
|
|
|
bus_bitmask_start |= (1 << j);
|
|
|
|
priv->tx.pending = 0;
|
|
|
|
priv->tx.echo_put = 0;
|
|
|
|
priv->tx.echo_get = 0;
|
|
|
|
/*
|
|
|
|
* this bus' may just have called open_candev()
|
|
|
|
* which is rather stupid to call close_candev()
|
|
|
|
* already
|
|
|
|
* but we may come here from busoff recovery too
|
|
|
|
* in which case the echo_skb _needs_ flushing too.
|
|
|
|
* just be sure to call open_candev() again
|
|
|
|
*/
|
|
|
|
close_candev(netdev);
|
|
|
|
}
|
|
|
|
priv->can.state = CAN_STATE_STOPPED;
|
|
|
|
}
|
|
|
|
card->tx.pending = 0;
|
|
|
|
|
|
|
|
softing_enable_irq(card, 0);
|
|
|
|
ret = softing_reset_chip(card);
|
|
|
|
if (ret)
|
|
|
|
goto failed;
|
|
|
|
if (!bus_bitmask_start)
|
|
|
|
/* no busses to be brought up */
|
|
|
|
goto card_done;
|
|
|
|
|
|
|
|
if ((bus_bitmask_start & 1) && (bus_bitmask_start & 2)
|
|
|
|
&& (softing_error_reporting(card->net[0])
|
|
|
|
!= softing_error_reporting(card->net[1]))) {
|
|
|
|
dev_alert(&card->pdev->dev,
|
|
|
|
"err_reporting flag differs for busses\n");
|
|
|
|
goto invalid;
|
|
|
|
}
|
|
|
|
error_reporting = 0;
|
|
|
|
if (bus_bitmask_start & 1) {
|
|
|
|
netdev = card->net[0];
|
|
|
|
priv = netdev_priv(netdev);
|
|
|
|
error_reporting += softing_error_reporting(netdev);
|
|
|
|
/* init chip 1 */
|
|
|
|
bt = &priv->can.bittiming;
|
|
|
|
iowrite16(bt->brp, &card->dpram[DPRAM_FCT_PARAM + 2]);
|
|
|
|
iowrite16(bt->sjw, &card->dpram[DPRAM_FCT_PARAM + 4]);
|
|
|
|
iowrite16(bt->phase_seg1 + bt->prop_seg,
|
|
|
|
&card->dpram[DPRAM_FCT_PARAM + 6]);
|
|
|
|
iowrite16(bt->phase_seg2, &card->dpram[DPRAM_FCT_PARAM + 8]);
|
|
|
|
iowrite16((priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) ? 1 : 0,
|
|
|
|
&card->dpram[DPRAM_FCT_PARAM + 10]);
|
|
|
|
ret = softing_fct_cmd(card, 1, "initialize_chip[0]");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
/* set mode */
|
|
|
|
iowrite16(0, &card->dpram[DPRAM_FCT_PARAM + 2]);
|
|
|
|
iowrite16(0, &card->dpram[DPRAM_FCT_PARAM + 4]);
|
|
|
|
ret = softing_fct_cmd(card, 3, "set_mode[0]");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
/* set filter */
|
|
|
|
/* 11bit id & mask */
|
|
|
|
iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 2]);
|
|
|
|
iowrite16(0x07ff, &card->dpram[DPRAM_FCT_PARAM + 4]);
|
|
|
|
/* 29bit id.lo & mask.lo & id.hi & mask.hi */
|
|
|
|
iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 6]);
|
|
|
|
iowrite16(0xffff, &card->dpram[DPRAM_FCT_PARAM + 8]);
|
|
|
|
iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 10]);
|
|
|
|
iowrite16(0x1fff, &card->dpram[DPRAM_FCT_PARAM + 12]);
|
|
|
|
ret = softing_fct_cmd(card, 7, "set_filter[0]");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
/* set output control */
|
|
|
|
iowrite16(priv->output, &card->dpram[DPRAM_FCT_PARAM + 2]);
|
|
|
|
ret = softing_fct_cmd(card, 5, "set_output[0]");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
}
|
|
|
|
if (bus_bitmask_start & 2) {
|
|
|
|
netdev = card->net[1];
|
|
|
|
priv = netdev_priv(netdev);
|
|
|
|
error_reporting += softing_error_reporting(netdev);
|
|
|
|
/* init chip2 */
|
|
|
|
bt = &priv->can.bittiming;
|
|
|
|
iowrite16(bt->brp, &card->dpram[DPRAM_FCT_PARAM + 2]);
|
|
|
|
iowrite16(bt->sjw, &card->dpram[DPRAM_FCT_PARAM + 4]);
|
|
|
|
iowrite16(bt->phase_seg1 + bt->prop_seg,
|
|
|
|
&card->dpram[DPRAM_FCT_PARAM + 6]);
|
|
|
|
iowrite16(bt->phase_seg2, &card->dpram[DPRAM_FCT_PARAM + 8]);
|
|
|
|
iowrite16((priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) ? 1 : 0,
|
|
|
|
&card->dpram[DPRAM_FCT_PARAM + 10]);
|
|
|
|
ret = softing_fct_cmd(card, 2, "initialize_chip[1]");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
/* set mode2 */
|
|
|
|
iowrite16(0, &card->dpram[DPRAM_FCT_PARAM + 2]);
|
|
|
|
iowrite16(0, &card->dpram[DPRAM_FCT_PARAM + 4]);
|
|
|
|
ret = softing_fct_cmd(card, 4, "set_mode[1]");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
/* set filter2 */
|
|
|
|
/* 11bit id & mask */
|
|
|
|
iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 2]);
|
|
|
|
iowrite16(0x07ff, &card->dpram[DPRAM_FCT_PARAM + 4]);
|
|
|
|
/* 29bit id.lo & mask.lo & id.hi & mask.hi */
|
|
|
|
iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 6]);
|
|
|
|
iowrite16(0xffff, &card->dpram[DPRAM_FCT_PARAM + 8]);
|
|
|
|
iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 10]);
|
|
|
|
iowrite16(0x1fff, &card->dpram[DPRAM_FCT_PARAM + 12]);
|
|
|
|
ret = softing_fct_cmd(card, 8, "set_filter[1]");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
/* set output control2 */
|
|
|
|
iowrite16(priv->output, &card->dpram[DPRAM_FCT_PARAM + 2]);
|
|
|
|
ret = softing_fct_cmd(card, 6, "set_output[1]");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
}
|
|
|
|
/* enable_error_frame */
|
|
|
|
/*
|
|
|
|
* Error reporting is switched off at the moment since
|
|
|
|
* the receiving of them is not yet 100% verified
|
|
|
|
* This should be enabled sooner or later
|
|
|
|
*
|
|
|
|
if (error_reporting) {
|
|
|
|
ret = softing_fct_cmd(card, 51, "enable_error_frame");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
}
|
|
|
|
*/
|
|
|
|
/* initialize interface */
|
|
|
|
iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 2]);
|
|
|
|
iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 4]);
|
|
|
|
iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 6]);
|
|
|
|
iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 8]);
|
|
|
|
iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 10]);
|
|
|
|
iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 12]);
|
|
|
|
iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 14]);
|
|
|
|
iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 16]);
|
|
|
|
iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 18]);
|
|
|
|
iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 20]);
|
|
|
|
ret = softing_fct_cmd(card, 17, "initialize_interface");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
/* enable_fifo */
|
|
|
|
ret = softing_fct_cmd(card, 36, "enable_fifo");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
/* enable fifo tx ack */
|
|
|
|
ret = softing_fct_cmd(card, 13, "fifo_tx_ack[0]");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
/* enable fifo tx ack2 */
|
|
|
|
ret = softing_fct_cmd(card, 14, "fifo_tx_ack[1]");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
/* start_chip */
|
|
|
|
ret = softing_fct_cmd(card, 11, "start_chip");
|
|
|
|
if (ret < 0)
|
|
|
|
goto failed;
|
|
|
|
iowrite8(0, &card->dpram[DPRAM_INFO_BUSSTATE]);
|
|
|
|
iowrite8(0, &card->dpram[DPRAM_INFO_BUSSTATE2]);
|
|
|
|
if (card->pdat->generation < 2) {
|
|
|
|
iowrite8(0, &card->dpram[DPRAM_V2_IRQ_TOHOST]);
|
|
|
|
/* flush the DPRAM caches */
|
|
|
|
wmb();
|
|
|
|
}
|
|
|
|
|
|
|
|
softing_initialize_timestamp(card);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* do socketcan notifications/status changes
|
|
|
|
* from here, no errors should occur, or the failed: part
|
|
|
|
* must be reviewed
|
|
|
|
*/
|
|
|
|
memset(&msg, 0, sizeof(msg));
|
|
|
|
msg.can_id = CAN_ERR_FLAG | CAN_ERR_RESTARTED;
|
|
|
|
msg.can_dlc = CAN_ERR_DLC;
|
|
|
|
for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
|
|
|
|
if (!(bus_bitmask_start & (1 << j)))
|
|
|
|
continue;
|
|
|
|
netdev = card->net[j];
|
|
|
|
if (!netdev)
|
|
|
|
continue;
|
|
|
|
priv = netdev_priv(netdev);
|
|
|
|
priv->can.state = CAN_STATE_ERROR_ACTIVE;
|
|
|
|
open_candev(netdev);
|
|
|
|
if (dev != netdev) {
|
|
|
|
/* notify other busses on the restart */
|
|
|
|
softing_netdev_rx(netdev, &msg, ktime_set(0, 0));
|
|
|
|
++priv->can.can_stats.restarts;
|
|
|
|
}
|
|
|
|
netif_wake_queue(netdev);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* enable interrupts */
|
|
|
|
ret = softing_enable_irq(card, 1);
|
|
|
|
if (ret)
|
|
|
|
goto failed;
|
|
|
|
card_done:
|
|
|
|
mutex_unlock(&card->fw.lock);
|
|
|
|
return 0;
|
|
|
|
invalid:
|
|
|
|
ret = -EINVAL;
|
|
|
|
failed:
|
|
|
|
softing_enable_irq(card, 0);
|
|
|
|
softing_reset_chip(card);
|
|
|
|
mutex_unlock(&card->fw.lock);
|
|
|
|
/* bring all other interfaces down */
|
|
|
|
for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
|
|
|
|
netdev = card->net[j];
|
|
|
|
if (!netdev)
|
|
|
|
continue;
|
|
|
|
dev_close(netdev);
|
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
int softing_default_output(struct net_device *netdev)
|
|
|
|
{
|
|
|
|
struct softing_priv *priv = netdev_priv(netdev);
|
|
|
|
struct softing *card = priv->card;
|
|
|
|
|
|
|
|
switch (priv->chip) {
|
|
|
|
case 1000:
|
|
|
|
return (card->pdat->generation < 2) ? 0xfb : 0xfa;
|
|
|
|
case 5:
|
|
|
|
return 0x60;
|
|
|
|
default:
|
|
|
|
return 0x40;
|
|
|
|
}
|
|
|
|
}
|