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kernel-fxtec-pro1x/arch/powerpc/configs/corenet32_smp_defconfig

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powerpc: Add a defconfig for 'corenet' 32-bit platforms The e500mc and e5500 based cores are only available on corenet based SoCs. We use this name for the P204x, P3040, P4040, P4080, P50x0 SoCs and any future processors in these families. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19 12:22:25 -06:00
CONFIG_PPC_85xx=y
CONFIG_SMP=y
CONFIG_NR_CPUS=8
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_AUDIT=y
CONFIG_SPARSE_IRQ=y
CONFIG_RCU_TRACE=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
CONFIG_KALLSYMS_ALL=y
CONFIG_EMBEDDED=y
CONFIG_PERF_EVENTS=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
# CONFIG_BLK_DEV_BSG is not set
powerpc/85xx: Rename p2040_rdb.c to p2041_rdb.c There's only p2041rdb board for official release, but the p2041 silicon on the board can be converted to p2040 silicon without XAUI and L2 cache function, then the board becomes p2040rdb board. so we use the file name p2041_rdb.c to handle P2040RDB board and P2041RDB board which is also consistent with the board name under U-Boot. During the rename we make few other minor changes to the device tree: * Move USB phy setting into p2041si.dtsi as its SoC not board defined * Convert PCI clock-frequency to decimal to be more readable Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-08-26 04:45:03 -06:00
CONFIG_P2041_RDB=y
powerpc: Add a defconfig for 'corenet' 32-bit platforms The e500mc and e5500 based cores are only available on corenet based SoCs. We use this name for the P204x, P3040, P4040, P4080, P50x0 SoCs and any future processors in these families. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19 12:22:25 -06:00
CONFIG_P3041_DS=y
powerpc/p3060qds: Add support for P3060QDS board The P3060QDS is a Freescale reference board that hosts the six-core P3060 SOC. The P3060 Processor combines six e500mc Power Architecture processor cores with high-performance datapath acceleration architecture(DPAA), CoreNet fabric infrastructure, as well as network and peripheral interfaces. P3060QDS Board Overview: Memory subsystem: - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus) - 128M Bytes NOR flash single-chip memory - 16M Bytes SPI flash - 8K Bytes AT24C64 I2C EEPROM Ethernet: - 4x1G + 4x1G/2.5G Ethernet controllers - 2xRGMII + 1xMII, three VSC8641 PHYs on board - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3 PCIe: Two PCI Express 2.0 controllers/ports USB: Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board I2C: Four I2C controllers UART: Supports up to four UARTs RapidIO: Supports two serial RapidIO ports Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-08-25 21:18:21 -06:00
CONFIG_P3060_QDS=y
powerpc: Add a defconfig for 'corenet' 32-bit platforms The e500mc and e5500 based cores are only available on corenet based SoCs. We use this name for the P204x, P3040, P4040, P4080, P50x0 SoCs and any future processors in these families. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19 12:22:25 -06:00
CONFIG_P4080_DS=y
CONFIG_P5020_DS=y
CONFIG_HIGHMEM=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_BINFMT_MISC=m
CONFIG_KEXEC=y
CONFIG_FORCE_MAX_ZONEORDER=13
CONFIG_FSL_LBC=y
CONFIG_PCI=y
CONFIG_PCIEPORTBUS=y
# CONFIG_PCIEASPM is not set
powerpc/fsl: Update defconfigs to enable some standard FSL HW features corenet64_smp_defconfig: - enabled rapidio corenet32_smp_defconfig: - enabled hugetlbfs, rapidio mpc85xx_smp_defconfig: - enabled P1010RDB, hugetlbfs, SPI, SDHC, Crypto/CAAM mpc85xx_smp_defconfig: - enabled hugetlbfs, SPI, SDHC, Crypto/CAAM Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-12-07 23:55:57 -07:00
CONFIG_RAPIDIO=y
CONFIG_FSL_RIO=y
powerpc: Add a defconfig for 'corenet' 32-bit platforms The e500mc and e5500 based cores are only available on corenet based SoCs. We use this name for the P204x, P3040, P4040, P4080, P50x0 SoCs and any future processors in these families. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19 12:22:25 -06:00
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_XFRM_SUB_POLICY=y
CONFIG_XFRM_STATISTICS=y
CONFIG_NET_KEY=y
CONFIG_NET_KEY_MIGRATE=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_MULTIPATH=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_NET_IPIP=y
CONFIG_IP_MROUTE=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
CONFIG_ARPD=y
CONFIG_INET_AH=y
CONFIG_INET_ESP=y
CONFIG_INET_IPCOMP=y
# CONFIG_INET_LRO is not set
CONFIG_IPV6=y
CONFIG_IP_SCTP=m
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_PHYSMAP_OF=y
CONFIG_MTD_M25P80=y
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=131072
CONFIG_MISC_DEVICES=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=y
CONFIG_BLK_DEV_SR=y
CONFIG_CHR_DEV_SG=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SYM53C8XX_2=y
CONFIG_ATA=y
CONFIG_SATA_AHCI=y
CONFIG_SATA_FSL=y
CONFIG_SATA_SIL24=y
CONFIG_SATA_SIL=y
CONFIG_PATA_SIL680=y
CONFIG_NETDEVICES=y
powerpc/fsl: Update defconfigs to enable some standard FSL HW features corenet64_smp_defconfig: - enabled rapidio corenet32_smp_defconfig: - enabled hugetlbfs, rapidio mpc85xx_smp_defconfig: - enabled P1010RDB, hugetlbfs, SPI, SDHC, Crypto/CAAM mpc85xx_smp_defconfig: - enabled hugetlbfs, SPI, SDHC, Crypto/CAAM Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-12-07 23:55:57 -07:00
CONFIG_FSL_PQ_MDIO=y
powerpc: Add a defconfig for 'corenet' 32-bit platforms The e500mc and e5500 based cores are only available on corenet based SoCs. We use this name for the P204x, P3040, P4040, P4080, P50x0 SoCs and any future processors in these families. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19 12:22:25 -06:00
CONFIG_E1000=y
CONFIG_E1000E=y
powerpc/fsl: Update defconfigs to enable some standard FSL HW features corenet64_smp_defconfig: - enabled rapidio corenet32_smp_defconfig: - enabled hugetlbfs, rapidio mpc85xx_smp_defconfig: - enabled P1010RDB, hugetlbfs, SPI, SDHC, Crypto/CAAM mpc85xx_smp_defconfig: - enabled hugetlbfs, SPI, SDHC, Crypto/CAAM Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-12-07 23:55:57 -07:00
CONFIG_VITESSE_PHY=y
CONFIG_FIXED_PHY=y
powerpc: Add a defconfig for 'corenet' 32-bit platforms The e500mc and e5500 based cores are only available on corenet based SoCs. We use this name for the P204x, P3040, P4040, P4080, P50x0 SoCs and any future processors in these families. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19 12:22:25 -06:00
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_LEGACY_PTYS is not set
powerpc/85xx: re-enable ePAPR byte channel driver in corenet32_smp_defconfig Commit 7c4b2f09 (powerpc: Update mpc85xx/corenet 32-bit defconfigs) accidentally disabled the ePAPR byte channel driver in the defconfig for Freescale CoreNet platforms. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-12-12 16:25:45 -07:00
CONFIG_PPC_EPAPR_HV_BYTECHAN=y
powerpc: Add a defconfig for 'corenet' 32-bit platforms The e500mc and e5500 based cores are only available on corenet based SoCs. We use this name for the P204x, P3040, P4040, P4080, P50x0 SoCs and any future processors in these families. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19 12:22:25 -06:00
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_DETECT_IRQ=y
CONFIG_SERIAL_8250_RSA=y
CONFIG_HW_RANDOM=y
CONFIG_NVRAM=y
CONFIG_I2C=y
powerpc/85xx: Enable I2C_CHARDEV and I2C_MPC options in defconfigs Enable I2C char dev interface for user space testing of I2C controler. Enable the I2C driver on 64-bit builds (corenet64_smp_defconfig) as it was missing. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-17 02:58:56 -06:00
CONFIG_I2C_CHARDEV=y
powerpc: Add a defconfig for 'corenet' 32-bit platforms The e500mc and e5500 based cores are only available on corenet based SoCs. We use this name for the P204x, P3040, P4040, P4080, P50x0 SoCs and any future processors in these families. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19 12:22:25 -06:00
CONFIG_I2C_MPC=y
CONFIG_SPI=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_FSL_SPI=y
CONFIG_SPI_FSL_ESPI=y
# CONFIG_HWMON is not set
CONFIG_VIDEO_OUTPUT_CONTROL=y
CONFIG_USB_HID=m
CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_FSL=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
CONFIG_USB_STORAGE=y
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_EDAC=y
CONFIG_EDAC_MM_EDAC=y
CONFIG_EDAC_MPC85XX=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_DS3232=y
CONFIG_RTC_DRV_CMOS=y
CONFIG_UIO=y
CONFIG_STAGING=y
powerpc/85xx: add hypervisor config entries to corenet_smp_defconfig CONFIG_PPC_EPAPR_HV_BYTECHAN adds support for the Freescale hypervisor byte channel tty driver. CONFIG_VIRT_DRIVERS and CONFIG_FSL_HV_MANAGER add support for the Freescale hypervisor management driver. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-14 13:06:15 -06:00
CONFIG_VIRT_DRIVERS=y
CONFIG_FSL_HV_MANAGER=y
powerpc: Add a defconfig for 'corenet' 32-bit platforms The e500mc and e5500 based cores are only available on corenet based SoCs. We use this name for the P204x, P3040, P4040, P4080, P50x0 SoCs and any future processors in these families. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19 12:22:25 -06:00
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
CONFIG_ISO9660_FS=m
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_UDF_FS=m
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=y
CONFIG_NTFS_FS=y
CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
powerpc: Enable Hugetlb by default for 32-bit 85xx/corenet Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-10-10 04:50:46 -06:00
CONFIG_HUGETLBFS=y
powerpc: Add a defconfig for 'corenet' 32-bit platforms The e500mc and e5500 based cores are only available on corenet based SoCs. We use this name for the P204x, P3040, P4040, P4080, P50x0 SoCs and any future processors in these families. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19 12:22:25 -06:00
CONFIG_JFFS2_FS=y
CONFIG_CRAMFS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NFSD=m
CONFIG_PARTITION_ADVANCED=y
CONFIG_MAC_PARTITION=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_SHIRQ=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_INFO=y
CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_AES=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
powerpc/85xx: enable caam crypto driver by default corenet based SoCs have SEC4 h/w, so enable the SEC4 driver, caam, and the algorithms it supports, and disable the SEC2/3 driver, talitos. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-22 14:48:08 -06:00
CONFIG_CRYPTO_DEV_FSL_CAAM=y
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