2010-02-22 16:17:21 -07:00
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/*
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2010-03-18 19:45:41 -06:00
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* mcpdm.c -- McPDM interface driver
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2010-02-22 16:17:21 -07:00
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*
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* Author: Jorge Eduardo Candelaria <x0107209@ti.com>
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* Copyright (C) 2009 - Texas Instruments, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/wait.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 02:04:11 -06:00
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#include <linux/slab.h>
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2010-02-22 16:17:21 -07:00
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#include <linux/interrupt.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include "mcpdm.h"
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static struct omap_mcpdm *mcpdm;
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static inline void omap_mcpdm_write(u16 reg, u32 val)
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{
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2010-03-18 19:45:41 -06:00
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__raw_writel(val, mcpdm->io_base + reg);
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2010-02-22 16:17:21 -07:00
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}
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static inline int omap_mcpdm_read(u16 reg)
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{
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2010-03-18 19:45:41 -06:00
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return __raw_readl(mcpdm->io_base + reg);
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2010-02-22 16:17:21 -07:00
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}
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static void omap_mcpdm_reg_dump(void)
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{
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2010-03-18 19:45:41 -06:00
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dev_dbg(mcpdm->dev, "***********************\n");
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dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n",
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omap_mcpdm_read(MCPDM_IRQSTATUS_RAW));
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dev_dbg(mcpdm->dev, "IRQSTATUS: 0x%04x\n",
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omap_mcpdm_read(MCPDM_IRQSTATUS));
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dev_dbg(mcpdm->dev, "IRQENABLE_SET: 0x%04x\n",
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omap_mcpdm_read(MCPDM_IRQENABLE_SET));
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dev_dbg(mcpdm->dev, "IRQENABLE_CLR: 0x%04x\n",
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omap_mcpdm_read(MCPDM_IRQENABLE_CLR));
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dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
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omap_mcpdm_read(MCPDM_IRQWAKE_EN));
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dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
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omap_mcpdm_read(MCPDM_DMAENABLE_SET));
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dev_dbg(mcpdm->dev, "DMAENABLE_CLR: 0x%04x\n",
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omap_mcpdm_read(MCPDM_DMAENABLE_CLR));
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dev_dbg(mcpdm->dev, "DMAWAKEEN: 0x%04x\n",
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omap_mcpdm_read(MCPDM_DMAWAKEEN));
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dev_dbg(mcpdm->dev, "CTRL: 0x%04x\n",
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omap_mcpdm_read(MCPDM_CTRL));
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dev_dbg(mcpdm->dev, "DN_DATA: 0x%04x\n",
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omap_mcpdm_read(MCPDM_DN_DATA));
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dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
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omap_mcpdm_read(MCPDM_UP_DATA));
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dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
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omap_mcpdm_read(MCPDM_FIFO_CTRL_DN));
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dev_dbg(mcpdm->dev, "FIFO_CTRL_UP: 0x%04x\n",
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omap_mcpdm_read(MCPDM_FIFO_CTRL_UP));
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dev_dbg(mcpdm->dev, "DN_OFFSET: 0x%04x\n",
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omap_mcpdm_read(MCPDM_DN_OFFSET));
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dev_dbg(mcpdm->dev, "***********************\n");
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2010-02-22 16:17:21 -07:00
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}
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/*
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* Takes the McPDM module in and out of reset state.
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* Uplink and downlink can be reset individually.
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*/
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static void omap_mcpdm_reset_capture(int reset)
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{
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2010-03-18 19:45:41 -06:00
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int ctrl = omap_mcpdm_read(MCPDM_CTRL);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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if (reset)
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ctrl |= SW_UP_RST;
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else
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ctrl &= ~SW_UP_RST;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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omap_mcpdm_write(MCPDM_CTRL, ctrl);
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2010-02-22 16:17:21 -07:00
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}
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static void omap_mcpdm_reset_playback(int reset)
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{
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2010-03-18 19:45:41 -06:00
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int ctrl = omap_mcpdm_read(MCPDM_CTRL);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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if (reset)
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ctrl |= SW_DN_RST;
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else
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ctrl &= ~SW_DN_RST;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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omap_mcpdm_write(MCPDM_CTRL, ctrl);
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2010-02-22 16:17:21 -07:00
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}
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/*
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* Enables the transfer through the PDM interface to/from the Phoenix
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* codec by enabling the corresponding UP or DN channels.
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*/
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void omap_mcpdm_start(int stream)
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{
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2010-03-18 19:45:41 -06:00
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int ctrl = omap_mcpdm_read(MCPDM_CTRL);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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if (stream)
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ctrl |= mcpdm->up_channels;
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else
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ctrl |= mcpdm->dn_channels;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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omap_mcpdm_write(MCPDM_CTRL, ctrl);
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2010-02-22 16:17:21 -07:00
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}
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/*
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* Disables the transfer through the PDM interface to/from the Phoenix
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* codec by disabling the corresponding UP or DN channels.
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*/
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void omap_mcpdm_stop(int stream)
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{
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2010-03-18 19:45:41 -06:00
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int ctrl = omap_mcpdm_read(MCPDM_CTRL);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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if (stream)
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ctrl &= ~mcpdm->up_channels;
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else
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ctrl &= ~mcpdm->dn_channels;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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omap_mcpdm_write(MCPDM_CTRL, ctrl);
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2010-02-22 16:17:21 -07:00
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}
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/*
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* Configures McPDM uplink for audio recording.
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* This function should be called before omap_mcpdm_start.
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*/
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int omap_mcpdm_capture_open(struct omap_mcpdm_link *uplink)
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{
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2010-03-18 19:45:41 -06:00
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int irq_mask = 0;
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int ctrl;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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if (!uplink)
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return -EINVAL;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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mcpdm->uplink = uplink;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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/* Enable irq request generation */
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irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK;
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omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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/* Configure uplink threshold */
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if (uplink->threshold > UP_THRES_MAX)
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uplink->threshold = UP_THRES_MAX;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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omap_mcpdm_write(MCPDM_FIFO_CTRL_UP, uplink->threshold);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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/* Configure DMA controller */
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omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_UP_ENABLE);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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/* Set pdm out format */
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ctrl = omap_mcpdm_read(MCPDM_CTRL);
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ctrl &= ~PDMOUTFORMAT;
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ctrl |= uplink->format & PDMOUTFORMAT;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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/* Uplink channels */
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mcpdm->up_channels = uplink->channels & (PDM_UP_MASK | PDM_STATUS_MASK);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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omap_mcpdm_write(MCPDM_CTRL, ctrl);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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return 0;
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2010-02-22 16:17:21 -07:00
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}
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/*
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* Configures McPDM downlink for audio playback.
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* This function should be called before omap_mcpdm_start.
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*/
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int omap_mcpdm_playback_open(struct omap_mcpdm_link *downlink)
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{
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2010-03-18 19:45:41 -06:00
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int irq_mask = 0;
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int ctrl;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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if (!downlink)
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return -EINVAL;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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mcpdm->downlink = downlink;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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/* Enable irq request generation */
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irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK;
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omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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/* Configure uplink threshold */
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if (downlink->threshold > DN_THRES_MAX)
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downlink->threshold = DN_THRES_MAX;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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omap_mcpdm_write(MCPDM_FIFO_CTRL_DN, downlink->threshold);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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/* Enable DMA request generation */
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omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_DN_ENABLE);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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/* Set pdm out format */
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ctrl = omap_mcpdm_read(MCPDM_CTRL);
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ctrl &= ~PDMOUTFORMAT;
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ctrl |= downlink->format & PDMOUTFORMAT;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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/* Downlink channels */
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mcpdm->dn_channels = downlink->channels & (PDM_DN_MASK | PDM_CMD_MASK);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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omap_mcpdm_write(MCPDM_CTRL, ctrl);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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return 0;
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2010-02-22 16:17:21 -07:00
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}
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/*
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* Cleans McPDM uplink configuration.
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* This function should be called when the stream is closed.
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*/
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int omap_mcpdm_capture_close(struct omap_mcpdm_link *uplink)
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{
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2010-03-18 19:45:41 -06:00
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int irq_mask = 0;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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if (!uplink)
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return -EINVAL;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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/* Disable irq request generation */
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irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK;
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omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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/* Disable DMA request generation */
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omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_UP_ENABLE);
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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/* Clear Downlink channels */
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mcpdm->up_channels = 0;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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mcpdm->uplink = NULL;
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2010-02-22 16:17:21 -07:00
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2010-03-18 19:45:41 -06:00
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return 0;
|
2010-02-22 16:17:21 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Cleans McPDM downlink configuration.
|
|
|
|
* This function should be called when the stream is closed.
|
|
|
|
*/
|
|
|
|
int omap_mcpdm_playback_close(struct omap_mcpdm_link *downlink)
|
|
|
|
{
|
2010-03-18 19:45:41 -06:00
|
|
|
int irq_mask = 0;
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
if (!downlink)
|
|
|
|
return -EINVAL;
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
/* Disable irq request generation */
|
|
|
|
irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK;
|
|
|
|
omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask);
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
/* Disable DMA request generation */
|
|
|
|
omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_DN_ENABLE);
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
/* clear Downlink channels */
|
|
|
|
mcpdm->dn_channels = 0;
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
mcpdm->downlink = NULL;
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
return 0;
|
2010-02-22 16:17:21 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
|
|
|
|
{
|
2010-03-18 19:45:41 -06:00
|
|
|
struct omap_mcpdm *mcpdm_irq = dev_id;
|
|
|
|
int irq_status;
|
|
|
|
|
|
|
|
irq_status = omap_mcpdm_read(MCPDM_IRQSTATUS);
|
|
|
|
|
|
|
|
/* Acknowledge irq event */
|
|
|
|
omap_mcpdm_write(MCPDM_IRQSTATUS, irq_status);
|
|
|
|
|
|
|
|
if (irq & MCPDM_DN_IRQ_FULL) {
|
|
|
|
dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status);
|
|
|
|
omap_mcpdm_reset_playback(1);
|
|
|
|
omap_mcpdm_playback_open(mcpdm_irq->downlink);
|
|
|
|
omap_mcpdm_reset_playback(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (irq & MCPDM_DN_IRQ_EMPTY) {
|
|
|
|
dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status);
|
|
|
|
omap_mcpdm_reset_playback(1);
|
|
|
|
omap_mcpdm_playback_open(mcpdm_irq->downlink);
|
|
|
|
omap_mcpdm_reset_playback(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (irq & MCPDM_DN_IRQ) {
|
|
|
|
dev_dbg(mcpdm_irq->dev, "DN write request\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
if (irq & MCPDM_UP_IRQ_FULL) {
|
|
|
|
dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status);
|
|
|
|
omap_mcpdm_reset_capture(1);
|
|
|
|
omap_mcpdm_capture_open(mcpdm_irq->uplink);
|
|
|
|
omap_mcpdm_reset_capture(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (irq & MCPDM_UP_IRQ_EMPTY) {
|
|
|
|
dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status);
|
|
|
|
omap_mcpdm_reset_capture(1);
|
|
|
|
omap_mcpdm_capture_open(mcpdm_irq->uplink);
|
|
|
|
omap_mcpdm_reset_capture(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (irq & MCPDM_UP_IRQ) {
|
|
|
|
dev_dbg(mcpdm_irq->dev, "UP write request\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
2010-02-22 16:17:21 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
int omap_mcpdm_request(void)
|
|
|
|
{
|
2010-03-18 19:45:41 -06:00
|
|
|
int ret;
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
clk_enable(mcpdm->clk);
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
spin_lock(&mcpdm->lock);
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
if (!mcpdm->free) {
|
|
|
|
dev_err(mcpdm->dev, "McPDM interface is in use\n");
|
|
|
|
spin_unlock(&mcpdm->lock);
|
|
|
|
ret = -EBUSY;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
mcpdm->free = 0;
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
spin_unlock(&mcpdm->lock);
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
/* Disable lines while request is ongoing */
|
|
|
|
omap_mcpdm_write(MCPDM_CTRL, 0x00);
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
|
|
|
|
0, "McPDM", (void *)mcpdm);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(mcpdm->dev, "Request for McPDM IRQ failed\n");
|
|
|
|
goto err;
|
|
|
|
}
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
return 0;
|
2010-02-22 16:17:21 -07:00
|
|
|
|
|
|
|
err:
|
2010-03-18 19:45:41 -06:00
|
|
|
clk_disable(mcpdm->clk);
|
|
|
|
return ret;
|
2010-02-22 16:17:21 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
void omap_mcpdm_free(void)
|
|
|
|
{
|
2010-03-18 19:45:41 -06:00
|
|
|
spin_lock(&mcpdm->lock);
|
|
|
|
if (mcpdm->free) {
|
|
|
|
dev_err(mcpdm->dev, "McPDM interface is already free\n");
|
|
|
|
spin_unlock(&mcpdm->lock);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
mcpdm->free = 1;
|
|
|
|
spin_unlock(&mcpdm->lock);
|
|
|
|
|
|
|
|
clk_disable(mcpdm->clk);
|
|
|
|
|
|
|
|
free_irq(mcpdm->irq, (void *)mcpdm);
|
2010-02-22 16:17:21 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Enable/disable DC offset cancelation for the analog
|
|
|
|
* headset path (PDM channels 1 and 2).
|
|
|
|
*/
|
|
|
|
int omap_mcpdm_set_offset(int offset1, int offset2)
|
|
|
|
{
|
2010-03-18 19:45:41 -06:00
|
|
|
int offset;
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
if ((offset1 > DN_OFST_MAX) || (offset2 > DN_OFST_MAX))
|
|
|
|
return -EINVAL;
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
offset = (offset1 << DN_OFST_RX1) | (offset2 << DN_OFST_RX2);
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
/* offset cancellation for channel 1 */
|
|
|
|
if (offset1)
|
|
|
|
offset |= DN_OFST_RX1_EN;
|
|
|
|
else
|
|
|
|
offset &= ~DN_OFST_RX1_EN;
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
/* offset cancellation for channel 2 */
|
|
|
|
if (offset2)
|
|
|
|
offset |= DN_OFST_RX2_EN;
|
|
|
|
else
|
|
|
|
offset &= ~DN_OFST_RX2_EN;
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
omap_mcpdm_write(MCPDM_DN_OFFSET, offset);
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
return 0;
|
2010-02-22 16:17:21 -07:00
|
|
|
}
|
|
|
|
|
2010-03-17 14:15:21 -06:00
|
|
|
int __devinit omap_mcpdm_probe(struct platform_device *pdev)
|
2010-02-22 16:17:21 -07:00
|
|
|
{
|
2010-03-18 19:45:41 -06:00
|
|
|
struct resource *res;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
mcpdm = kzalloc(sizeof(struct omap_mcpdm), GFP_KERNEL);
|
|
|
|
if (!mcpdm) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
if (res == NULL) {
|
|
|
|
dev_err(&pdev->dev, "no resource\n");
|
|
|
|
goto err_resource;
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_lock_init(&mcpdm->lock);
|
|
|
|
mcpdm->free = 1;
|
|
|
|
mcpdm->io_base = ioremap(res->start, resource_size(res));
|
|
|
|
if (!mcpdm->io_base) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err_resource;
|
|
|
|
}
|
|
|
|
|
|
|
|
mcpdm->irq = platform_get_irq(pdev, 0);
|
|
|
|
|
|
|
|
mcpdm->clk = clk_get(&pdev->dev, "pdm_ck");
|
|
|
|
if (IS_ERR(mcpdm->clk)) {
|
|
|
|
ret = PTR_ERR(mcpdm->clk);
|
|
|
|
dev_err(&pdev->dev, "unable to get pdm_ck: %d\n", ret);
|
|
|
|
goto err_clk;
|
|
|
|
}
|
|
|
|
|
|
|
|
mcpdm->dev = &pdev->dev;
|
|
|
|
platform_set_drvdata(pdev, mcpdm);
|
|
|
|
|
|
|
|
return 0;
|
2010-02-22 16:17:21 -07:00
|
|
|
|
|
|
|
err_clk:
|
2010-03-18 19:45:41 -06:00
|
|
|
iounmap(mcpdm->io_base);
|
2010-02-22 16:17:21 -07:00
|
|
|
err_resource:
|
2010-03-18 19:45:41 -06:00
|
|
|
kfree(mcpdm);
|
2010-02-22 16:17:21 -07:00
|
|
|
exit:
|
2010-03-18 19:45:41 -06:00
|
|
|
return ret;
|
2010-02-22 16:17:21 -07:00
|
|
|
}
|
|
|
|
|
2010-03-17 14:15:21 -06:00
|
|
|
int __devexit omap_mcpdm_remove(struct platform_device *pdev)
|
2010-02-22 16:17:21 -07:00
|
|
|
{
|
2010-03-18 19:45:41 -06:00
|
|
|
struct omap_mcpdm *mcpdm_ptr = platform_get_drvdata(pdev);
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
platform_set_drvdata(pdev, NULL);
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
clk_put(mcpdm_ptr->clk);
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
iounmap(mcpdm_ptr->io_base);
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
mcpdm_ptr->clk = NULL;
|
|
|
|
mcpdm_ptr->free = 0;
|
|
|
|
mcpdm_ptr->dev = NULL;
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
kfree(mcpdm_ptr);
|
2010-02-22 16:17:21 -07:00
|
|
|
|
2010-03-18 19:45:41 -06:00
|
|
|
return 0;
|
2010-02-22 16:17:21 -07:00
|
|
|
}
|
|
|
|
|