2008-07-09 14:54:03 -06:00
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/*
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* Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: John Rigby <jrigby@freescale.com>
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*
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* Description:
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* MPC512x Shared code
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*
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* This is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/of_platform.h>
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2010-07-22 22:00:37 -06:00
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#include <linux/fsl-diu-fb.h>
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#include <linux/bootmem.h>
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#include <sysdev/fsl_soc.h>
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2008-07-09 14:54:03 -06:00
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2010-07-22 22:00:37 -06:00
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#include <asm/cacheflush.h>
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2008-07-09 14:54:03 -06:00
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#include <asm/machdep.h>
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#include <asm/ipic.h>
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#include <asm/prom.h>
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#include <asm/time.h>
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2010-02-16 10:36:26 -07:00
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#include <asm/mpc5121.h>
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2010-04-30 07:21:26 -06:00
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#include <asm/mpc52xx_psc.h>
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2008-07-09 14:54:03 -06:00
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#include "mpc512x.h"
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2010-02-16 10:36:26 -07:00
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static struct mpc512x_reset_module __iomem *reset_module_base;
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static void __init mpc512x_restart_init(void)
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{
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struct device_node *np;
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np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-reset");
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if (!np)
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return;
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reset_module_base = of_iomap(np, 0);
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of_node_put(np);
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}
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void mpc512x_restart(char *cmd)
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{
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if (reset_module_base) {
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/* Enable software reset "RSTE" */
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out_be32(&reset_module_base->rpr, 0x52535445);
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/* Set software hard reset */
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out_be32(&reset_module_base->rcr, 0x2);
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} else {
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pr_err("Restart module not mapped.\n");
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}
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for (;;)
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;
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}
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2010-07-22 22:00:37 -06:00
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struct fsl_diu_shared_fb {
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u8 gamma[0x300]; /* 32-bit aligned! */
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struct diu_ad ad0; /* 32-bit aligned! */
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phys_addr_t fb_phys;
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size_t fb_len;
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bool in_use;
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};
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2011-07-09 14:38:14 -06:00
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u32 mpc512x_get_pixel_format(enum fsl_diu_monitor_port port,
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unsigned int bits_per_pixel)
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2010-07-22 22:00:37 -06:00
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{
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switch (bits_per_pixel) {
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case 32:
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return 0x88883316;
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case 24:
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return 0x88082219;
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case 16:
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return 0x65053118;
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}
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return 0x00000400;
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}
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2011-07-09 14:38:14 -06:00
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void mpc512x_set_gamma_table(enum fsl_diu_monitor_port port,
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char *gamma_table_base)
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2010-07-22 22:00:37 -06:00
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{
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}
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2011-07-09 14:38:14 -06:00
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void mpc512x_set_monitor_port(enum fsl_diu_monitor_port port)
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2010-07-22 22:00:37 -06:00
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{
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}
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#define DIU_DIV_MASK 0x000000ff
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void mpc512x_set_pixel_clock(unsigned int pixclock)
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{
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unsigned long bestval, bestfreq, speed, busfreq;
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unsigned long minpixclock, maxpixclock, pixval;
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struct mpc512x_ccm __iomem *ccm;
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struct device_node *np;
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u32 temp;
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long err;
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int i;
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np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-clock");
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if (!np) {
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pr_err("Can't find clock control module.\n");
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return;
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}
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ccm = of_iomap(np, 0);
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of_node_put(np);
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if (!ccm) {
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pr_err("Can't map clock control module reg.\n");
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return;
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}
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np = of_find_node_by_type(NULL, "cpu");
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if (np) {
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const unsigned int *prop =
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of_get_property(np, "bus-frequency", NULL);
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of_node_put(np);
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if (prop) {
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busfreq = *prop;
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} else {
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pr_err("Can't get bus-frequency property\n");
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return;
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}
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} else {
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pr_err("Can't find 'cpu' node.\n");
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return;
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}
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/* Pixel Clock configuration */
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pr_debug("DIU: Bus Frequency = %lu\n", busfreq);
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speed = busfreq * 4; /* DIU_DIV ratio is 4 * CSB_CLK / DIU_CLK */
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/* Calculate the pixel clock with the smallest error */
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/* calculate the following in steps to avoid overflow */
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pr_debug("DIU pixclock in ps - %d\n", pixclock);
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temp = (1000000000 / pixclock) * 1000;
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pixclock = temp;
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pr_debug("DIU pixclock freq - %u\n", pixclock);
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temp = temp / 20; /* pixclock * 0.05 */
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pr_debug("deviation = %d\n", temp);
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minpixclock = pixclock - temp;
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maxpixclock = pixclock + temp;
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pr_debug("DIU minpixclock - %lu\n", minpixclock);
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pr_debug("DIU maxpixclock - %lu\n", maxpixclock);
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pixval = speed/pixclock;
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pr_debug("DIU pixval = %lu\n", pixval);
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err = LONG_MAX;
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bestval = pixval;
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pr_debug("DIU bestval = %lu\n", bestval);
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bestfreq = 0;
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for (i = -1; i <= 1; i++) {
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temp = speed / (pixval+i);
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pr_debug("DIU test pixval i=%d, pixval=%lu, temp freq. = %u\n",
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i, pixval, temp);
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if ((temp < minpixclock) || (temp > maxpixclock))
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pr_debug("DIU exceeds monitor range (%lu to %lu)\n",
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minpixclock, maxpixclock);
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else if (abs(temp - pixclock) < err) {
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pr_debug("Entered the else if block %d\n", i);
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err = abs(temp - pixclock);
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bestval = pixval + i;
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bestfreq = temp;
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}
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}
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pr_debug("DIU chose = %lx\n", bestval);
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pr_debug("DIU error = %ld\n NomPixClk ", err);
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pr_debug("DIU: Best Freq = %lx\n", bestfreq);
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/* Modify DIU_DIV in CCM SCFR1 */
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temp = in_be32(&ccm->scfr1);
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pr_debug("DIU: Current value of SCFR1: 0x%08x\n", temp);
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temp &= ~DIU_DIV_MASK;
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temp |= (bestval & DIU_DIV_MASK);
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out_be32(&ccm->scfr1, temp);
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pr_debug("DIU: Modified value of SCFR1: 0x%08x\n", temp);
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iounmap(ccm);
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}
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2011-07-09 14:38:14 -06:00
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enum fsl_diu_monitor_port
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mpc512x_valid_monitor_port(enum fsl_diu_monitor_port port)
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2010-07-22 22:00:37 -06:00
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{
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2011-07-09 14:38:14 -06:00
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return FSL_DIU_PORT_DVI;
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2010-07-22 22:00:37 -06:00
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}
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static struct fsl_diu_shared_fb __attribute__ ((__aligned__(8))) diu_shared_fb;
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#if defined(CONFIG_FB_FSL_DIU) || \
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defined(CONFIG_FB_FSL_DIU_MODULE)
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static inline void mpc512x_free_bootmem(struct page *page)
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{
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__ClearPageReserved(page);
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BUG_ON(PageTail(page));
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BUG_ON(atomic_read(&page->_count) > 1);
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atomic_set(&page->_count, 1);
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__free_page(page);
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totalram_pages++;
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}
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void mpc512x_release_bootmem(void)
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{
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unsigned long addr = diu_shared_fb.fb_phys & PAGE_MASK;
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unsigned long size = diu_shared_fb.fb_len;
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unsigned long start, end;
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if (diu_shared_fb.in_use) {
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start = PFN_UP(addr);
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end = PFN_DOWN(addr + size);
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for (; start < end; start++)
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mpc512x_free_bootmem(pfn_to_page(start));
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diu_shared_fb.in_use = false;
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}
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diu_ops.release_bootmem = NULL;
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}
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#endif
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/*
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* Check if DIU was pre-initialized. If so, perform steps
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* needed to continue displaying through the whole boot process.
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* Move area descriptor and gamma table elsewhere, they are
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* destroyed by bootmem allocator otherwise. The frame buffer
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* address range will be reserved in setup_arch() after bootmem
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* allocator is up.
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*/
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void __init mpc512x_init_diu(void)
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{
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struct device_node *np;
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struct diu __iomem *diu_reg;
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phys_addr_t desc;
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void __iomem *vaddr;
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unsigned long mode, pix_fmt, res, bpp;
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unsigned long dst;
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np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-diu");
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if (!np) {
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pr_err("No DIU node\n");
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return;
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}
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diu_reg = of_iomap(np, 0);
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of_node_put(np);
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if (!diu_reg) {
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pr_err("Can't map DIU\n");
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return;
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}
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mode = in_be32(&diu_reg->diu_mode);
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if (mode != MFB_MODE1) {
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pr_info("%s: DIU OFF\n", __func__);
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goto out;
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}
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desc = in_be32(&diu_reg->desc[0]);
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vaddr = ioremap(desc, sizeof(struct diu_ad));
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if (!vaddr) {
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pr_err("Can't map DIU area desc.\n");
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goto out;
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}
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memcpy(&diu_shared_fb.ad0, vaddr, sizeof(struct diu_ad));
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/* flush fb area descriptor */
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dst = (unsigned long)&diu_shared_fb.ad0;
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flush_dcache_range(dst, dst + sizeof(struct diu_ad) - 1);
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res = in_be32(&diu_reg->disp_size);
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pix_fmt = in_le32(vaddr);
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bpp = ((pix_fmt >> 16) & 0x3) + 1;
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diu_shared_fb.fb_phys = in_le32(vaddr + 4);
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diu_shared_fb.fb_len = ((res & 0xfff0000) >> 16) * (res & 0xfff) * bpp;
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diu_shared_fb.in_use = true;
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iounmap(vaddr);
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desc = in_be32(&diu_reg->gamma);
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vaddr = ioremap(desc, sizeof(diu_shared_fb.gamma));
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if (!vaddr) {
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pr_err("Can't map DIU area desc.\n");
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diu_shared_fb.in_use = false;
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goto out;
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}
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memcpy(&diu_shared_fb.gamma, vaddr, sizeof(diu_shared_fb.gamma));
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/* flush gamma table */
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dst = (unsigned long)&diu_shared_fb.gamma;
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flush_dcache_range(dst, dst + sizeof(diu_shared_fb.gamma) - 1);
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iounmap(vaddr);
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out_be32(&diu_reg->gamma, virt_to_phys(&diu_shared_fb.gamma));
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out_be32(&diu_reg->desc[1], 0);
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out_be32(&diu_reg->desc[2], 0);
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out_be32(&diu_reg->desc[0], virt_to_phys(&diu_shared_fb.ad0));
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out:
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iounmap(diu_reg);
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}
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void __init mpc512x_setup_diu(void)
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{
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int ret;
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/*
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* We do not allocate and configure new area for bitmap buffer
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* because it would requere copying bitmap data (splash image)
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* and so negatively affect boot time. Instead we reserve the
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* already configured frame buffer area so that it won't be
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* destroyed. The starting address of the area to reserve and
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* also it's length is passed to reserve_bootmem(). It will be
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* freed later on first open of fbdev, when splash image is not
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* needed any more.
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*/
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if (diu_shared_fb.in_use) {
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ret = reserve_bootmem(diu_shared_fb.fb_phys,
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diu_shared_fb.fb_len,
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BOOTMEM_EXCLUSIVE);
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if (ret) {
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pr_err("%s: reserve bootmem failed\n", __func__);
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diu_shared_fb.in_use = false;
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}
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}
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#if defined(CONFIG_FB_FSL_DIU) || \
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defined(CONFIG_FB_FSL_DIU_MODULE)
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diu_ops.get_pixel_format = mpc512x_get_pixel_format;
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diu_ops.set_gamma_table = mpc512x_set_gamma_table;
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diu_ops.set_monitor_port = mpc512x_set_monitor_port;
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diu_ops.set_pixel_clock = mpc512x_set_pixel_clock;
|
2011-07-09 14:38:14 -06:00
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diu_ops.valid_monitor_port = mpc512x_valid_monitor_port;
|
2010-07-22 22:00:37 -06:00
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diu_ops.release_bootmem = mpc512x_release_bootmem;
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#endif
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}
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2008-07-09 14:54:03 -06:00
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void __init mpc512x_init_IRQ(void)
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{
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struct device_node *np;
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np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-ipic");
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if (!np)
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return;
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ipic_init(np, 0);
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|
|
of_node_put(np);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialize the default interrupt mapping priorities,
|
|
|
|
* in case the boot rom changed something on us.
|
|
|
|
*/
|
|
|
|
ipic_set_default_priority();
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Nodes to do bus probe on, soc and localbus
|
|
|
|
*/
|
|
|
|
static struct of_device_id __initdata of_bus_ids[] = {
|
|
|
|
{ .compatible = "fsl,mpc5121-immr", },
|
|
|
|
{ .compatible = "fsl,mpc5121-localbus", },
|
|
|
|
{},
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init mpc512x_declare_of_platform_devices(void)
|
|
|
|
{
|
2010-02-16 10:47:43 -07:00
|
|
|
struct device_node *np;
|
|
|
|
|
2008-07-09 14:54:03 -06:00
|
|
|
if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
|
|
|
|
printk(KERN_ERR __FILE__ ": "
|
|
|
|
"Error while probing of_platform bus\n");
|
2010-02-16 10:47:43 -07:00
|
|
|
|
|
|
|
np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-nfc");
|
|
|
|
if (np) {
|
|
|
|
of_platform_device_create(np, NULL, NULL);
|
|
|
|
of_node_put(np);
|
|
|
|
}
|
2008-07-09 14:54:03 -06:00
|
|
|
}
|
|
|
|
|
2010-04-30 07:21:26 -06:00
|
|
|
#define DEFAULT_FIFO_SIZE 16
|
|
|
|
|
|
|
|
static unsigned int __init get_fifo_size(struct device_node *np,
|
|
|
|
char *prop_name)
|
|
|
|
{
|
|
|
|
const unsigned int *fp;
|
|
|
|
|
|
|
|
fp = of_get_property(np, prop_name, NULL);
|
|
|
|
if (fp)
|
|
|
|
return *fp;
|
|
|
|
|
|
|
|
pr_warning("no %s property in %s node, defaulting to %d\n",
|
|
|
|
prop_name, np->full_name, DEFAULT_FIFO_SIZE);
|
|
|
|
|
|
|
|
return DEFAULT_FIFO_SIZE;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define FIFOC(_base) ((struct mpc512x_psc_fifo __iomem *) \
|
|
|
|
((u32)(_base) + sizeof(struct mpc52xx_psc)))
|
|
|
|
|
|
|
|
/* Init PSC FIFO space for TX and RX slices */
|
|
|
|
void __init mpc512x_psc_fifo_init(void)
|
|
|
|
{
|
|
|
|
struct device_node *np;
|
|
|
|
void __iomem *psc;
|
|
|
|
unsigned int tx_fifo_size;
|
|
|
|
unsigned int rx_fifo_size;
|
|
|
|
int fifobase = 0; /* current fifo address in 32 bit words */
|
|
|
|
|
|
|
|
for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
|
|
|
|
tx_fifo_size = get_fifo_size(np, "fsl,tx-fifo-size");
|
|
|
|
rx_fifo_size = get_fifo_size(np, "fsl,rx-fifo-size");
|
|
|
|
|
|
|
|
/* size in register is in 4 byte units */
|
|
|
|
tx_fifo_size /= 4;
|
|
|
|
rx_fifo_size /= 4;
|
|
|
|
if (!tx_fifo_size)
|
|
|
|
tx_fifo_size = 1;
|
|
|
|
if (!rx_fifo_size)
|
|
|
|
rx_fifo_size = 1;
|
|
|
|
|
|
|
|
psc = of_iomap(np, 0);
|
|
|
|
if (!psc) {
|
|
|
|
pr_err("%s: Can't map %s device\n",
|
|
|
|
__func__, np->full_name);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* FIFO space is 4KiB, check if requested size is available */
|
|
|
|
if ((fifobase + tx_fifo_size + rx_fifo_size) > 0x1000) {
|
|
|
|
pr_err("%s: no fifo space available for %s\n",
|
|
|
|
__func__, np->full_name);
|
|
|
|
iounmap(psc);
|
|
|
|
/*
|
|
|
|
* chances are that another device requests less
|
|
|
|
* fifo space, so we continue.
|
|
|
|
*/
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* set tx and rx fifo size registers */
|
|
|
|
out_be32(&FIFOC(psc)->txsz, (fifobase << 16) | tx_fifo_size);
|
|
|
|
fifobase += tx_fifo_size;
|
|
|
|
out_be32(&FIFOC(psc)->rxsz, (fifobase << 16) | rx_fifo_size);
|
|
|
|
fifobase += rx_fifo_size;
|
|
|
|
|
|
|
|
/* reset and enable the slices */
|
|
|
|
out_be32(&FIFOC(psc)->txcmd, 0x80);
|
|
|
|
out_be32(&FIFOC(psc)->txcmd, 0x01);
|
|
|
|
out_be32(&FIFOC(psc)->rxcmd, 0x80);
|
|
|
|
out_be32(&FIFOC(psc)->rxcmd, 0x01);
|
|
|
|
|
|
|
|
iounmap(psc);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-02-16 10:35:13 -07:00
|
|
|
void __init mpc512x_init(void)
|
|
|
|
{
|
|
|
|
mpc512x_declare_of_platform_devices();
|
|
|
|
mpc5121_clk_init();
|
2010-02-16 10:36:26 -07:00
|
|
|
mpc512x_restart_init();
|
2010-04-30 07:21:26 -06:00
|
|
|
mpc512x_psc_fifo_init();
|
2010-02-16 10:35:13 -07:00
|
|
|
}
|