2012-03-05 04:49:30 -07:00
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/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_SMP_H
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#define __ASM_SMP_H
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/thread_info.h>
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#ifndef CONFIG_SMP
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# error "<asm/smp.h> included in non-SMP build"
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#endif
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#define raw_smp_processor_id() (current_thread_info()->cpu)
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struct seq_file;
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/*
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* generate IPI list text
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*/
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extern void show_ipi_list(struct seq_file *p, int prec);
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/*
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* Called from C code, this handles an IPI.
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*/
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extern void handle_IPI(int ipinr, struct pt_regs *regs);
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/*
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* Setup the set of possible CPUs (via set_cpu_possible)
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*/
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extern void smp_init_cpus(void);
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/*
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* Provide a function to raise an IPI cross call on CPUs in callmap.
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*/
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extern void set_smp_cross_call(void (*)(const struct cpumask *, unsigned int));
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2014-08-16 10:48:05 -06:00
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extern void (*__smp_cross_call)(const struct cpumask *, unsigned int);
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2012-03-05 04:49:30 -07:00
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/*
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* Called from the secondary holding pen, this is the secondary CPU entry point.
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*/
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asmlinkage void secondary_start_kernel(void);
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/*
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* Initial data for bringing up a secondary CPU.
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*/
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struct secondary_data {
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void *stack;
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};
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extern struct secondary_data secondary_data;
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arm64: factor out spin-table boot method
The arm64 kernel has an internal holding pen, which is necessary for
some systems where we can't bring CPUs online individually and must hold
multiple CPUs in a safe area until the kernel is able to handle them.
The current SMP infrastructure for arm64 is closely coupled to this
holding pen, and alternative boot methods must launch CPUs into the pen,
where they sit before they are launched into the kernel proper.
With PSCI (and possibly other future boot methods), we can bring CPUs
online individually, and need not perform the secondary_holding_pen
dance. Instead, this patch factors the holding pen management code out
to the spin-table boot method code, as it is the only boot method
requiring the pen.
A new entry point for secondaries, secondary_entry is added for other
boot methods to use, which bypasses the holding pen and its associated
overhead when bringing CPUs online. The smp.pen.text section is also
removed, as the pen can live in head.text without problem.
The cpu_operations structure is extended with two new functions,
cpu_boot and cpu_postboot, for bringing a cpu into the kernel and
performing any post-boot cleanup required by a bootmethod (e.g.
resetting the secondary_holding_pen_release to INVALID_HWID).
Documentation is added for cpu_operations.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-10-24 13:30:16 -06:00
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extern void secondary_entry(void);
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2012-03-05 04:49:30 -07:00
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extern void arch_send_call_function_single_ipi(int cpu);
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extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
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2013-10-24 13:30:18 -06:00
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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extern void cpu_die(void);
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2012-03-05 04:49:30 -07:00
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#endif /* ifndef __ASM_SMP_H */
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