2009-06-04 03:10:11 -06:00
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/* cpumap.c: used for optimizing CPU assignment
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*
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* Copyright (C) 2009 Hong H. Pham <hong.pham@windriver.com>
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*/
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2011-07-22 11:18:16 -06:00
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#include <linux/export.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 02:04:11 -06:00
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#include <linux/slab.h>
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2009-06-04 03:10:11 -06:00
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/cpumask.h>
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#include <linux/spinlock.h>
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#include <asm/cpudata.h>
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#include "cpumap.h"
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enum {
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CPUINFO_LVL_ROOT = 0,
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CPUINFO_LVL_NODE,
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CPUINFO_LVL_CORE,
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CPUINFO_LVL_PROC,
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CPUINFO_LVL_MAX,
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};
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enum {
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ROVER_NO_OP = 0,
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/* Increment rover every time level is visited */
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ROVER_INC_ON_VISIT = 1 << 0,
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/* Increment parent's rover every time rover wraps around */
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ROVER_INC_PARENT_ON_LOOP = 1 << 1,
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};
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struct cpuinfo_node {
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int id;
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int level;
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int num_cpus; /* Number of CPUs in this hierarchy */
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int parent_index;
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int child_start; /* Array index of the first child node */
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int child_end; /* Array index of the last child node */
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int rover; /* Child node iterator */
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};
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struct cpuinfo_level {
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int start_index; /* Index of first node of a level in a cpuinfo tree */
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int end_index; /* Index of last node of a level in a cpuinfo tree */
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int num_nodes; /* Number of nodes in a level in a cpuinfo tree */
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};
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struct cpuinfo_tree {
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int total_nodes;
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/* Offsets into nodes[] for each level of the tree */
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struct cpuinfo_level level[CPUINFO_LVL_MAX];
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struct cpuinfo_node nodes[0];
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};
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static struct cpuinfo_tree *cpuinfo_tree;
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static u16 cpu_distribution_map[NR_CPUS];
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static DEFINE_SPINLOCK(cpu_map_lock);
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/* Niagara optimized cpuinfo tree traversal. */
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static const int niagara_iterate_method[] = {
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[CPUINFO_LVL_ROOT] = ROVER_NO_OP,
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/* Strands (or virtual CPUs) within a core may not run concurrently
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* on the Niagara, as instruction pipeline(s) are shared. Distribute
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* work to strands in different cores first for better concurrency.
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* Go to next NUMA node when all cores are used.
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*/
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[CPUINFO_LVL_NODE] = ROVER_INC_ON_VISIT|ROVER_INC_PARENT_ON_LOOP,
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/* Strands are grouped together by proc_id in cpuinfo_sparc, i.e.
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* a proc_id represents an instruction pipeline. Distribute work to
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* strands in different proc_id groups if the core has multiple
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* instruction pipelines (e.g. the Niagara 2/2+ has two).
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*/
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[CPUINFO_LVL_CORE] = ROVER_INC_ON_VISIT,
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/* Pick the next strand in the proc_id group. */
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[CPUINFO_LVL_PROC] = ROVER_INC_ON_VISIT,
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};
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/* Generic cpuinfo tree traversal. Distribute work round robin across NUMA
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* nodes.
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*/
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static const int generic_iterate_method[] = {
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[CPUINFO_LVL_ROOT] = ROVER_INC_ON_VISIT,
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[CPUINFO_LVL_NODE] = ROVER_NO_OP,
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[CPUINFO_LVL_CORE] = ROVER_INC_PARENT_ON_LOOP,
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[CPUINFO_LVL_PROC] = ROVER_INC_ON_VISIT|ROVER_INC_PARENT_ON_LOOP,
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};
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static int cpuinfo_id(int cpu, int level)
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{
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int id;
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switch (level) {
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case CPUINFO_LVL_ROOT:
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id = 0;
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break;
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case CPUINFO_LVL_NODE:
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id = cpu_to_node(cpu);
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break;
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case CPUINFO_LVL_CORE:
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id = cpu_data(cpu).core_id;
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break;
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case CPUINFO_LVL_PROC:
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id = cpu_data(cpu).proc_id;
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break;
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default:
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id = -EINVAL;
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}
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return id;
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}
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/*
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* Enumerate the CPU information in __cpu_data to determine the start index,
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* end index, and number of nodes for each level in the cpuinfo tree. The
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* total number of cpuinfo nodes required to build the tree is returned.
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*/
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static int enumerate_cpuinfo_nodes(struct cpuinfo_level *tree_level)
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{
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int prev_id[CPUINFO_LVL_MAX];
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int i, n, num_nodes;
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for (i = CPUINFO_LVL_ROOT; i < CPUINFO_LVL_MAX; i++) {
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struct cpuinfo_level *lv = &tree_level[i];
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prev_id[i] = -1;
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lv->start_index = lv->end_index = lv->num_nodes = 0;
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}
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num_nodes = 1; /* Include the root node */
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for (i = 0; i < num_possible_cpus(); i++) {
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if (!cpu_online(i))
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continue;
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n = cpuinfo_id(i, CPUINFO_LVL_NODE);
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if (n > prev_id[CPUINFO_LVL_NODE]) {
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tree_level[CPUINFO_LVL_NODE].num_nodes++;
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prev_id[CPUINFO_LVL_NODE] = n;
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num_nodes++;
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}
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n = cpuinfo_id(i, CPUINFO_LVL_CORE);
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if (n > prev_id[CPUINFO_LVL_CORE]) {
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tree_level[CPUINFO_LVL_CORE].num_nodes++;
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prev_id[CPUINFO_LVL_CORE] = n;
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num_nodes++;
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}
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n = cpuinfo_id(i, CPUINFO_LVL_PROC);
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if (n > prev_id[CPUINFO_LVL_PROC]) {
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tree_level[CPUINFO_LVL_PROC].num_nodes++;
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prev_id[CPUINFO_LVL_PROC] = n;
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num_nodes++;
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}
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}
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tree_level[CPUINFO_LVL_ROOT].num_nodes = 1;
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n = tree_level[CPUINFO_LVL_NODE].num_nodes;
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tree_level[CPUINFO_LVL_NODE].start_index = 1;
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tree_level[CPUINFO_LVL_NODE].end_index = n;
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n++;
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tree_level[CPUINFO_LVL_CORE].start_index = n;
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n += tree_level[CPUINFO_LVL_CORE].num_nodes;
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tree_level[CPUINFO_LVL_CORE].end_index = n - 1;
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tree_level[CPUINFO_LVL_PROC].start_index = n;
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n += tree_level[CPUINFO_LVL_PROC].num_nodes;
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tree_level[CPUINFO_LVL_PROC].end_index = n - 1;
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return num_nodes;
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}
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/* Build a tree representation of the CPU hierarchy using the per CPU
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* information in __cpu_data. Entries in __cpu_data[0..NR_CPUS] are
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* assumed to be sorted in ascending order based on node, core_id, and
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* proc_id (in order of significance).
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*/
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static struct cpuinfo_tree *build_cpuinfo_tree(void)
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{
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struct cpuinfo_tree *new_tree;
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struct cpuinfo_node *node;
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struct cpuinfo_level tmp_level[CPUINFO_LVL_MAX];
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int num_cpus[CPUINFO_LVL_MAX];
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int level_rover[CPUINFO_LVL_MAX];
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int prev_id[CPUINFO_LVL_MAX];
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int n, id, cpu, prev_cpu, last_cpu, level;
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n = enumerate_cpuinfo_nodes(tmp_level);
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new_tree = kzalloc(sizeof(struct cpuinfo_tree) +
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(sizeof(struct cpuinfo_node) * n), GFP_ATOMIC);
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if (!new_tree)
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return NULL;
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new_tree->total_nodes = n;
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memcpy(&new_tree->level, tmp_level, sizeof(tmp_level));
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2011-05-16 14:38:07 -06:00
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prev_cpu = cpu = cpumask_first(cpu_online_mask);
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2009-06-04 03:10:11 -06:00
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/* Initialize all levels in the tree with the first CPU */
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for (level = CPUINFO_LVL_PROC; level >= CPUINFO_LVL_ROOT; level--) {
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n = new_tree->level[level].start_index;
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level_rover[level] = n;
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node = &new_tree->nodes[n];
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id = cpuinfo_id(cpu, level);
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if (unlikely(id < 0)) {
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kfree(new_tree);
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return NULL;
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}
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node->id = id;
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node->level = level;
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node->num_cpus = 1;
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node->parent_index = (level > CPUINFO_LVL_ROOT)
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? new_tree->level[level - 1].start_index : -1;
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node->child_start = node->child_end = node->rover =
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(level == CPUINFO_LVL_PROC)
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? cpu : new_tree->level[level + 1].start_index;
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prev_id[level] = node->id;
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num_cpus[level] = 1;
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}
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for (last_cpu = (num_possible_cpus() - 1); last_cpu >= 0; last_cpu--) {
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if (cpu_online(last_cpu))
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break;
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}
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while (++cpu <= last_cpu) {
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if (!cpu_online(cpu))
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continue;
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for (level = CPUINFO_LVL_PROC; level >= CPUINFO_LVL_ROOT;
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level--) {
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id = cpuinfo_id(cpu, level);
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if (unlikely(id < 0)) {
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kfree(new_tree);
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return NULL;
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}
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if ((id != prev_id[level]) || (cpu == last_cpu)) {
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prev_id[level] = id;
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node = &new_tree->nodes[level_rover[level]];
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node->num_cpus = num_cpus[level];
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num_cpus[level] = 1;
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if (cpu == last_cpu)
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node->num_cpus++;
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/* Connect tree node to parent */
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if (level == CPUINFO_LVL_ROOT)
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node->parent_index = -1;
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else
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node->parent_index =
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level_rover[level - 1];
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if (level == CPUINFO_LVL_PROC) {
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node->child_end =
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(cpu == last_cpu) ? cpu : prev_cpu;
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} else {
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node->child_end =
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level_rover[level + 1] - 1;
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}
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/* Initialize the next node in the same level */
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n = ++level_rover[level];
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if (n <= new_tree->level[level].end_index) {
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node = &new_tree->nodes[n];
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node->id = id;
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node->level = level;
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/* Connect node to child */
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node->child_start = node->child_end =
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node->rover =
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(level == CPUINFO_LVL_PROC)
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? cpu : level_rover[level + 1];
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}
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} else
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num_cpus[level]++;
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}
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prev_cpu = cpu;
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}
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return new_tree;
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}
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static void increment_rover(struct cpuinfo_tree *t, int node_index,
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int root_index, const int *rover_inc_table)
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{
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struct cpuinfo_node *node = &t->nodes[node_index];
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int top_level, level;
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top_level = t->nodes[root_index].level;
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for (level = node->level; level >= top_level; level--) {
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node->rover++;
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if (node->rover <= node->child_end)
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return;
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node->rover = node->child_start;
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/* If parent's rover does not need to be adjusted, stop here. */
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if ((level == top_level) ||
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!(rover_inc_table[level] & ROVER_INC_PARENT_ON_LOOP))
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return;
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node = &t->nodes[node->parent_index];
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}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int iterate_cpu(struct cpuinfo_tree *t, unsigned int root_index)
|
|
|
|
{
|
|
|
|
const int *rover_inc_table;
|
|
|
|
int level, new_index, index = root_index;
|
|
|
|
|
|
|
|
switch (sun4v_chip_type) {
|
|
|
|
case SUN4V_CHIP_NIAGARA1:
|
|
|
|
case SUN4V_CHIP_NIAGARA2:
|
sparc: Detect and handle UltraSPARC-T3 cpu types.
The cpu compatible string we look for is "SPARC-T3".
As far as memset/memcpy optimizations go, we treat this chip the same
as Niagara-T2/T2+. Use cache initializing stores for memset, and use
perfetch, FPU block loads, cache initializing stores, and block stores
for copies.
We use the Niagara-T2 perf support, since T3 is a close relative in
this regard. Later we'll add support for the new events T3 can
report, plus enable T3's new "sample" mode.
For now I haven't added any new ELF hwcap flags. We probably need
to add a couple, for example:
T2 and T3 both support the population count instruction in hardware.
T3 supports VIS3 instructions, including support (finally) for
partitioned shift. One can also now move directly between float
and integer registers.
T3 supports instructions meant to help with Galois Field and other HPC
calculations, such as XOR multiply. Also there are "OP and negate"
instructions, for example "fnmul" which is multiply-and-negate.
T3 recognizes the transactional memory opcodes, however since
transactional memory isn't supported: 1) 'commit' behaves as a NOP and
2) 'chkpt' always branches 3) 'rdcps' returns all zeros and 4) 'wrcps'
behaves as a NOP.
So we'll need about 3 new elf capability flags in the end to represent
all of these things.
Signed-off-by: David S. Miller <davem@davemloft.net>
2011-07-27 22:06:16 -06:00
|
|
|
case SUN4V_CHIP_NIAGARA3:
|
2011-09-11 11:42:20 -06:00
|
|
|
case SUN4V_CHIP_NIAGARA4:
|
|
|
|
case SUN4V_CHIP_NIAGARA5:
|
2009-06-04 03:10:11 -06:00
|
|
|
rover_inc_table = niagara_iterate_method;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
rover_inc_table = generic_iterate_method;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (level = t->nodes[root_index].level; level < CPUINFO_LVL_MAX;
|
|
|
|
level++) {
|
|
|
|
new_index = t->nodes[index].rover;
|
|
|
|
if (rover_inc_table[level] & ROVER_INC_ON_VISIT)
|
|
|
|
increment_rover(t, index, root_index, rover_inc_table);
|
|
|
|
|
|
|
|
index = new_index;
|
|
|
|
}
|
|
|
|
return index;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void _cpu_map_rebuild(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (cpuinfo_tree) {
|
|
|
|
kfree(cpuinfo_tree);
|
|
|
|
cpuinfo_tree = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
cpuinfo_tree = build_cpuinfo_tree();
|
|
|
|
if (!cpuinfo_tree)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* Build CPU distribution map that spans all online CPUs. No need
|
|
|
|
* to check if the CPU is online, as that is done when the cpuinfo
|
|
|
|
* tree is being built.
|
|
|
|
*/
|
|
|
|
for (i = 0; i < cpuinfo_tree->nodes[0].num_cpus; i++)
|
|
|
|
cpu_distribution_map[i] = iterate_cpu(cpuinfo_tree, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Fallback if the cpuinfo tree could not be built. CPU mapping is linear
|
|
|
|
* round robin.
|
|
|
|
*/
|
|
|
|
static int simple_map_to_cpu(unsigned int index)
|
|
|
|
{
|
|
|
|
int i, end, cpu_rover;
|
|
|
|
|
|
|
|
cpu_rover = 0;
|
|
|
|
end = index % num_online_cpus();
|
|
|
|
for (i = 0; i < num_possible_cpus(); i++) {
|
|
|
|
if (cpu_online(cpu_rover)) {
|
|
|
|
if (cpu_rover >= end)
|
|
|
|
return cpu_rover;
|
|
|
|
|
|
|
|
cpu_rover++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Impossible, since num_online_cpus() <= num_possible_cpus() */
|
2011-05-16 14:38:07 -06:00
|
|
|
return cpumask_first(cpu_online_mask);
|
2009-06-04 03:10:11 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static int _map_to_cpu(unsigned int index)
|
|
|
|
{
|
|
|
|
struct cpuinfo_node *root_node;
|
|
|
|
|
|
|
|
if (unlikely(!cpuinfo_tree)) {
|
|
|
|
_cpu_map_rebuild();
|
|
|
|
if (!cpuinfo_tree)
|
|
|
|
return simple_map_to_cpu(index);
|
|
|
|
}
|
|
|
|
|
|
|
|
root_node = &cpuinfo_tree->nodes[0];
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
|
|
if (unlikely(root_node->num_cpus != num_online_cpus())) {
|
|
|
|
_cpu_map_rebuild();
|
|
|
|
if (!cpuinfo_tree)
|
|
|
|
return simple_map_to_cpu(index);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
return cpu_distribution_map[index % root_node->num_cpus];
|
|
|
|
}
|
|
|
|
|
|
|
|
int map_to_cpu(unsigned int index)
|
|
|
|
{
|
|
|
|
int mapped_cpu;
|
|
|
|
unsigned long flag;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&cpu_map_lock, flag);
|
|
|
|
mapped_cpu = _map_to_cpu(index);
|
|
|
|
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
|
|
while (unlikely(!cpu_online(mapped_cpu)))
|
|
|
|
mapped_cpu = _map_to_cpu(index);
|
|
|
|
#endif
|
|
|
|
spin_unlock_irqrestore(&cpu_map_lock, flag);
|
|
|
|
return mapped_cpu;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(map_to_cpu);
|
|
|
|
|
|
|
|
void cpu_map_rebuild(void)
|
|
|
|
{
|
|
|
|
unsigned long flag;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&cpu_map_lock, flag);
|
|
|
|
_cpu_map_rebuild();
|
|
|
|
spin_unlock_irqrestore(&cpu_map_lock, flag);
|
|
|
|
}
|