2008-11-05 08:36:16 -07:00
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright IBM Corp. 2008
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*/
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#include <asm/kvm_ppc.h>
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#include <asm/dcr.h>
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#include <asm/dcr-regs.h>
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#include <asm/disassemble.h>
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2008-11-10 13:57:36 -07:00
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#include <asm/kvm_44x.h>
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2008-12-02 14:51:57 -07:00
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#include "timing.h"
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2008-11-05 08:36:16 -07:00
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#include "booke.h"
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#include "44x_tlb.h"
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2012-08-15 16:34:58 -06:00
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#define XOP_MFDCRX 259
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2008-11-05 08:36:16 -07:00
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#define XOP_MFDCR 323
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2012-08-15 16:28:09 -06:00
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#define XOP_MTDCRX 387
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2008-11-05 08:36:16 -07:00
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#define XOP_MTDCR 451
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#define XOP_TLBSX 914
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#define XOP_ICCCI 966
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#define XOP_TLBWE 978
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2012-08-15 16:28:09 -06:00
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static int emulate_mtdcr(struct kvm_vcpu *vcpu, int rs, int dcrn)
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{
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/* emulate some access in kernel */
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switch (dcrn) {
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case DCRN_CPR0_CONFIG_ADDR:
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vcpu->arch.cpr0_cfgaddr = kvmppc_get_gpr(vcpu, rs);
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return EMULATE_DONE;
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default:
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vcpu->run->dcr.dcrn = dcrn;
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vcpu->run->dcr.data = kvmppc_get_gpr(vcpu, rs);
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vcpu->run->dcr.is_write = 1;
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2012-10-05 19:56:35 -06:00
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vcpu->arch.dcr_is_write = 1;
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2012-08-15 16:28:09 -06:00
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vcpu->arch.dcr_needed = 1;
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kvmppc_account_exit(vcpu, DCR_EXITS);
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return EMULATE_DO_DCR;
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}
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}
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2012-08-15 16:34:58 -06:00
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static int emulate_mfdcr(struct kvm_vcpu *vcpu, int rt, int dcrn)
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{
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/* The guest may access CPR0 registers to determine the timebase
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* frequency, and it must know the real host frequency because it
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* can directly access the timebase registers.
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*
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* It would be possible to emulate those accesses in userspace,
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* but userspace can really only figure out the end frequency.
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* We could decompose that into the factors that compute it, but
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* that's tricky math, and it's easier to just report the real
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* CPR0 values.
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*/
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switch (dcrn) {
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case DCRN_CPR0_CONFIG_ADDR:
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kvmppc_set_gpr(vcpu, rt, vcpu->arch.cpr0_cfgaddr);
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break;
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case DCRN_CPR0_CONFIG_DATA:
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local_irq_disable();
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mtdcr(DCRN_CPR0_CONFIG_ADDR,
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vcpu->arch.cpr0_cfgaddr);
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kvmppc_set_gpr(vcpu, rt,
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mfdcr(DCRN_CPR0_CONFIG_DATA));
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local_irq_enable();
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break;
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default:
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vcpu->run->dcr.dcrn = dcrn;
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vcpu->run->dcr.data = 0;
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vcpu->run->dcr.is_write = 0;
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2012-10-05 19:56:35 -06:00
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vcpu->arch.dcr_is_write = 0;
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2012-08-15 16:34:58 -06:00
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vcpu->arch.io_gpr = rt;
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vcpu->arch.dcr_needed = 1;
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kvmppc_account_exit(vcpu, DCR_EXITS);
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return EMULATE_DO_DCR;
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}
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return EMULATE_DONE;
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}
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2008-11-05 08:36:16 -07:00
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int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
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unsigned int inst, int *advance)
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{
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int emulated = EMULATE_DONE;
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2012-05-04 06:01:33 -06:00
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int dcrn = get_dcrn(inst);
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int ra = get_ra(inst);
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int rb = get_rb(inst);
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int rc = get_rc(inst);
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int rs = get_rs(inst);
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int rt = get_rt(inst);
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int ws = get_ws(inst);
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2008-11-05 08:36:16 -07:00
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switch (get_op(inst)) {
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case 31:
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switch (get_xop(inst)) {
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case XOP_MFDCR:
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2012-08-15 16:34:58 -06:00
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emulated = emulate_mfdcr(vcpu, rt, dcrn);
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break;
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2008-11-05 08:36:16 -07:00
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2012-08-15 16:34:58 -06:00
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case XOP_MFDCRX:
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emulated = emulate_mfdcr(vcpu, rt,
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kvmppc_get_gpr(vcpu, ra));
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2008-11-05 08:36:16 -07:00
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break;
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case XOP_MTDCR:
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2012-08-15 16:28:09 -06:00
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emulated = emulate_mtdcr(vcpu, rs, dcrn);
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break;
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2008-11-05 08:36:16 -07:00
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2012-08-15 16:28:09 -06:00
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case XOP_MTDCRX:
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emulated = emulate_mtdcr(vcpu, rs,
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kvmppc_get_gpr(vcpu, ra));
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2008-11-05 08:36:16 -07:00
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break;
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case XOP_TLBWE:
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emulated = kvmppc_44x_emul_tlbwe(vcpu, ra, rs, ws);
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break;
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case XOP_TLBSX:
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emulated = kvmppc_44x_emul_tlbsx(vcpu, rt, ra, rb, rc);
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break;
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case XOP_ICCCI:
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break;
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default:
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emulated = EMULATE_FAIL;
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}
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break;
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default:
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emulated = EMULATE_FAIL;
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}
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2009-01-03 15:23:06 -07:00
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if (emulated == EMULATE_FAIL)
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emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
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2008-11-05 08:36:16 -07:00
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return emulated;
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}
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2012-05-04 06:55:12 -06:00
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int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
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2008-11-05 08:36:16 -07:00
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{
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2009-01-03 15:23:06 -07:00
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int emulated = EMULATE_DONE;
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2008-11-05 08:36:16 -07:00
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switch (sprn) {
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case SPRN_PID:
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2012-05-04 06:55:12 -06:00
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kvmppc_set_pid(vcpu, spr_val); break;
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2009-01-03 15:23:06 -07:00
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case SPRN_MMUCR:
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2012-05-04 06:55:12 -06:00
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vcpu->arch.mmucr = spr_val; break;
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2008-11-05 08:36:16 -07:00
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case SPRN_CCR0:
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2012-05-04 06:55:12 -06:00
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vcpu->arch.ccr0 = spr_val; break;
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2008-11-05 08:36:16 -07:00
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case SPRN_CCR1:
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2012-05-04 06:55:12 -06:00
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vcpu->arch.ccr1 = spr_val; break;
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2008-11-05 08:36:16 -07:00
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default:
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2012-05-04 06:55:12 -06:00
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emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);
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2008-11-05 08:36:16 -07:00
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}
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2009-01-03 15:23:06 -07:00
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return emulated;
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2008-11-05 08:36:16 -07:00
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}
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2012-05-04 06:55:12 -06:00
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int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
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2008-11-05 08:36:16 -07:00
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{
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2009-01-03 15:23:06 -07:00
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int emulated = EMULATE_DONE;
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2008-11-05 08:36:16 -07:00
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switch (sprn) {
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2009-01-03 15:23:06 -07:00
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case SPRN_PID:
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2012-05-04 06:55:12 -06:00
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*spr_val = vcpu->arch.pid; break;
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2008-11-05 08:36:16 -07:00
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case SPRN_MMUCR:
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2012-05-04 06:55:12 -06:00
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*spr_val = vcpu->arch.mmucr; break;
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2008-11-05 08:36:16 -07:00
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case SPRN_CCR0:
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2012-05-04 06:55:12 -06:00
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*spr_val = vcpu->arch.ccr0; break;
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2008-11-05 08:36:16 -07:00
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case SPRN_CCR1:
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2012-05-04 06:55:12 -06:00
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*spr_val = vcpu->arch.ccr1; break;
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2008-11-05 08:36:16 -07:00
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default:
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2012-05-04 06:55:12 -06:00
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emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);
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2008-11-05 08:36:16 -07:00
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}
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2009-01-03 15:23:06 -07:00
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return emulated;
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2008-11-05 08:36:16 -07:00
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}
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