2005-04-16 16:20:36 -06:00
|
|
|
/*
|
|
|
|
* This file is subject to the terms and conditions of the GNU General Public
|
|
|
|
* License. See the file "COPYING" in the main directory of this archive
|
|
|
|
* for more details.
|
|
|
|
*
|
2007-07-13 11:54:10 -06:00
|
|
|
* Copyright (C) 2003, 04, 07 Ralf Baechle (ralf@linux-mips.org)
|
2005-04-16 16:20:36 -06:00
|
|
|
*/
|
|
|
|
#ifndef __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
|
|
|
|
#define __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
|
|
|
|
|
|
|
|
/*
|
2007-09-05 10:44:50 -06:00
|
|
|
* Sibyte are MIPS64 processors wired to a specific configuration
|
2005-04-16 16:20:36 -06:00
|
|
|
*/
|
|
|
|
#define cpu_has_watch 1
|
|
|
|
#define cpu_has_mips16 0
|
|
|
|
#define cpu_has_divec 1
|
|
|
|
#define cpu_has_vce 0
|
|
|
|
#define cpu_has_cache_cdex_p 0
|
|
|
|
#define cpu_has_cache_cdex_s 0
|
|
|
|
#define cpu_has_prefetch 1
|
|
|
|
#define cpu_has_mcheck 1
|
|
|
|
#define cpu_has_ejtag 1
|
|
|
|
|
|
|
|
#define cpu_has_llsc 1
|
|
|
|
#define cpu_has_vtag_icache 1
|
|
|
|
#define cpu_has_dc_aliases 0
|
|
|
|
#define cpu_has_ic_fills_f_dc 0
|
2005-05-31 05:49:19 -06:00
|
|
|
#define cpu_has_dsp 0
|
2007-07-13 11:54:10 -06:00
|
|
|
#define cpu_has_mipsmt 0
|
2007-07-13 11:58:25 -06:00
|
|
|
#define cpu_has_userlocal 0
|
2005-04-16 16:20:36 -06:00
|
|
|
#define cpu_icache_snoops_remote_store 0
|
|
|
|
|
|
|
|
#define cpu_has_nofpuex 0
|
|
|
|
#define cpu_has_64bits 1
|
|
|
|
|
2007-09-05 10:44:50 -06:00
|
|
|
#define cpu_has_mips32r1 1
|
|
|
|
#define cpu_has_mips32r2 0
|
|
|
|
#define cpu_has_mips64r1 1
|
|
|
|
#define cpu_has_mips64r2 0
|
|
|
|
|
2006-07-06 06:04:01 -06:00
|
|
|
#define cpu_has_inclusive_pcaches 0
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
#define cpu_dcache_line_size() 32
|
|
|
|
#define cpu_icache_line_size() 32
|
|
|
|
#define cpu_scache_line_size() 32
|
|
|
|
|
|
|
|
#endif /* __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H */
|