2012-06-19 15:44:25 -06:00
|
|
|
# common clock types
|
2012-09-11 12:56:23 -06:00
|
|
|
obj-$(CONFIG_HAVE_CLK) += clk-devres.o
|
2010-11-17 02:04:33 -07:00
|
|
|
obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o
|
2013-01-18 14:00:05 -07:00
|
|
|
obj-$(CONFIG_COMMON_CLK) += clk.o
|
|
|
|
obj-$(CONFIG_COMMON_CLK) += clk-divider.o
|
|
|
|
obj-$(CONFIG_COMMON_CLK) += clk-fixed-factor.o
|
|
|
|
obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o
|
|
|
|
obj-$(CONFIG_COMMON_CLK) += clk-gate.o
|
|
|
|
obj-$(CONFIG_COMMON_CLK) += clk-mux.o
|
|
|
|
|
2012-04-09 21:32:35 -06:00
|
|
|
# SoCs specific
|
2012-09-10 23:26:15 -06:00
|
|
|
obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
|
2012-01-11 05:52:34 -07:00
|
|
|
obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
|
2012-03-13 17:19:19 -06:00
|
|
|
obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
|
2012-04-28 10:02:39 -06:00
|
|
|
obj-$(CONFIG_ARCH_MXS) += mxs/
|
2012-07-18 16:07:18 -06:00
|
|
|
obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
|
2012-04-09 21:32:35 -06:00
|
|
|
obj-$(CONFIG_PLAT_SPEAR) += spear/
|
2012-06-19 15:44:25 -06:00
|
|
|
obj-$(CONFIG_ARCH_U300) += clk-u300.o
|
2012-08-06 10:32:08 -06:00
|
|
|
obj-$(CONFIG_COMMON_CLK_VERSATILE) += versatile/
|
2012-08-20 00:42:37 -06:00
|
|
|
obj-$(CONFIG_ARCH_PRIMA2) += clk-prima2.o
|
2012-11-17 07:22:22 -07:00
|
|
|
obj-$(CONFIG_PLAT_ORION) += mvebu/
|
2012-08-19 20:55:11 -06:00
|
|
|
ifeq ($(CONFIG_COMMON_CLK), y)
|
|
|
|
obj-$(CONFIG_ARCH_MMP) += mmp/
|
|
|
|
endif
|
2012-08-20 04:05:35 -06:00
|
|
|
obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o
|
2012-08-27 07:45:53 -06:00
|
|
|
obj-$(CONFIG_ARCH_U8500) += ux500/
|
2012-08-21 08:01:39 -06:00
|
|
|
obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
|
2012-11-08 11:04:26 -07:00
|
|
|
obj-$(CONFIG_ARCH_ZYNQ) += clk-zynq.o
|
clk: tegra: add Tegra specific clocks
Add Tegra specific clocks, pll, pll_out, peripheral, frac_divider, super.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: alloc sizeof(*foo) not sizeof(struct foo), add comments re:
storing pointers to stack variables, make a timeout loop more idiomatic,
use _clk_pll_disable() not clk_disable_pll() from _program_pll() to
avoid redundant lock operations, unified tegra_clk_periph() and
tegra_clk_periph_nodiv(), unified tegra_clk_pll{,e}, rename all clock
registration functions so they don't have the same name as the clock
structs, return -EINVAL from clk_plle_enable when matching table rate
not found, pass ops to _tegra_clk_register_pll rather than a bool.]
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-11 00:46:20 -07:00
|
|
|
obj-$(CONFIG_ARCH_TEGRA) += tegra/
|
2012-05-17 03:04:57 -06:00
|
|
|
|
2013-01-18 06:46:00 -07:00
|
|
|
obj-$(CONFIG_X86) += x86/
|
2012-05-17 03:04:57 -06:00
|
|
|
|
|
|
|
# Chip specific
|
|
|
|
obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
|
2012-08-28 02:54:28 -06:00
|
|
|
obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
|
2012-09-14 08:30:27 -06:00
|
|
|
obj-$(CONFIG_CLK_TWL6040) += clk-twl6040.o
|