101 lines
2.8 KiB
C
101 lines
2.8 KiB
C
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#ifndef SMSC_SIO_H
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#define SMSC_SIO_H
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/******************************************
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Keys. They should work with every SMsC SIO
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******************************************/
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#define SMSCSIO_CFGACCESSKEY 0x55
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#define SMSCSIO_CFGEXITKEY 0xaa
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/*****************************
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* Generic SIO Flat (!?) *
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*****************************/
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/* Register 0x0d */
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#define SMSCSIOFLAT_DEVICEID_REG 0x0d
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/* Register 0x0c */
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#define SMSCSIOFLAT_UARTMODE0C_REG 0x0c
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#define SMSCSIOFLAT_UART2MODE_MASK 0x38
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#define SMSCSIOFLAT_UART2MODE_VAL_COM 0x00
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#define SMSCSIOFLAT_UART2MODE_VAL_IRDA 0x08
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#define SMSCSIOFLAT_UART2MODE_VAL_ASKIR 0x10
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/* Register 0x25 */
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#define SMSCSIOFLAT_UART2BASEADDR_REG 0x25
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/* Register 0x2b */
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#define SMSCSIOFLAT_FIRBASEADDR_REG 0x2b
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/* Register 0x2c */
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#define SMSCSIOFLAT_FIRDMASELECT_REG 0x2c
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#define SMSCSIOFLAT_FIRDMASELECT_MASK 0x0f
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/* Register 0x28 */
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#define SMSCSIOFLAT_UARTIRQSELECT_REG 0x28
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#define SMSCSIOFLAT_UART2IRQSELECT_MASK 0x0f
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#define SMSCSIOFLAT_UART1IRQSELECT_MASK 0xf0
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#define SMSCSIOFLAT_UARTIRQSELECT_VAL_NONE 0x00
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/*********************
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* LPC47N227 *
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*********************/
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#define LPC47N227_CFGACCESSKEY 0x55
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#define LPC47N227_CFGEXITKEY 0xaa
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/* Register 0x00 */
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#define LPC47N227_FDCPOWERVALIDCONF_REG 0x00
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#define LPC47N227_FDCPOWER_MASK 0x08
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#define LPC47N227_VALID_MASK 0x80
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/* Register 0x02 */
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#define LPC47N227_UART12POWER_REG 0x02
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#define LPC47N227_UART1POWERDOWN_MASK 0x08
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#define LPC47N227_UART2POWERDOWN_MASK 0x80
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/* Register 0x07 */
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#define LPC47N227_APMBOOTDRIVE_REG 0x07
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#define LPC47N227_PARPORT2AUTOPWRDOWN_MASK 0x10 /* auto power down on if set */
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#define LPC47N227_UART2AUTOPWRDOWN_MASK 0x20 /* auto power down on if set */
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#define LPC47N227_UART1AUTOPWRDOWN_MASK 0x40 /* auto power down on if set */
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/* Register 0x0c */
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#define LPC47N227_UARTMODE0C_REG 0x0c
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#define LPC47N227_UART2MODE_MASK 0x38
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#define LPC47N227_UART2MODE_VAL_COM 0x00
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#define LPC47N227_UART2MODE_VAL_IRDA 0x08
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#define LPC47N227_UART2MODE_VAL_ASKIR 0x10
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/* Register 0x0d */
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#define LPC47N227_DEVICEID_REG 0x0d
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#define LPC47N227_DEVICEID_DEFVAL 0x5a
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/* Register 0x0e */
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#define LPC47N227_REVISIONID_REG 0x0e
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/* Register 0x25 */
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#define LPC47N227_UART2BASEADDR_REG 0x25
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/* Register 0x28 */
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#define LPC47N227_UARTIRQSELECT_REG 0x28
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#define LPC47N227_UART2IRQSELECT_MASK 0x0f
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#define LPC47N227_UART1IRQSELECT_MASK 0xf0
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#define LPC47N227_UARTIRQSELECT_VAL_NONE 0x00
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/* Register 0x2b */
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#define LPC47N227_FIRBASEADDR_REG 0x2b
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/* Register 0x2c */
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#define LPC47N227_FIRDMASELECT_REG 0x2c
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#define LPC47N227_FIRDMASELECT_MASK 0x0f
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#define LPC47N227_FIRDMASELECT_VAL_DMA1 0x01 /* 47n227 has three dma channels */
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#define LPC47N227_FIRDMASELECT_VAL_DMA2 0x02
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#define LPC47N227_FIRDMASELECT_VAL_DMA3 0x03
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#define LPC47N227_FIRDMASELECT_VAL_NONE 0x0f
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#endif
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