2009-01-08 17:49:01 -07:00
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/*
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* core.h -- Core driver for NXP PCF50633
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*
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* (C) 2006-2008 by Openmoko, Inc.
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __LINUX_MFD_PCF50633_CORE_H
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#define __LINUX_MFD_PCF50633_CORE_H
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#include <linux/i2c.h>
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#include <linux/workqueue.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/machine.h>
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#include <linux/power_supply.h>
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struct pcf50633;
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#define PCF50633_NUM_REGULATORS 11
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struct pcf50633_platform_data {
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struct regulator_init_data reg_init_data[PCF50633_NUM_REGULATORS];
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char **batteries;
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int num_batteries;
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2009-01-27 06:53:12 -07:00
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int charging_restart_interval;
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2009-01-08 17:49:01 -07:00
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/* Callbacks */
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void (*probe_done)(struct pcf50633 *);
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void (*mbc_event_callback)(struct pcf50633 *, int);
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void (*regulator_registered)(struct pcf50633 *, int);
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void (*force_shutdown)(struct pcf50633 *);
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u8 resumers[5];
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};
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struct pcf50633_subdev_pdata {
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struct pcf50633 *pcf;
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};
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struct pcf50633_irq {
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void (*handler) (int, void *);
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void *data;
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};
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int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
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void (*handler) (int, void *), void *data);
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int pcf50633_free_irq(struct pcf50633 *pcf, int irq);
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int pcf50633_irq_mask(struct pcf50633 *pcf, int irq);
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int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq);
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int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq);
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int pcf50633_read_block(struct pcf50633 *, u8 reg,
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int nr_regs, u8 *data);
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int pcf50633_write_block(struct pcf50633 *pcf, u8 reg,
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int nr_regs, u8 *data);
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u8 pcf50633_reg_read(struct pcf50633 *, u8 reg);
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int pcf50633_reg_write(struct pcf50633 *pcf, u8 reg, u8 val);
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int pcf50633_reg_set_bit_mask(struct pcf50633 *pcf, u8 reg, u8 mask, u8 val);
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int pcf50633_reg_clear_bits(struct pcf50633 *pcf, u8 reg, u8 bits);
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/* Interrupt registers */
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#define PCF50633_REG_INT1 0x02
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#define PCF50633_REG_INT2 0x03
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#define PCF50633_REG_INT3 0x04
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#define PCF50633_REG_INT4 0x05
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#define PCF50633_REG_INT5 0x06
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#define PCF50633_REG_INT1M 0x07
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#define PCF50633_REG_INT2M 0x08
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#define PCF50633_REG_INT3M 0x09
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#define PCF50633_REG_INT4M 0x0a
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#define PCF50633_REG_INT5M 0x0b
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enum {
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/* Chip IRQs */
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PCF50633_IRQ_ADPINS,
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PCF50633_IRQ_ADPREM,
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PCF50633_IRQ_USBINS,
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PCF50633_IRQ_USBREM,
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PCF50633_IRQ_RESERVED1,
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PCF50633_IRQ_RESERVED2,
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PCF50633_IRQ_ALARM,
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PCF50633_IRQ_SECOND,
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PCF50633_IRQ_ONKEYR,
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PCF50633_IRQ_ONKEYF,
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PCF50633_IRQ_EXTON1R,
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PCF50633_IRQ_EXTON1F,
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PCF50633_IRQ_EXTON2R,
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PCF50633_IRQ_EXTON2F,
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PCF50633_IRQ_EXTON3R,
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PCF50633_IRQ_EXTON3F,
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PCF50633_IRQ_BATFULL,
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PCF50633_IRQ_CHGHALT,
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PCF50633_IRQ_THLIMON,
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PCF50633_IRQ_THLIMOFF,
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PCF50633_IRQ_USBLIMON,
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PCF50633_IRQ_USBLIMOFF,
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PCF50633_IRQ_ADCRDY,
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PCF50633_IRQ_ONKEY1S,
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PCF50633_IRQ_LOWSYS,
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PCF50633_IRQ_LOWBAT,
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PCF50633_IRQ_HIGHTMP,
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PCF50633_IRQ_AUTOPWRFAIL,
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PCF50633_IRQ_DWN1PWRFAIL,
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PCF50633_IRQ_DWN2PWRFAIL,
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PCF50633_IRQ_LEDPWRFAIL,
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PCF50633_IRQ_LEDOVP,
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PCF50633_IRQ_LDO1PWRFAIL,
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PCF50633_IRQ_LDO2PWRFAIL,
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PCF50633_IRQ_LDO3PWRFAIL,
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PCF50633_IRQ_LDO4PWRFAIL,
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PCF50633_IRQ_LDO5PWRFAIL,
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PCF50633_IRQ_LDO6PWRFAIL,
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PCF50633_IRQ_HCLDOPWRFAIL,
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PCF50633_IRQ_HCLDOOVL,
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/* Always last */
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PCF50633_NUM_IRQ,
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};
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struct pcf50633 {
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struct device *dev;
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struct i2c_client *i2c_client;
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struct pcf50633_platform_data *pdata;
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int irq;
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struct pcf50633_irq irq_handler[PCF50633_NUM_IRQ];
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struct work_struct irq_work;
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struct mutex lock;
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u8 mask_regs[5];
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u8 suspend_irq_masks[5];
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u8 resume_reason[5];
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int is_suspended;
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int onkey1s_held;
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struct platform_device *rtc_pdev;
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struct platform_device *mbc_pdev;
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struct platform_device *adc_pdev;
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struct platform_device *input_pdev;
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struct platform_device *regulator_pdev[PCF50633_NUM_REGULATORS];
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};
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enum pcf50633_reg_int1 {
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PCF50633_INT1_ADPINS = 0x01, /* Adapter inserted */
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PCF50633_INT1_ADPREM = 0x02, /* Adapter removed */
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PCF50633_INT1_USBINS = 0x04, /* USB inserted */
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PCF50633_INT1_USBREM = 0x08, /* USB removed */
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/* reserved */
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PCF50633_INT1_ALARM = 0x40, /* RTC alarm time is reached */
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PCF50633_INT1_SECOND = 0x80, /* RTC periodic second interrupt */
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};
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enum pcf50633_reg_int2 {
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PCF50633_INT2_ONKEYR = 0x01, /* ONKEY rising edge */
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PCF50633_INT2_ONKEYF = 0x02, /* ONKEY falling edge */
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PCF50633_INT2_EXTON1R = 0x04, /* EXTON1 rising edge */
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PCF50633_INT2_EXTON1F = 0x08, /* EXTON1 falling edge */
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PCF50633_INT2_EXTON2R = 0x10, /* EXTON2 rising edge */
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PCF50633_INT2_EXTON2F = 0x20, /* EXTON2 falling edge */
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PCF50633_INT2_EXTON3R = 0x40, /* EXTON3 rising edge */
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PCF50633_INT2_EXTON3F = 0x80, /* EXTON3 falling edge */
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};
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enum pcf50633_reg_int3 {
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PCF50633_INT3_BATFULL = 0x01, /* Battery full */
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PCF50633_INT3_CHGHALT = 0x02, /* Charger halt */
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PCF50633_INT3_THLIMON = 0x04,
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PCF50633_INT3_THLIMOFF = 0x08,
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PCF50633_INT3_USBLIMON = 0x10,
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PCF50633_INT3_USBLIMOFF = 0x20,
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PCF50633_INT3_ADCRDY = 0x40, /* ADC result ready */
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PCF50633_INT3_ONKEY1S = 0x80, /* ONKEY pressed 1 second */
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};
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enum pcf50633_reg_int4 {
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PCF50633_INT4_LOWSYS = 0x01,
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PCF50633_INT4_LOWBAT = 0x02,
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PCF50633_INT4_HIGHTMP = 0x04,
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PCF50633_INT4_AUTOPWRFAIL = 0x08,
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PCF50633_INT4_DWN1PWRFAIL = 0x10,
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PCF50633_INT4_DWN2PWRFAIL = 0x20,
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PCF50633_INT4_LEDPWRFAIL = 0x40,
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PCF50633_INT4_LEDOVP = 0x80,
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};
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enum pcf50633_reg_int5 {
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PCF50633_INT5_LDO1PWRFAIL = 0x01,
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PCF50633_INT5_LDO2PWRFAIL = 0x02,
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PCF50633_INT5_LDO3PWRFAIL = 0x04,
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PCF50633_INT5_LDO4PWRFAIL = 0x08,
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PCF50633_INT5_LDO5PWRFAIL = 0x10,
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PCF50633_INT5_LDO6PWRFAIL = 0x20,
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PCF50633_INT5_HCLDOPWRFAIL = 0x40,
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PCF50633_INT5_HCLDOOVL = 0x80,
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};
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/* misc. registers */
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#define PCF50633_REG_OOCSHDWN 0x0c
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/* LED registers */
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#define PCF50633_REG_LEDOUT 0x28
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#define PCF50633_REG_LEDENA 0x29
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#define PCF50633_REG_LEDCTL 0x2a
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#define PCF50633_REG_LEDDIM 0x2b
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#endif
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