2005-04-16 16:20:36 -06:00
|
|
|
/*
|
|
|
|
* drivers/pci/pci-sysfs.c
|
|
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|
*
|
|
|
|
* (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
|
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* (C) Copyright 2002-2004 IBM Corp.
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* (C) Copyright 2003 Matthew Wilcox
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* (C) Copyright 2003 Hewlett-Packard
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* (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
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* (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
|
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*
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|
* File attributes for PCI devices
|
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|
*
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|
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|
* Modeled after usb's driverfs.c
|
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|
*
|
|
|
|
*/
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|
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#include <linux/kernel.h>
|
2008-10-02 19:52:51 -06:00
|
|
|
#include <linux/sched.h>
|
2005-04-16 16:20:36 -06:00
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|
#include <linux/pci.h>
|
|
|
|
#include <linux/stat.h>
|
2011-05-27 07:37:25 -06:00
|
|
|
#include <linux/export.h>
|
2005-04-16 16:20:36 -06:00
|
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|
#include <linux/topology.h>
|
|
|
|
#include <linux/mm.h>
|
2010-05-13 11:43:07 -06:00
|
|
|
#include <linux/fs.h>
|
2007-07-16 00:40:39 -06:00
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|
|
#include <linux/capability.h>
|
2011-02-14 18:21:49 -07:00
|
|
|
#include <linux/security.h>
|
PCI: add PCI Express ASPM support
PCI Express ASPM defines a protocol for PCI Express components in the D0
state to reduce Link power by placing their Links into a low power state
and instructing the other end of the Link to do likewise. This
capability allows hardware-autonomous, dynamic Link power reduction
beyond what is achievable by software-only controlled power management.
However, The device should be configured by software appropriately.
Enabling ASPM will save power, but will introduce device latency.
This patch adds ASPM support in Linux. It introduces a global policy for
ASPM, a sysfs file /sys/module/pcie_aspm/parameters/policy can control
it. The interface can be used as a boot option too. Currently we have
below setting:
-default, BIOS default setting
-powersave, highest power saving mode, enable all available ASPM
state and clock power management
-performance, highest performance, disable ASPM and clock power
management
By default, the 'default' policy is used currently.
In my test, power difference between powersave mode and performance mode
is about 1.3w in a system with 3 PCIE links.
Note: some devices might not work well with aspm, either because chipset
issue or device issue. The patch provide API (pci_disable_link_state),
driver can disable ASPM for specific device.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-02-24 18:46:41 -07:00
|
|
|
#include <linux/pci-aspm.h>
|
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 02:04:11 -06:00
|
|
|
#include <linux/slab.h>
|
2012-04-16 14:26:02 -06:00
|
|
|
#include <linux/vgaarb.h>
|
PCI/PM: add PCIe runtime D3cold support
This patch adds runtime D3cold support and corresponding ACPI platform
support. This patch only enables runtime D3cold support; it does not
enable D3cold support during system suspend/hibernate.
D3cold is the deepest power saving state for a PCIe device, where its main
power is removed. While it is in D3cold, you can't access the device at
all, not even its configuration space (which is still accessible in D3hot).
Therefore the PCI PM registers can not be used to transition into/out of
the D3cold state; that must be done by platform logic such as ACPI _PR3.
To support wakeup from D3cold, a system may provide auxiliary power, which
allows a device to request wakeup using a Beacon or the sideband WAKE#
signal. WAKE# is usually connected to platform logic such as ACPI GPE.
This is quite different from other power saving states, where devices
request wakeup via a PME message on the PCIe link.
Some devices, such as those in plug-in slots, have no direct platform
logic. For example, there is usually no ACPI _PR3 for them. D3cold
support for these devices can be done via the PCIe Downstream Port leading
to the device. When the PCIe port is powered on/off, the device is powered
on/off too. Wakeup events from the device will be notified to the
corresponding PCIe port.
For more information about PCIe D3cold and corresponding ACPI support,
please refer to:
- PCI Express Base Specification Revision 2.0
- Advanced Configuration and Power Interface Specification Revision 5.0
[bhelgaas: changelog]
Reviewed-by: Rafael J. Wysocki <rjw@sisk.pl>
Originally-by: Zheng Yan <zheng.z.yan@intel.com>
Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-22 20:23:51 -06:00
|
|
|
#include <linux/pm_runtime.h>
|
2005-04-16 16:20:36 -06:00
|
|
|
#include "pci.h"
|
|
|
|
|
|
|
|
static int sysfs_initialized; /* = 0 */
|
|
|
|
|
|
|
|
/* show configuration fields */
|
|
|
|
#define pci_config_attr(field, format_string) \
|
|
|
|
static ssize_t \
|
2005-05-17 04:42:58 -06:00
|
|
|
field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
|
2005-04-16 16:20:36 -06:00
|
|
|
{ \
|
|
|
|
struct pci_dev *pdev; \
|
|
|
|
\
|
|
|
|
pdev = to_pci_dev (dev); \
|
|
|
|
return sprintf (buf, format_string, pdev->field); \
|
|
|
|
}
|
|
|
|
|
|
|
|
pci_config_attr(vendor, "0x%04x\n");
|
|
|
|
pci_config_attr(device, "0x%04x\n");
|
|
|
|
pci_config_attr(subsystem_vendor, "0x%04x\n");
|
|
|
|
pci_config_attr(subsystem_device, "0x%04x\n");
|
|
|
|
pci_config_attr(class, "0x%06x\n");
|
|
|
|
pci_config_attr(irq, "%u\n");
|
|
|
|
|
2006-06-14 17:59:48 -06:00
|
|
|
static ssize_t broken_parity_status_show(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
return sprintf (buf, "%u\n", pdev->broken_parity_status);
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t broken_parity_status_store(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
PCI: Make settable sysfs attributes more consistent
PCI devices have three settable boolean attributes, enable,
broken_parity_status, and msi_bus.
The store functions for these would silently interpret "0x01" as false,
"1llogical" as true, and "true" would be (silently!) ignored and do
nothing.
This is inconsistent with typical sysfs handling of settable attributes,
and just plain doesn't make much sense.
So, use strict_strtoul(), which was created for this purpose. The store
functions will treat a value of 0 as false, non-zero as true, and return
-EINVAL for a parse failure.
Additionally, is_enabled_store() and msi_bus_store() return -EPERM if
CAP_SYS_ADMIN is lacking, rather than silently doing nothing. This is more
typical behavior for sysfs attributes that need a capability.
And msi_bus_store() will only print the "forced subordinate bus ..."
warning if the MSI flag was actually forced to a different value.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-11-30 18:10:12 -07:00
|
|
|
unsigned long val;
|
2006-06-14 17:59:48 -06:00
|
|
|
|
PCI: Make settable sysfs attributes more consistent
PCI devices have three settable boolean attributes, enable,
broken_parity_status, and msi_bus.
The store functions for these would silently interpret "0x01" as false,
"1llogical" as true, and "true" would be (silently!) ignored and do
nothing.
This is inconsistent with typical sysfs handling of settable attributes,
and just plain doesn't make much sense.
So, use strict_strtoul(), which was created for this purpose. The store
functions will treat a value of 0 as false, non-zero as true, and return
-EINVAL for a parse failure.
Additionally, is_enabled_store() and msi_bus_store() return -EPERM if
CAP_SYS_ADMIN is lacking, rather than silently doing nothing. This is more
typical behavior for sysfs attributes that need a capability.
And msi_bus_store() will only print the "forced subordinate bus ..."
warning if the MSI flag was actually forced to a different value.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-11-30 18:10:12 -07:00
|
|
|
if (strict_strtoul(buf, 0, &val) < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
pdev->broken_parity_status = !!val;
|
|
|
|
|
|
|
|
return count;
|
2006-06-14 17:59:48 -06:00
|
|
|
}
|
|
|
|
|
2005-09-10 01:25:49 -06:00
|
|
|
static ssize_t local_cpus_show(struct device *dev,
|
|
|
|
struct device_attribute *attr, char *buf)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2009-01-04 06:18:01 -07:00
|
|
|
const struct cpumask *mask;
|
2005-09-10 01:25:49 -06:00
|
|
|
int len;
|
|
|
|
|
2009-04-17 04:01:55 -06:00
|
|
|
#ifdef CONFIG_NUMA
|
2010-01-04 07:58:57 -07:00
|
|
|
mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
|
|
|
|
cpumask_of_node(dev_to_node(dev));
|
2009-04-17 04:01:55 -06:00
|
|
|
#else
|
2009-01-04 06:18:01 -07:00
|
|
|
mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
|
2009-04-17 04:01:55 -06:00
|
|
|
#endif
|
2009-01-04 06:18:01 -07:00
|
|
|
len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
|
2008-04-08 12:43:03 -06:00
|
|
|
buf[len++] = '\n';
|
|
|
|
buf[len] = '\0';
|
|
|
|
return len;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static ssize_t local_cpulist_show(struct device *dev,
|
|
|
|
struct device_attribute *attr, char *buf)
|
|
|
|
{
|
2009-01-04 06:18:01 -07:00
|
|
|
const struct cpumask *mask;
|
2008-04-08 12:43:03 -06:00
|
|
|
int len;
|
|
|
|
|
2009-04-17 04:01:55 -06:00
|
|
|
#ifdef CONFIG_NUMA
|
2010-01-04 07:58:57 -07:00
|
|
|
mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
|
|
|
|
cpumask_of_node(dev_to_node(dev));
|
2009-04-17 04:01:55 -06:00
|
|
|
#else
|
2009-01-04 06:18:01 -07:00
|
|
|
mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
|
2009-04-17 04:01:55 -06:00
|
|
|
#endif
|
2009-01-04 06:18:01 -07:00
|
|
|
len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
|
2008-04-08 12:43:03 -06:00
|
|
|
buf[len++] = '\n';
|
|
|
|
buf[len] = '\0';
|
|
|
|
return len;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2011-05-12 18:11:40 -06:00
|
|
|
/*
|
|
|
|
* PCI Bus Class Devices
|
|
|
|
*/
|
|
|
|
static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
|
|
|
|
int type,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
const struct cpumask *cpumask;
|
|
|
|
|
|
|
|
cpumask = cpumask_of_pcibus(to_pci_bus(dev));
|
|
|
|
ret = type ?
|
|
|
|
cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
|
|
|
|
cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
|
|
|
|
buf[ret++] = '\n';
|
|
|
|
buf[ret] = '\0';
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/* show resources */
|
|
|
|
static ssize_t
|
2005-05-17 04:42:58 -06:00
|
|
|
resource_show(struct device * dev, struct device_attribute *attr, char * buf)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
struct pci_dev * pci_dev = to_pci_dev(dev);
|
|
|
|
char * str = buf;
|
|
|
|
int i;
|
2008-11-21 11:39:32 -07:00
|
|
|
int max;
|
2006-06-12 18:06:02 -06:00
|
|
|
resource_size_t start, end;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if (pci_dev->subordinate)
|
|
|
|
max = DEVICE_COUNT_RESOURCE;
|
2008-11-21 11:39:32 -07:00
|
|
|
else
|
|
|
|
max = PCI_BRIDGE_RESOURCES;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
for (i = 0; i < max; i++) {
|
2005-05-13 01:44:10 -06:00
|
|
|
struct resource *res = &pci_dev->resource[i];
|
|
|
|
pci_resource_to_user(pci_dev, i, res, &start, &end);
|
|
|
|
str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
|
|
|
|
(unsigned long long)start,
|
|
|
|
(unsigned long long)end,
|
|
|
|
(unsigned long long)res->flags);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
return (str - buf);
|
|
|
|
}
|
|
|
|
|
2005-06-19 04:21:43 -06:00
|
|
|
static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
|
2005-05-05 12:57:25 -06:00
|
|
|
{
|
|
|
|
struct pci_dev *pci_dev = to_pci_dev(dev);
|
|
|
|
|
|
|
|
return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
|
|
|
|
pci_dev->vendor, pci_dev->device,
|
|
|
|
pci_dev->subsystem_vendor, pci_dev->subsystem_device,
|
|
|
|
(u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
|
|
|
|
(u8)(pci_dev->class));
|
|
|
|
}
|
PCI: switch pci_{enable,disable}_device() to be nestable
Changes the pci_{enable,disable}_device() functions to work in a
nested basis, so that eg, three calls to enable_device() require three
calls to disable_device().
The reason for this is to simplify PCI drivers for
multi-interface/capability devices. These are devices that cram more
than one interface in a single function. A relevant example of that is
the Wireless [USB] Host Controller Interface (similar to EHCI) [see
http://www.intel.com/technology/comms/wusb/whci.htm].
In these kind of devices, multiple interfaces are accessed through a
single bar and IRQ line. For that, the drivers map only the smallest
area of the bar to access their register banks and use shared IRQ
handlers.
However, because the order at which those drivers load cannot be known
ahead of time, the sequence in which the calls to pci_enable_device()
and pci_disable_device() cannot be predicted. Thus:
1. driverA starts pci_enable_device()
2. driverB starts pci_enable_device()
3. driverA shutdown pci_disable_device()
4. driverB shutdown pci_disable_device()
between steps 3 and 4, driver B would loose access to it's device,
even if it didn't intend to.
By using this modification, the device won't be disabled until all the
callers to enable() have called disable().
This is implemented by replacing 'struct pci_dev->is_enabled' from a
bitfield to an atomic use count. Each caller to enable increments it,
each caller to disable decrements it. When the count increments from 0
to 1, __pci_enable_device() is called to actually enable the
device. When it drops to zero, pci_disable_device() actually does the
disabling.
We keep the backend __pci_enable_device() for pci_default_resume() to
use and also change the sysfs method implementation, so that userspace
enabling/disabling the device doesn't disable it one time too much.
Signed-off-by: Inaky Perez-Gonzalez <inaky@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-11-22 13:40:31 -07:00
|
|
|
|
|
|
|
static ssize_t is_enabled_store(struct device *dev,
|
|
|
|
struct device_attribute *attr, const char *buf,
|
|
|
|
size_t count)
|
2006-04-29 02:59:08 -06:00
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
PCI: Make settable sysfs attributes more consistent
PCI devices have three settable boolean attributes, enable,
broken_parity_status, and msi_bus.
The store functions for these would silently interpret "0x01" as false,
"1llogical" as true, and "true" would be (silently!) ignored and do
nothing.
This is inconsistent with typical sysfs handling of settable attributes,
and just plain doesn't make much sense.
So, use strict_strtoul(), which was created for this purpose. The store
functions will treat a value of 0 as false, non-zero as true, and return
-EINVAL for a parse failure.
Additionally, is_enabled_store() and msi_bus_store() return -EPERM if
CAP_SYS_ADMIN is lacking, rather than silently doing nothing. This is more
typical behavior for sysfs attributes that need a capability.
And msi_bus_store() will only print the "forced subordinate bus ..."
warning if the MSI flag was actually forced to a different value.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-11-30 18:10:12 -07:00
|
|
|
unsigned long val;
|
|
|
|
ssize_t result = strict_strtoul(buf, 0, &val);
|
|
|
|
|
|
|
|
if (result < 0)
|
|
|
|
return result;
|
2006-04-29 02:59:08 -06:00
|
|
|
|
|
|
|
/* this can crash the machine when done on the "wrong" device */
|
|
|
|
if (!capable(CAP_SYS_ADMIN))
|
PCI: Make settable sysfs attributes more consistent
PCI devices have three settable boolean attributes, enable,
broken_parity_status, and msi_bus.
The store functions for these would silently interpret "0x01" as false,
"1llogical" as true, and "true" would be (silently!) ignored and do
nothing.
This is inconsistent with typical sysfs handling of settable attributes,
and just plain doesn't make much sense.
So, use strict_strtoul(), which was created for this purpose. The store
functions will treat a value of 0 as false, non-zero as true, and return
-EINVAL for a parse failure.
Additionally, is_enabled_store() and msi_bus_store() return -EPERM if
CAP_SYS_ADMIN is lacking, rather than silently doing nothing. This is more
typical behavior for sysfs attributes that need a capability.
And msi_bus_store() will only print the "forced subordinate bus ..."
warning if the MSI flag was actually forced to a different value.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-11-30 18:10:12 -07:00
|
|
|
return -EPERM;
|
2006-04-29 02:59:08 -06:00
|
|
|
|
PCI: Make settable sysfs attributes more consistent
PCI devices have three settable boolean attributes, enable,
broken_parity_status, and msi_bus.
The store functions for these would silently interpret "0x01" as false,
"1llogical" as true, and "true" would be (silently!) ignored and do
nothing.
This is inconsistent with typical sysfs handling of settable attributes,
and just plain doesn't make much sense.
So, use strict_strtoul(), which was created for this purpose. The store
functions will treat a value of 0 as false, non-zero as true, and return
-EINVAL for a parse failure.
Additionally, is_enabled_store() and msi_bus_store() return -EPERM if
CAP_SYS_ADMIN is lacking, rather than silently doing nothing. This is more
typical behavior for sysfs attributes that need a capability.
And msi_bus_store() will only print the "forced subordinate bus ..."
warning if the MSI flag was actually forced to a different value.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-11-30 18:10:12 -07:00
|
|
|
if (!val) {
|
2009-04-03 01:41:46 -06:00
|
|
|
if (pci_is_enabled(pdev))
|
PCI: switch pci_{enable,disable}_device() to be nestable
Changes the pci_{enable,disable}_device() functions to work in a
nested basis, so that eg, three calls to enable_device() require three
calls to disable_device().
The reason for this is to simplify PCI drivers for
multi-interface/capability devices. These are devices that cram more
than one interface in a single function. A relevant example of that is
the Wireless [USB] Host Controller Interface (similar to EHCI) [see
http://www.intel.com/technology/comms/wusb/whci.htm].
In these kind of devices, multiple interfaces are accessed through a
single bar and IRQ line. For that, the drivers map only the smallest
area of the bar to access their register banks and use shared IRQ
handlers.
However, because the order at which those drivers load cannot be known
ahead of time, the sequence in which the calls to pci_enable_device()
and pci_disable_device() cannot be predicted. Thus:
1. driverA starts pci_enable_device()
2. driverB starts pci_enable_device()
3. driverA shutdown pci_disable_device()
4. driverB shutdown pci_disable_device()
between steps 3 and 4, driver B would loose access to it's device,
even if it didn't intend to.
By using this modification, the device won't be disabled until all the
callers to enable() have called disable().
This is implemented by replacing 'struct pci_dev->is_enabled' from a
bitfield to an atomic use count. Each caller to enable increments it,
each caller to disable decrements it. When the count increments from 0
to 1, __pci_enable_device() is called to actually enable the
device. When it drops to zero, pci_disable_device() actually does the
disabling.
We keep the backend __pci_enable_device() for pci_default_resume() to
use and also change the sysfs method implementation, so that userspace
enabling/disabling the device doesn't disable it one time too much.
Signed-off-by: Inaky Perez-Gonzalez <inaky@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-11-22 13:40:31 -07:00
|
|
|
pci_disable_device(pdev);
|
|
|
|
else
|
|
|
|
result = -EIO;
|
PCI: Make settable sysfs attributes more consistent
PCI devices have three settable boolean attributes, enable,
broken_parity_status, and msi_bus.
The store functions for these would silently interpret "0x01" as false,
"1llogical" as true, and "true" would be (silently!) ignored and do
nothing.
This is inconsistent with typical sysfs handling of settable attributes,
and just plain doesn't make much sense.
So, use strict_strtoul(), which was created for this purpose. The store
functions will treat a value of 0 as false, non-zero as true, and return
-EINVAL for a parse failure.
Additionally, is_enabled_store() and msi_bus_store() return -EPERM if
CAP_SYS_ADMIN is lacking, rather than silently doing nothing. This is more
typical behavior for sysfs attributes that need a capability.
And msi_bus_store() will only print the "forced subordinate bus ..."
warning if the MSI flag was actually forced to a different value.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-11-30 18:10:12 -07:00
|
|
|
} else
|
PCI: switch pci_{enable,disable}_device() to be nestable
Changes the pci_{enable,disable}_device() functions to work in a
nested basis, so that eg, three calls to enable_device() require three
calls to disable_device().
The reason for this is to simplify PCI drivers for
multi-interface/capability devices. These are devices that cram more
than one interface in a single function. A relevant example of that is
the Wireless [USB] Host Controller Interface (similar to EHCI) [see
http://www.intel.com/technology/comms/wusb/whci.htm].
In these kind of devices, multiple interfaces are accessed through a
single bar and IRQ line. For that, the drivers map only the smallest
area of the bar to access their register banks and use shared IRQ
handlers.
However, because the order at which those drivers load cannot be known
ahead of time, the sequence in which the calls to pci_enable_device()
and pci_disable_device() cannot be predicted. Thus:
1. driverA starts pci_enable_device()
2. driverB starts pci_enable_device()
3. driverA shutdown pci_disable_device()
4. driverB shutdown pci_disable_device()
between steps 3 and 4, driver B would loose access to it's device,
even if it didn't intend to.
By using this modification, the device won't be disabled until all the
callers to enable() have called disable().
This is implemented by replacing 'struct pci_dev->is_enabled' from a
bitfield to an atomic use count. Each caller to enable increments it,
each caller to disable decrements it. When the count increments from 0
to 1, __pci_enable_device() is called to actually enable the
device. When it drops to zero, pci_disable_device() actually does the
disabling.
We keep the backend __pci_enable_device() for pci_default_resume() to
use and also change the sysfs method implementation, so that userspace
enabling/disabling the device doesn't disable it one time too much.
Signed-off-by: Inaky Perez-Gonzalez <inaky@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-11-22 13:40:31 -07:00
|
|
|
result = pci_enable_device(pdev);
|
2006-04-29 02:59:08 -06:00
|
|
|
|
PCI: switch pci_{enable,disable}_device() to be nestable
Changes the pci_{enable,disable}_device() functions to work in a
nested basis, so that eg, three calls to enable_device() require three
calls to disable_device().
The reason for this is to simplify PCI drivers for
multi-interface/capability devices. These are devices that cram more
than one interface in a single function. A relevant example of that is
the Wireless [USB] Host Controller Interface (similar to EHCI) [see
http://www.intel.com/technology/comms/wusb/whci.htm].
In these kind of devices, multiple interfaces are accessed through a
single bar and IRQ line. For that, the drivers map only the smallest
area of the bar to access their register banks and use shared IRQ
handlers.
However, because the order at which those drivers load cannot be known
ahead of time, the sequence in which the calls to pci_enable_device()
and pci_disable_device() cannot be predicted. Thus:
1. driverA starts pci_enable_device()
2. driverB starts pci_enable_device()
3. driverA shutdown pci_disable_device()
4. driverB shutdown pci_disable_device()
between steps 3 and 4, driver B would loose access to it's device,
even if it didn't intend to.
By using this modification, the device won't be disabled until all the
callers to enable() have called disable().
This is implemented by replacing 'struct pci_dev->is_enabled' from a
bitfield to an atomic use count. Each caller to enable increments it,
each caller to disable decrements it. When the count increments from 0
to 1, __pci_enable_device() is called to actually enable the
device. When it drops to zero, pci_disable_device() actually does the
disabling.
We keep the backend __pci_enable_device() for pci_default_resume() to
use and also change the sysfs method implementation, so that userspace
enabling/disabling the device doesn't disable it one time too much.
Signed-off-by: Inaky Perez-Gonzalez <inaky@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-11-22 13:40:31 -07:00
|
|
|
return result < 0 ? result : count;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t is_enabled_show(struct device *dev,
|
|
|
|
struct device_attribute *attr, char *buf)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev;
|
2006-04-29 02:59:08 -06:00
|
|
|
|
PCI: switch pci_{enable,disable}_device() to be nestable
Changes the pci_{enable,disable}_device() functions to work in a
nested basis, so that eg, three calls to enable_device() require three
calls to disable_device().
The reason for this is to simplify PCI drivers for
multi-interface/capability devices. These are devices that cram more
than one interface in a single function. A relevant example of that is
the Wireless [USB] Host Controller Interface (similar to EHCI) [see
http://www.intel.com/technology/comms/wusb/whci.htm].
In these kind of devices, multiple interfaces are accessed through a
single bar and IRQ line. For that, the drivers map only the smallest
area of the bar to access their register banks and use shared IRQ
handlers.
However, because the order at which those drivers load cannot be known
ahead of time, the sequence in which the calls to pci_enable_device()
and pci_disable_device() cannot be predicted. Thus:
1. driverA starts pci_enable_device()
2. driverB starts pci_enable_device()
3. driverA shutdown pci_disable_device()
4. driverB shutdown pci_disable_device()
between steps 3 and 4, driver B would loose access to it's device,
even if it didn't intend to.
By using this modification, the device won't be disabled until all the
callers to enable() have called disable().
This is implemented by replacing 'struct pci_dev->is_enabled' from a
bitfield to an atomic use count. Each caller to enable increments it,
each caller to disable decrements it. When the count increments from 0
to 1, __pci_enable_device() is called to actually enable the
device. When it drops to zero, pci_disable_device() actually does the
disabling.
We keep the backend __pci_enable_device() for pci_default_resume() to
use and also change the sysfs method implementation, so that userspace
enabling/disabling the device doesn't disable it one time too much.
Signed-off-by: Inaky Perez-Gonzalez <inaky@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-11-22 13:40:31 -07:00
|
|
|
pdev = to_pci_dev (dev);
|
|
|
|
return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
|
2006-04-29 02:59:08 -06:00
|
|
|
}
|
|
|
|
|
2007-01-28 02:53:40 -07:00
|
|
|
#ifdef CONFIG_NUMA
|
|
|
|
static ssize_t
|
|
|
|
numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
|
|
|
|
{
|
|
|
|
return sprintf (buf, "%d\n", dev->numa_node);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2009-11-24 19:21:21 -07:00
|
|
|
static ssize_t
|
|
|
|
dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
|
|
|
|
return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t
|
|
|
|
consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
|
|
|
|
}
|
|
|
|
|
2006-08-30 23:55:15 -06:00
|
|
|
static ssize_t
|
|
|
|
msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
|
|
|
|
if (!pdev->subordinate)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
return sprintf (buf, "%u\n",
|
|
|
|
!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t
|
|
|
|
msi_bus_store(struct device *dev, struct device_attribute *attr,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
PCI: Make settable sysfs attributes more consistent
PCI devices have three settable boolean attributes, enable,
broken_parity_status, and msi_bus.
The store functions for these would silently interpret "0x01" as false,
"1llogical" as true, and "true" would be (silently!) ignored and do
nothing.
This is inconsistent with typical sysfs handling of settable attributes,
and just plain doesn't make much sense.
So, use strict_strtoul(), which was created for this purpose. The store
functions will treat a value of 0 as false, non-zero as true, and return
-EINVAL for a parse failure.
Additionally, is_enabled_store() and msi_bus_store() return -EPERM if
CAP_SYS_ADMIN is lacking, rather than silently doing nothing. This is more
typical behavior for sysfs attributes that need a capability.
And msi_bus_store() will only print the "forced subordinate bus ..."
warning if the MSI flag was actually forced to a different value.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-11-30 18:10:12 -07:00
|
|
|
unsigned long val;
|
|
|
|
|
|
|
|
if (strict_strtoul(buf, 0, &val) < 0)
|
|
|
|
return -EINVAL;
|
2006-08-30 23:55:15 -06:00
|
|
|
|
|
|
|
/* bad things may happen if the no_msi flag is changed
|
|
|
|
* while some drivers are loaded */
|
|
|
|
if (!capable(CAP_SYS_ADMIN))
|
PCI: Make settable sysfs attributes more consistent
PCI devices have three settable boolean attributes, enable,
broken_parity_status, and msi_bus.
The store functions for these would silently interpret "0x01" as false,
"1llogical" as true, and "true" would be (silently!) ignored and do
nothing.
This is inconsistent with typical sysfs handling of settable attributes,
and just plain doesn't make much sense.
So, use strict_strtoul(), which was created for this purpose. The store
functions will treat a value of 0 as false, non-zero as true, and return
-EINVAL for a parse failure.
Additionally, is_enabled_store() and msi_bus_store() return -EPERM if
CAP_SYS_ADMIN is lacking, rather than silently doing nothing. This is more
typical behavior for sysfs attributes that need a capability.
And msi_bus_store() will only print the "forced subordinate bus ..."
warning if the MSI flag was actually forced to a different value.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-11-30 18:10:12 -07:00
|
|
|
return -EPERM;
|
2006-08-30 23:55:15 -06:00
|
|
|
|
PCI: Make settable sysfs attributes more consistent
PCI devices have three settable boolean attributes, enable,
broken_parity_status, and msi_bus.
The store functions for these would silently interpret "0x01" as false,
"1llogical" as true, and "true" would be (silently!) ignored and do
nothing.
This is inconsistent with typical sysfs handling of settable attributes,
and just plain doesn't make much sense.
So, use strict_strtoul(), which was created for this purpose. The store
functions will treat a value of 0 as false, non-zero as true, and return
-EINVAL for a parse failure.
Additionally, is_enabled_store() and msi_bus_store() return -EPERM if
CAP_SYS_ADMIN is lacking, rather than silently doing nothing. This is more
typical behavior for sysfs attributes that need a capability.
And msi_bus_store() will only print the "forced subordinate bus ..."
warning if the MSI flag was actually forced to a different value.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-11-30 18:10:12 -07:00
|
|
|
/* Maybe pci devices without subordinate busses shouldn't even have this
|
|
|
|
* attribute in the first place? */
|
2006-08-30 23:55:15 -06:00
|
|
|
if (!pdev->subordinate)
|
|
|
|
return count;
|
|
|
|
|
PCI: Make settable sysfs attributes more consistent
PCI devices have three settable boolean attributes, enable,
broken_parity_status, and msi_bus.
The store functions for these would silently interpret "0x01" as false,
"1llogical" as true, and "true" would be (silently!) ignored and do
nothing.
This is inconsistent with typical sysfs handling of settable attributes,
and just plain doesn't make much sense.
So, use strict_strtoul(), which was created for this purpose. The store
functions will treat a value of 0 as false, non-zero as true, and return
-EINVAL for a parse failure.
Additionally, is_enabled_store() and msi_bus_store() return -EPERM if
CAP_SYS_ADMIN is lacking, rather than silently doing nothing. This is more
typical behavior for sysfs attributes that need a capability.
And msi_bus_store() will only print the "forced subordinate bus ..."
warning if the MSI flag was actually forced to a different value.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-11-30 18:10:12 -07:00
|
|
|
/* Is the flag going to change, or keep the value it already had? */
|
|
|
|
if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
|
|
|
|
!!val) {
|
|
|
|
pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
|
2006-08-30 23:55:15 -06:00
|
|
|
|
PCI: Make settable sysfs attributes more consistent
PCI devices have three settable boolean attributes, enable,
broken_parity_status, and msi_bus.
The store functions for these would silently interpret "0x01" as false,
"1llogical" as true, and "true" would be (silently!) ignored and do
nothing.
This is inconsistent with typical sysfs handling of settable attributes,
and just plain doesn't make much sense.
So, use strict_strtoul(), which was created for this purpose. The store
functions will treat a value of 0 as false, non-zero as true, and return
-EINVAL for a parse failure.
Additionally, is_enabled_store() and msi_bus_store() return -EPERM if
CAP_SYS_ADMIN is lacking, rather than silently doing nothing. This is more
typical behavior for sysfs attributes that need a capability.
And msi_bus_store() will only print the "forced subordinate bus ..."
warning if the MSI flag was actually forced to a different value.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-11-30 18:10:12 -07:00
|
|
|
dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
|
|
|
|
" bad things could happen\n", val ? "" : " not");
|
2006-08-30 23:55:15 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
2005-05-05 12:57:25 -06:00
|
|
|
|
2009-03-20 14:56:31 -06:00
|
|
|
#ifdef CONFIG_HOTPLUG
|
|
|
|
static DEFINE_MUTEX(pci_remove_rescan_mutex);
|
|
|
|
static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
|
|
|
|
size_t count)
|
|
|
|
{
|
|
|
|
unsigned long val;
|
|
|
|
struct pci_bus *b = NULL;
|
|
|
|
|
|
|
|
if (strict_strtoul(buf, 0, &val) < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (val) {
|
|
|
|
mutex_lock(&pci_remove_rescan_mutex);
|
|
|
|
while ((b = pci_find_next_bus(b)) != NULL)
|
|
|
|
pci_rescan_bus(b);
|
|
|
|
mutex_unlock(&pci_remove_rescan_mutex);
|
|
|
|
}
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct bus_attribute pci_bus_attrs[] = {
|
|
|
|
__ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
|
|
|
|
__ATTR_NULL
|
|
|
|
};
|
2009-03-20 14:56:36 -06:00
|
|
|
|
2009-03-20 14:56:41 -06:00
|
|
|
static ssize_t
|
|
|
|
dev_rescan_store(struct device *dev, struct device_attribute *attr,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
|
|
|
unsigned long val;
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
|
|
|
|
if (strict_strtoul(buf, 0, &val) < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (val) {
|
|
|
|
mutex_lock(&pci_remove_rescan_mutex);
|
|
|
|
pci_rescan_bus(pdev->bus);
|
|
|
|
mutex_unlock(&pci_remove_rescan_mutex);
|
|
|
|
}
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2009-03-20 14:56:36 -06:00
|
|
|
static void remove_callback(struct device *dev)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
|
|
|
|
mutex_lock(&pci_remove_rescan_mutex);
|
2012-02-25 14:54:20 -07:00
|
|
|
pci_stop_and_remove_bus_device(pdev);
|
2009-03-20 14:56:36 -06:00
|
|
|
mutex_unlock(&pci_remove_rescan_mutex);
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t
|
|
|
|
remove_store(struct device *dev, struct device_attribute *dummy,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
unsigned long val;
|
|
|
|
|
|
|
|
if (strict_strtoul(buf, 0, &val) < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/* An attribute cannot be unregistered by one of its own methods,
|
|
|
|
* so we have to use this roundabout approach.
|
|
|
|
*/
|
|
|
|
if (val)
|
|
|
|
ret = device_schedule_callback(dev, remove_callback);
|
|
|
|
if (ret)
|
|
|
|
count = ret;
|
|
|
|
return count;
|
|
|
|
}
|
2011-05-12 18:11:39 -06:00
|
|
|
|
|
|
|
static ssize_t
|
|
|
|
dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
|
|
|
unsigned long val;
|
|
|
|
struct pci_bus *bus = to_pci_bus(dev);
|
|
|
|
|
|
|
|
if (strict_strtoul(buf, 0, &val) < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (val) {
|
|
|
|
mutex_lock(&pci_remove_rescan_mutex);
|
2012-01-21 03:08:22 -07:00
|
|
|
if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
|
|
|
|
pci_rescan_bus_bridge_resize(bus->self);
|
|
|
|
else
|
|
|
|
pci_rescan_bus(bus);
|
2011-05-12 18:11:39 -06:00
|
|
|
mutex_unlock(&pci_remove_rescan_mutex);
|
|
|
|
}
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2009-03-20 14:56:31 -06:00
|
|
|
#endif
|
|
|
|
|
PCI/PM: add PCIe runtime D3cold support
This patch adds runtime D3cold support and corresponding ACPI platform
support. This patch only enables runtime D3cold support; it does not
enable D3cold support during system suspend/hibernate.
D3cold is the deepest power saving state for a PCIe device, where its main
power is removed. While it is in D3cold, you can't access the device at
all, not even its configuration space (which is still accessible in D3hot).
Therefore the PCI PM registers can not be used to transition into/out of
the D3cold state; that must be done by platform logic such as ACPI _PR3.
To support wakeup from D3cold, a system may provide auxiliary power, which
allows a device to request wakeup using a Beacon or the sideband WAKE#
signal. WAKE# is usually connected to platform logic such as ACPI GPE.
This is quite different from other power saving states, where devices
request wakeup via a PME message on the PCIe link.
Some devices, such as those in plug-in slots, have no direct platform
logic. For example, there is usually no ACPI _PR3 for them. D3cold
support for these devices can be done via the PCIe Downstream Port leading
to the device. When the PCIe port is powered on/off, the device is powered
on/off too. Wakeup events from the device will be notified to the
corresponding PCIe port.
For more information about PCIe D3cold and corresponding ACPI support,
please refer to:
- PCI Express Base Specification Revision 2.0
- Advanced Configuration and Power Interface Specification Revision 5.0
[bhelgaas: changelog]
Reviewed-by: Rafael J. Wysocki <rjw@sisk.pl>
Originally-by: Zheng Yan <zheng.z.yan@intel.com>
Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-22 20:23:51 -06:00
|
|
|
#if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
|
|
|
|
static ssize_t d3cold_allowed_store(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
unsigned long val;
|
|
|
|
|
|
|
|
if (strict_strtoul(buf, 0, &val) < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
pdev->d3cold_allowed = !!val;
|
|
|
|
pm_runtime_resume(dev);
|
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t d3cold_allowed_show(struct device *dev,
|
|
|
|
struct device_attribute *attr, char *buf)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
return sprintf (buf, "%u\n", pdev->d3cold_allowed);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
struct device_attribute pci_dev_attrs[] = {
|
|
|
|
__ATTR_RO(resource),
|
|
|
|
__ATTR_RO(vendor),
|
|
|
|
__ATTR_RO(device),
|
|
|
|
__ATTR_RO(subsystem_vendor),
|
|
|
|
__ATTR_RO(subsystem_device),
|
|
|
|
__ATTR_RO(class),
|
|
|
|
__ATTR_RO(irq),
|
|
|
|
__ATTR_RO(local_cpus),
|
2008-04-08 12:43:03 -06:00
|
|
|
__ATTR_RO(local_cpulist),
|
2005-05-05 12:57:25 -06:00
|
|
|
__ATTR_RO(modalias),
|
2007-01-28 02:53:40 -07:00
|
|
|
#ifdef CONFIG_NUMA
|
|
|
|
__ATTR_RO(numa_node),
|
|
|
|
#endif
|
2009-11-24 19:21:21 -07:00
|
|
|
__ATTR_RO(dma_mask_bits),
|
|
|
|
__ATTR_RO(consistent_dma_mask_bits),
|
2006-04-29 02:59:08 -06:00
|
|
|
__ATTR(enable, 0600, is_enabled_show, is_enabled_store),
|
2006-06-14 17:59:48 -06:00
|
|
|
__ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
|
|
|
|
broken_parity_status_show,broken_parity_status_store),
|
2006-08-30 23:55:15 -06:00
|
|
|
__ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
|
2009-03-20 14:56:36 -06:00
|
|
|
#ifdef CONFIG_HOTPLUG
|
|
|
|
__ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
|
2009-03-20 14:56:41 -06:00
|
|
|
__ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
|
PCI/PM: add PCIe runtime D3cold support
This patch adds runtime D3cold support and corresponding ACPI platform
support. This patch only enables runtime D3cold support; it does not
enable D3cold support during system suspend/hibernate.
D3cold is the deepest power saving state for a PCIe device, where its main
power is removed. While it is in D3cold, you can't access the device at
all, not even its configuration space (which is still accessible in D3hot).
Therefore the PCI PM registers can not be used to transition into/out of
the D3cold state; that must be done by platform logic such as ACPI _PR3.
To support wakeup from D3cold, a system may provide auxiliary power, which
allows a device to request wakeup using a Beacon or the sideband WAKE#
signal. WAKE# is usually connected to platform logic such as ACPI GPE.
This is quite different from other power saving states, where devices
request wakeup via a PME message on the PCIe link.
Some devices, such as those in plug-in slots, have no direct platform
logic. For example, there is usually no ACPI _PR3 for them. D3cold
support for these devices can be done via the PCIe Downstream Port leading
to the device. When the PCIe port is powered on/off, the device is powered
on/off too. Wakeup events from the device will be notified to the
corresponding PCIe port.
For more information about PCIe D3cold and corresponding ACPI support,
please refer to:
- PCI Express Base Specification Revision 2.0
- Advanced Configuration and Power Interface Specification Revision 5.0
[bhelgaas: changelog]
Reviewed-by: Rafael J. Wysocki <rjw@sisk.pl>
Originally-by: Zheng Yan <zheng.z.yan@intel.com>
Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-22 20:23:51 -06:00
|
|
|
#endif
|
|
|
|
#if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
|
|
|
|
__ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store),
|
2009-03-20 14:56:36 -06:00
|
|
|
#endif
|
2005-04-16 16:20:36 -06:00
|
|
|
__ATTR_NULL,
|
|
|
|
};
|
|
|
|
|
2011-05-12 18:11:39 -06:00
|
|
|
struct device_attribute pcibus_dev_attrs[] = {
|
|
|
|
#ifdef CONFIG_HOTPLUG
|
|
|
|
__ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
|
|
|
|
#endif
|
2011-05-12 18:11:40 -06:00
|
|
|
__ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
|
|
|
|
__ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
|
2011-05-12 18:11:39 -06:00
|
|
|
__ATTR_NULL,
|
|
|
|
};
|
|
|
|
|
2009-03-03 22:57:05 -07:00
|
|
|
static ssize_t
|
|
|
|
boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
2012-04-16 14:26:02 -06:00
|
|
|
struct pci_dev *vga_dev = vga_default_device();
|
|
|
|
|
|
|
|
if (vga_dev)
|
|
|
|
return sprintf(buf, "%u\n", (pdev == vga_dev));
|
2009-03-03 22:57:05 -07:00
|
|
|
|
|
|
|
return sprintf(buf, "%u\n",
|
|
|
|
!!(pdev->resource[PCI_ROM_RESOURCE].flags &
|
|
|
|
IORESOURCE_ROM_SHADOW));
|
|
|
|
}
|
|
|
|
struct device_attribute vga_attr = __ATTR_RO(boot_vga);
|
|
|
|
|
2012-08-14 19:43:03 -06:00
|
|
|
static void
|
|
|
|
pci_config_pm_runtime_get(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
struct device *parent = dev->parent;
|
|
|
|
|
|
|
|
if (parent)
|
|
|
|
pm_runtime_get_sync(parent);
|
|
|
|
pm_runtime_get_noresume(dev);
|
|
|
|
/*
|
|
|
|
* pdev->current_state is set to PCI_D3cold during suspending,
|
|
|
|
* so wait until suspending completes
|
|
|
|
*/
|
|
|
|
pm_runtime_barrier(dev);
|
|
|
|
/*
|
|
|
|
* Only need to resume devices in D3cold, because config
|
|
|
|
* registers are still accessible for devices suspended but
|
|
|
|
* not in D3cold.
|
|
|
|
*/
|
|
|
|
if (pdev->current_state == PCI_D3cold)
|
|
|
|
pm_runtime_resume(dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
pci_config_pm_runtime_put(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
struct device *parent = dev->parent;
|
|
|
|
|
|
|
|
pm_runtime_put(dev);
|
|
|
|
if (parent)
|
|
|
|
pm_runtime_put_sync(parent);
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
static ssize_t
|
2010-05-12 19:28:57 -06:00
|
|
|
pci_read_config(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *bin_attr,
|
2007-06-08 23:57:22 -06:00
|
|
|
char *buf, loff_t off, size_t count)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
|
|
|
|
unsigned int size = 64;
|
|
|
|
loff_t init_off = off;
|
2005-04-07 23:53:31 -06:00
|
|
|
u8 *data = (u8*) buf;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* Several chips lock up trying to read undefined config space */
|
2012-01-03 10:25:15 -07:00
|
|
|
if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
|
2005-04-16 16:20:36 -06:00
|
|
|
size = dev->cfg_size;
|
|
|
|
} else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
|
|
|
|
size = 128;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (off > size)
|
|
|
|
return 0;
|
|
|
|
if (off + count > size) {
|
|
|
|
size -= off;
|
|
|
|
count = size;
|
|
|
|
} else {
|
|
|
|
size = count;
|
|
|
|
}
|
|
|
|
|
2012-08-14 19:43:03 -06:00
|
|
|
pci_config_pm_runtime_get(dev);
|
|
|
|
|
2005-04-07 23:53:31 -06:00
|
|
|
if ((off & 1) && size) {
|
|
|
|
u8 val;
|
2005-09-27 02:21:55 -06:00
|
|
|
pci_user_read_config_byte(dev, off, &val);
|
2005-04-07 23:53:31 -06:00
|
|
|
data[off - init_off] = val;
|
2005-04-16 16:20:36 -06:00
|
|
|
off++;
|
2005-04-07 23:53:31 -06:00
|
|
|
size--;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((off & 3) && size > 2) {
|
|
|
|
u16 val;
|
2005-09-27 02:21:55 -06:00
|
|
|
pci_user_read_config_word(dev, off, &val);
|
2005-04-07 23:53:31 -06:00
|
|
|
data[off - init_off] = val & 0xff;
|
|
|
|
data[off - init_off + 1] = (val >> 8) & 0xff;
|
|
|
|
off += 2;
|
|
|
|
size -= 2;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
while (size > 3) {
|
2005-04-07 23:53:31 -06:00
|
|
|
u32 val;
|
2005-09-27 02:21:55 -06:00
|
|
|
pci_user_read_config_dword(dev, off, &val);
|
2005-04-07 23:53:31 -06:00
|
|
|
data[off - init_off] = val & 0xff;
|
|
|
|
data[off - init_off + 1] = (val >> 8) & 0xff;
|
|
|
|
data[off - init_off + 2] = (val >> 16) & 0xff;
|
|
|
|
data[off - init_off + 3] = (val >> 24) & 0xff;
|
2005-04-16 16:20:36 -06:00
|
|
|
off += 4;
|
|
|
|
size -= 4;
|
|
|
|
}
|
|
|
|
|
2005-04-07 23:53:31 -06:00
|
|
|
if (size >= 2) {
|
|
|
|
u16 val;
|
2005-09-27 02:21:55 -06:00
|
|
|
pci_user_read_config_word(dev, off, &val);
|
2005-04-07 23:53:31 -06:00
|
|
|
data[off - init_off] = val & 0xff;
|
|
|
|
data[off - init_off + 1] = (val >> 8) & 0xff;
|
|
|
|
off += 2;
|
|
|
|
size -= 2;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (size > 0) {
|
|
|
|
u8 val;
|
2005-09-27 02:21:55 -06:00
|
|
|
pci_user_read_config_byte(dev, off, &val);
|
2005-04-07 23:53:31 -06:00
|
|
|
data[off - init_off] = val;
|
2005-04-16 16:20:36 -06:00
|
|
|
off++;
|
|
|
|
--size;
|
|
|
|
}
|
|
|
|
|
2012-08-14 19:43:03 -06:00
|
|
|
pci_config_pm_runtime_put(dev);
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t
|
2010-05-12 19:28:57 -06:00
|
|
|
pci_write_config(struct file* filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *bin_attr,
|
2007-06-08 23:57:22 -06:00
|
|
|
char *buf, loff_t off, size_t count)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
|
|
|
|
unsigned int size = count;
|
|
|
|
loff_t init_off = off;
|
2005-04-07 23:53:31 -06:00
|
|
|
u8 *data = (u8*) buf;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if (off > dev->cfg_size)
|
|
|
|
return 0;
|
|
|
|
if (off + count > dev->cfg_size) {
|
|
|
|
size = dev->cfg_size - off;
|
|
|
|
count = size;
|
|
|
|
}
|
2005-04-07 23:53:31 -06:00
|
|
|
|
2012-08-14 19:43:03 -06:00
|
|
|
pci_config_pm_runtime_get(dev);
|
|
|
|
|
2005-04-07 23:53:31 -06:00
|
|
|
if ((off & 1) && size) {
|
2005-09-27 02:21:55 -06:00
|
|
|
pci_user_write_config_byte(dev, off, data[off - init_off]);
|
2005-04-16 16:20:36 -06:00
|
|
|
off++;
|
2005-04-07 23:53:31 -06:00
|
|
|
size--;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2005-04-07 23:53:31 -06:00
|
|
|
|
|
|
|
if ((off & 3) && size > 2) {
|
|
|
|
u16 val = data[off - init_off];
|
|
|
|
val |= (u16) data[off - init_off + 1] << 8;
|
2005-09-27 02:21:55 -06:00
|
|
|
pci_user_write_config_word(dev, off, val);
|
2005-04-07 23:53:31 -06:00
|
|
|
off += 2;
|
|
|
|
size -= 2;
|
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
while (size > 3) {
|
2005-04-07 23:53:31 -06:00
|
|
|
u32 val = data[off - init_off];
|
|
|
|
val |= (u32) data[off - init_off + 1] << 8;
|
|
|
|
val |= (u32) data[off - init_off + 2] << 16;
|
|
|
|
val |= (u32) data[off - init_off + 3] << 24;
|
2005-09-27 02:21:55 -06:00
|
|
|
pci_user_write_config_dword(dev, off, val);
|
2005-04-16 16:20:36 -06:00
|
|
|
off += 4;
|
|
|
|
size -= 4;
|
|
|
|
}
|
2005-04-07 23:53:31 -06:00
|
|
|
|
|
|
|
if (size >= 2) {
|
|
|
|
u16 val = data[off - init_off];
|
|
|
|
val |= (u16) data[off - init_off + 1] << 8;
|
2005-09-27 02:21:55 -06:00
|
|
|
pci_user_write_config_word(dev, off, val);
|
2005-04-07 23:53:31 -06:00
|
|
|
off += 2;
|
|
|
|
size -= 2;
|
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-04-07 23:53:31 -06:00
|
|
|
if (size) {
|
2005-09-27 02:21:55 -06:00
|
|
|
pci_user_write_config_byte(dev, off, data[off - init_off]);
|
2005-04-16 16:20:36 -06:00
|
|
|
off++;
|
|
|
|
--size;
|
|
|
|
}
|
|
|
|
|
2012-08-14 19:43:03 -06:00
|
|
|
pci_config_pm_runtime_put(dev);
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2008-03-05 09:52:39 -07:00
|
|
|
static ssize_t
|
2010-05-12 19:28:57 -06:00
|
|
|
read_vpd_attr(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *bin_attr,
|
2008-12-18 10:17:16 -07:00
|
|
|
char *buf, loff_t off, size_t count)
|
2008-03-05 09:52:39 -07:00
|
|
|
{
|
|
|
|
struct pci_dev *dev =
|
|
|
|
to_pci_dev(container_of(kobj, struct device, kobj));
|
|
|
|
|
|
|
|
if (off > bin_attr->size)
|
|
|
|
count = 0;
|
|
|
|
else if (count > bin_attr->size - off)
|
|
|
|
count = bin_attr->size - off;
|
|
|
|
|
2008-12-18 10:17:16 -07:00
|
|
|
return pci_read_vpd(dev, off, count, buf);
|
2008-03-05 09:52:39 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t
|
2010-05-12 19:28:57 -06:00
|
|
|
write_vpd_attr(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *bin_attr,
|
2008-12-18 10:17:16 -07:00
|
|
|
char *buf, loff_t off, size_t count)
|
2008-03-05 09:52:39 -07:00
|
|
|
{
|
|
|
|
struct pci_dev *dev =
|
|
|
|
to_pci_dev(container_of(kobj, struct device, kobj));
|
|
|
|
|
|
|
|
if (off > bin_attr->size)
|
|
|
|
count = 0;
|
|
|
|
else if (count > bin_attr->size - off)
|
|
|
|
count = bin_attr->size - off;
|
|
|
|
|
2008-12-18 10:17:16 -07:00
|
|
|
return pci_write_vpd(dev, off, count, buf);
|
2008-03-05 09:52:39 -07:00
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
#ifdef HAVE_PCI_LEGACY
|
|
|
|
/**
|
|
|
|
* pci_read_legacy_io - read byte(s) from legacy I/O port space
|
2010-05-12 19:28:57 -06:00
|
|
|
* @filp: open sysfs file
|
2005-04-16 16:20:36 -06:00
|
|
|
* @kobj: kobject corresponding to file to read from
|
2009-04-10 16:17:50 -06:00
|
|
|
* @bin_attr: struct bin_attribute for this file
|
2005-04-16 16:20:36 -06:00
|
|
|
* @buf: buffer to store results
|
|
|
|
* @off: offset into legacy I/O port space
|
|
|
|
* @count: number of bytes to read
|
|
|
|
*
|
|
|
|
* Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
|
|
|
|
* callback routine (pci_legacy_read).
|
|
|
|
*/
|
2008-10-03 03:49:32 -06:00
|
|
|
static ssize_t
|
2010-05-12 19:28:57 -06:00
|
|
|
pci_read_legacy_io(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *bin_attr,
|
2007-06-08 23:57:22 -06:00
|
|
|
char *buf, loff_t off, size_t count)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
struct pci_bus *bus = to_pci_bus(container_of(kobj,
|
2007-05-22 20:47:54 -06:00
|
|
|
struct device,
|
2005-04-16 16:20:36 -06:00
|
|
|
kobj));
|
|
|
|
|
|
|
|
/* Only support 1, 2 or 4 byte accesses */
|
|
|
|
if (count != 1 && count != 2 && count != 4)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return pci_legacy_read(bus, off, (u32 *)buf, count);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pci_write_legacy_io - write byte(s) to legacy I/O port space
|
2010-05-12 19:28:57 -06:00
|
|
|
* @filp: open sysfs file
|
2005-04-16 16:20:36 -06:00
|
|
|
* @kobj: kobject corresponding to file to read from
|
2009-04-10 16:17:50 -06:00
|
|
|
* @bin_attr: struct bin_attribute for this file
|
2005-04-16 16:20:36 -06:00
|
|
|
* @buf: buffer containing value to be written
|
|
|
|
* @off: offset into legacy I/O port space
|
|
|
|
* @count: number of bytes to write
|
|
|
|
*
|
|
|
|
* Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
|
|
|
|
* callback routine (pci_legacy_write).
|
|
|
|
*/
|
2008-10-03 03:49:32 -06:00
|
|
|
static ssize_t
|
2010-05-12 19:28:57 -06:00
|
|
|
pci_write_legacy_io(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *bin_attr,
|
2007-06-08 23:57:22 -06:00
|
|
|
char *buf, loff_t off, size_t count)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
struct pci_bus *bus = to_pci_bus(container_of(kobj,
|
2007-05-22 20:47:54 -06:00
|
|
|
struct device,
|
2005-04-16 16:20:36 -06:00
|
|
|
kobj));
|
|
|
|
/* Only support 1, 2 or 4 byte accesses */
|
|
|
|
if (count != 1 && count != 2 && count != 4)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return pci_legacy_write(bus, off, *(u32 *)buf, count);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pci_mmap_legacy_mem - map legacy PCI memory into user memory space
|
2010-05-12 19:28:57 -06:00
|
|
|
* @filp: open sysfs file
|
2005-04-16 16:20:36 -06:00
|
|
|
* @kobj: kobject corresponding to device to be mapped
|
|
|
|
* @attr: struct bin_attribute for this file
|
|
|
|
* @vma: struct vm_area_struct passed to mmap
|
|
|
|
*
|
2008-10-03 03:49:32 -06:00
|
|
|
* Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
|
2005-04-16 16:20:36 -06:00
|
|
|
* legacy memory space (first meg of bus space) into application virtual
|
|
|
|
* memory space.
|
|
|
|
*/
|
2008-10-03 03:49:32 -06:00
|
|
|
static int
|
2010-05-12 19:28:57 -06:00
|
|
|
pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *attr,
|
2005-04-16 16:20:36 -06:00
|
|
|
struct vm_area_struct *vma)
|
|
|
|
{
|
|
|
|
struct pci_bus *bus = to_pci_bus(container_of(kobj,
|
2007-05-22 20:47:54 -06:00
|
|
|
struct device,
|
2005-04-16 16:20:36 -06:00
|
|
|
kobj));
|
|
|
|
|
2008-10-03 03:49:32 -06:00
|
|
|
return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pci_mmap_legacy_io - map legacy PCI IO into user memory space
|
2010-05-12 19:28:57 -06:00
|
|
|
* @filp: open sysfs file
|
2008-10-03 03:49:32 -06:00
|
|
|
* @kobj: kobject corresponding to device to be mapped
|
|
|
|
* @attr: struct bin_attribute for this file
|
|
|
|
* @vma: struct vm_area_struct passed to mmap
|
|
|
|
*
|
|
|
|
* Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
|
|
|
|
* legacy IO space (first meg of bus space) into application virtual
|
|
|
|
* memory space. Returns -ENOSYS if the operation isn't supported
|
|
|
|
*/
|
|
|
|
static int
|
2010-05-12 19:28:57 -06:00
|
|
|
pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *attr,
|
2008-10-03 03:49:32 -06:00
|
|
|
struct vm_area_struct *vma)
|
|
|
|
{
|
|
|
|
struct pci_bus *bus = to_pci_bus(container_of(kobj,
|
|
|
|
struct device,
|
|
|
|
kobj));
|
|
|
|
|
|
|
|
return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
|
|
|
|
}
|
|
|
|
|
2009-02-17 03:46:53 -07:00
|
|
|
/**
|
|
|
|
* pci_adjust_legacy_attr - adjustment of legacy file attributes
|
|
|
|
* @b: bus to create files under
|
|
|
|
* @mmap_type: I/O port or memory
|
|
|
|
*
|
|
|
|
* Stub implementation. Can be overridden by arch if necessary.
|
|
|
|
*/
|
|
|
|
void __weak
|
|
|
|
pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
|
|
|
|
{
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2008-10-03 03:49:32 -06:00
|
|
|
/**
|
|
|
|
* pci_create_legacy_files - create legacy I/O port and memory files
|
|
|
|
* @b: bus to create files under
|
|
|
|
*
|
|
|
|
* Some platforms allow access to legacy I/O port and ISA memory space on
|
|
|
|
* a per-bus basis. This routine creates the files and ties them into
|
|
|
|
* their associated read, write and mmap files from pci-sysfs.c
|
|
|
|
*
|
2011-03-30 19:57:33 -06:00
|
|
|
* On error unwind, but don't propagate the error to the caller
|
2008-10-03 03:49:32 -06:00
|
|
|
* as it is ok to set up the PCI bus without these files.
|
|
|
|
*/
|
|
|
|
void pci_create_legacy_files(struct pci_bus *b)
|
|
|
|
{
|
|
|
|
int error;
|
|
|
|
|
|
|
|
b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
|
|
|
|
GFP_ATOMIC);
|
|
|
|
if (!b->legacy_io)
|
|
|
|
goto kzalloc_err;
|
|
|
|
|
2010-03-01 02:38:36 -07:00
|
|
|
sysfs_bin_attr_init(b->legacy_io);
|
2008-10-03 03:49:32 -06:00
|
|
|
b->legacy_io->attr.name = "legacy_io";
|
|
|
|
b->legacy_io->size = 0xffff;
|
|
|
|
b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
|
|
|
|
b->legacy_io->read = pci_read_legacy_io;
|
|
|
|
b->legacy_io->write = pci_write_legacy_io;
|
|
|
|
b->legacy_io->mmap = pci_mmap_legacy_io;
|
2009-02-17 03:46:53 -07:00
|
|
|
pci_adjust_legacy_attr(b, pci_mmap_io);
|
2008-10-03 03:49:32 -06:00
|
|
|
error = device_create_bin_file(&b->dev, b->legacy_io);
|
|
|
|
if (error)
|
|
|
|
goto legacy_io_err;
|
|
|
|
|
|
|
|
/* Allocated above after the legacy_io struct */
|
|
|
|
b->legacy_mem = b->legacy_io + 1;
|
2010-03-10 15:48:34 -07:00
|
|
|
sysfs_bin_attr_init(b->legacy_mem);
|
2008-10-03 03:49:32 -06:00
|
|
|
b->legacy_mem->attr.name = "legacy_mem";
|
|
|
|
b->legacy_mem->size = 1024*1024;
|
|
|
|
b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
|
|
|
|
b->legacy_mem->mmap = pci_mmap_legacy_mem;
|
2009-02-17 03:46:53 -07:00
|
|
|
pci_adjust_legacy_attr(b, pci_mmap_mem);
|
2008-10-03 03:49:32 -06:00
|
|
|
error = device_create_bin_file(&b->dev, b->legacy_mem);
|
|
|
|
if (error)
|
|
|
|
goto legacy_mem_err;
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
legacy_mem_err:
|
|
|
|
device_remove_bin_file(&b->dev, b->legacy_io);
|
|
|
|
legacy_io_err:
|
|
|
|
kfree(b->legacy_io);
|
|
|
|
b->legacy_io = NULL;
|
|
|
|
kzalloc_err:
|
|
|
|
printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
|
|
|
|
"and ISA memory resources to sysfs\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
void pci_remove_legacy_files(struct pci_bus *b)
|
|
|
|
{
|
|
|
|
if (b->legacy_io) {
|
|
|
|
device_remove_bin_file(&b->dev, b->legacy_io);
|
|
|
|
device_remove_bin_file(&b->dev, b->legacy_mem);
|
|
|
|
kfree(b->legacy_io); /* both are allocated here */
|
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
#endif /* HAVE_PCI_LEGACY */
|
|
|
|
|
|
|
|
#ifdef HAVE_PCI_MMAP
|
2008-10-02 19:52:51 -06:00
|
|
|
|
2010-11-10 03:03:21 -07:00
|
|
|
int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
|
|
|
|
enum pci_mmap_api mmap_api)
|
2008-10-02 19:52:51 -06:00
|
|
|
{
|
2010-11-10 03:03:21 -07:00
|
|
|
unsigned long nr, start, size, pci_start;
|
2008-10-02 19:52:51 -06:00
|
|
|
|
2010-11-10 03:03:21 -07:00
|
|
|
if (pci_resource_len(pdev, resno) == 0)
|
|
|
|
return 0;
|
2008-10-02 19:52:51 -06:00
|
|
|
nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
|
|
|
|
start = vma->vm_pgoff;
|
2008-11-03 15:41:16 -07:00
|
|
|
size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
|
PCI: fix offset check for sysfs mmapped files
I just loaded 2.6.37-rc2 on my machines, and I noticed that X no longer starts.
Running an strace of the X server shows that it's doing this:
open("/sys/bus/pci/devices/0000:07:00.0/resource0", O_RDWR) = 10
mmap(NULL, 16777216, PROT_READ|PROT_WRITE, MAP_SHARED, 10, 0) = -1 EINVAL (Invalid argument)
This code seems to be asking for a shared read/write mapping of 16MB worth of
BAR0 starting at file offset 0, and letting the kernel assign a starting
address. Unfortunately, this -EINVAL causes X not to start. Looking into
dmesg, there's a complaint like so:
process "Xorg" tried to map 0x01000000 bytes at page 0x00000000 on 0000:07:00.0 BAR 0 (start 0x 96000000, size 0x 1000000)
...with the following code in pci_mmap_fits:
pci_start = (mmap_api == PCI_MMAP_SYSFS) ?
pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
if (start >= pci_start && start < pci_start + size &&
start + nr <= pci_start + size)
It looks like the logic here is set up such that when the mmap call comes via
sysfs, the check in pci_mmap_fits wants vma->vm_pgoff to be between the
resource's start and end address, and the end of the vma to be no farther than
the end. However, the sysfs PCI resource files always start at offset zero,
which means that this test always fails for programs that mmap the sysfs files.
Given the comment in the original commit
3b519e4ea618b6943a82931630872907f9ac2c2b, I _think_ the old procfs files
require that the file offset be equal to the resource's base address when
mmapping.
I think what we want here is for pci_start to be 0 when mmap_api ==
PCI_MMAP_PROCFS. The following patch makes that change, after which the Matrox
and Mach64 X drivers work again.
Acked-by: Martin Wilck <martin.wilck@ts.fujitsu.com>
Signed-off-by: Darrick J. Wong <djwong@us.ibm.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-11-16 10:13:41 -07:00
|
|
|
pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
|
2010-11-10 03:03:21 -07:00
|
|
|
pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
|
|
|
|
if (start >= pci_start && start < pci_start + size &&
|
|
|
|
start + nr <= pci_start + size)
|
2008-10-02 19:52:51 -06:00
|
|
|
return 1;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/**
|
|
|
|
* pci_mmap_resource - map a PCI resource into user memory space
|
|
|
|
* @kobj: kobject for mapping
|
|
|
|
* @attr: struct bin_attribute for the file being mapped
|
|
|
|
* @vma: struct vm_area_struct passed into the mmap
|
2008-03-18 18:00:22 -06:00
|
|
|
* @write_combine: 1 for write_combine mapping
|
2005-04-16 16:20:36 -06:00
|
|
|
*
|
|
|
|
* Use the regular PCI mapping routines to map a PCI resource into userspace.
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
|
2008-03-18 18:00:22 -06:00
|
|
|
struct vm_area_struct *vma, int write_combine)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(container_of(kobj,
|
|
|
|
struct device, kobj));
|
2010-06-29 04:15:28 -06:00
|
|
|
struct resource *res = attr->private;
|
2005-04-16 16:20:36 -06:00
|
|
|
enum pci_mmap_state mmap_type;
|
2006-06-12 18:06:02 -06:00
|
|
|
resource_size_t start, end;
|
2005-05-13 01:44:10 -06:00
|
|
|
int i;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-05-13 01:44:10 -06:00
|
|
|
for (i = 0; i < PCI_ROM_RESOURCE; i++)
|
|
|
|
if (res == &pdev->resource[i])
|
|
|
|
break;
|
|
|
|
if (i >= PCI_ROM_RESOURCE)
|
|
|
|
return -ENODEV;
|
|
|
|
|
2010-11-10 03:03:21 -07:00
|
|
|
if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
|
|
|
|
WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
|
|
|
|
"at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
|
|
|
|
current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
|
|
|
|
pci_name(pdev), i,
|
2010-11-13 09:44:33 -07:00
|
|
|
(u64)pci_resource_start(pdev, i),
|
|
|
|
(u64)pci_resource_len(pdev, i));
|
2008-10-02 19:52:51 -06:00
|
|
|
return -EINVAL;
|
2010-11-10 03:03:21 -07:00
|
|
|
}
|
2008-10-02 19:52:51 -06:00
|
|
|
|
2005-05-13 01:44:10 -06:00
|
|
|
/* pci_mmap_page_range() expects the same kind of entry as coming
|
|
|
|
* from /proc/bus/pci/ which is a "user visible" value. If this is
|
|
|
|
* different from the resource itself, arch will do necessary fixup.
|
|
|
|
*/
|
|
|
|
pci_resource_to_user(pdev, i, res, &start, &end);
|
|
|
|
vma->vm_pgoff += start >> PAGE_SHIFT;
|
2005-04-16 16:20:36 -06:00
|
|
|
mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
|
|
|
|
|
2008-10-22 20:55:31 -06:00
|
|
|
if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
|
|
|
|
return -EINVAL;
|
|
|
|
|
2008-03-18 18:00:22 -06:00
|
|
|
return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
2010-05-12 19:28:57 -06:00
|
|
|
pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *attr,
|
2008-03-18 18:00:22 -06:00
|
|
|
struct vm_area_struct *vma)
|
|
|
|
{
|
|
|
|
return pci_mmap_resource(kobj, attr, vma, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
2010-05-12 19:28:57 -06:00
|
|
|
pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *attr,
|
2008-03-18 18:00:22 -06:00
|
|
|
struct vm_area_struct *vma)
|
|
|
|
{
|
|
|
|
return pci_mmap_resource(kobj, attr, vma, 1);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2010-07-19 09:45:34 -06:00
|
|
|
static ssize_t
|
|
|
|
pci_resource_io(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *attr, char *buf,
|
|
|
|
loff_t off, size_t count, bool write)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(container_of(kobj,
|
|
|
|
struct device, kobj));
|
|
|
|
struct resource *res = attr->private;
|
|
|
|
unsigned long port = off;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < PCI_ROM_RESOURCE; i++)
|
|
|
|
if (res == &pdev->resource[i])
|
|
|
|
break;
|
|
|
|
if (i >= PCI_ROM_RESOURCE)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
port += pci_resource_start(pdev, i);
|
|
|
|
|
|
|
|
if (port > pci_resource_end(pdev, i))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (port + count - 1 > pci_resource_end(pdev, i))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
switch (count) {
|
|
|
|
case 1:
|
|
|
|
if (write)
|
|
|
|
outb(*(u8 *)buf, port);
|
|
|
|
else
|
|
|
|
*(u8 *)buf = inb(port);
|
|
|
|
return 1;
|
|
|
|
case 2:
|
|
|
|
if (write)
|
|
|
|
outw(*(u16 *)buf, port);
|
|
|
|
else
|
|
|
|
*(u16 *)buf = inw(port);
|
|
|
|
return 2;
|
|
|
|
case 4:
|
|
|
|
if (write)
|
|
|
|
outl(*(u32 *)buf, port);
|
|
|
|
else
|
|
|
|
*(u32 *)buf = inl(port);
|
|
|
|
return 4;
|
|
|
|
}
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t
|
|
|
|
pci_read_resource_io(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *attr, char *buf,
|
|
|
|
loff_t off, size_t count)
|
|
|
|
{
|
|
|
|
return pci_resource_io(filp, kobj, attr, buf, off, count, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t
|
|
|
|
pci_write_resource_io(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *attr, char *buf,
|
|
|
|
loff_t off, size_t count)
|
|
|
|
{
|
|
|
|
return pci_resource_io(filp, kobj, attr, buf, off, count, true);
|
|
|
|
}
|
|
|
|
|
2006-08-28 12:43:25 -06:00
|
|
|
/**
|
|
|
|
* pci_remove_resource_files - cleanup resource files
|
2009-04-10 16:17:50 -06:00
|
|
|
* @pdev: dev to cleanup
|
2006-08-28 12:43:25 -06:00
|
|
|
*
|
2009-04-10 16:17:50 -06:00
|
|
|
* If we created resource files for @pdev, remove them from sysfs and
|
2006-08-28 12:43:25 -06:00
|
|
|
* free their resources.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
pci_remove_resource_files(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < PCI_ROM_RESOURCE; i++) {
|
|
|
|
struct bin_attribute *res_attr;
|
|
|
|
|
|
|
|
res_attr = pdev->res_attr[i];
|
|
|
|
if (res_attr) {
|
|
|
|
sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
|
|
|
|
kfree(res_attr);
|
|
|
|
}
|
2008-03-18 18:00:22 -06:00
|
|
|
|
|
|
|
res_attr = pdev->res_attr_wc[i];
|
|
|
|
if (res_attr) {
|
|
|
|
sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
|
|
|
|
kfree(res_attr);
|
|
|
|
}
|
2006-08-28 12:43:25 -06:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-03-18 18:00:22 -06:00
|
|
|
static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
|
|
|
|
{
|
|
|
|
/* allocate attribute structure, piggyback attribute name */
|
|
|
|
int name_len = write_combine ? 13 : 10;
|
|
|
|
struct bin_attribute *res_attr;
|
|
|
|
int retval;
|
|
|
|
|
|
|
|
res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
|
|
|
|
if (res_attr) {
|
|
|
|
char *res_attr_name = (char *)(res_attr + 1);
|
|
|
|
|
2010-02-11 16:23:05 -07:00
|
|
|
sysfs_bin_attr_init(res_attr);
|
2008-03-18 18:00:22 -06:00
|
|
|
if (write_combine) {
|
|
|
|
pdev->res_attr_wc[num] = res_attr;
|
|
|
|
sprintf(res_attr_name, "resource%d_wc", num);
|
|
|
|
res_attr->mmap = pci_mmap_resource_wc;
|
|
|
|
} else {
|
|
|
|
pdev->res_attr[num] = res_attr;
|
|
|
|
sprintf(res_attr_name, "resource%d", num);
|
|
|
|
res_attr->mmap = pci_mmap_resource_uc;
|
|
|
|
}
|
2010-07-19 09:45:34 -06:00
|
|
|
if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
|
|
|
|
res_attr->read = pci_read_resource_io;
|
|
|
|
res_attr->write = pci_write_resource_io;
|
|
|
|
}
|
2008-03-18 18:00:22 -06:00
|
|
|
res_attr->attr.name = res_attr_name;
|
|
|
|
res_attr->attr.mode = S_IRUSR | S_IWUSR;
|
|
|
|
res_attr->size = pci_resource_len(pdev, num);
|
|
|
|
res_attr->private = &pdev->resource[num];
|
|
|
|
retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
|
|
|
|
} else
|
|
|
|
retval = -ENOMEM;
|
|
|
|
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/**
|
|
|
|
* pci_create_resource_files - create resource files in sysfs for @dev
|
2009-04-10 16:17:50 -06:00
|
|
|
* @pdev: dev in question
|
2005-04-16 16:20:36 -06:00
|
|
|
*
|
2009-04-10 16:17:50 -06:00
|
|
|
* Walk the resources in @pdev creating files for each resource available.
|
2005-04-16 16:20:36 -06:00
|
|
|
*/
|
2006-08-28 12:43:25 -06:00
|
|
|
static int pci_create_resource_files(struct pci_dev *pdev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
int i;
|
2006-08-28 12:43:25 -06:00
|
|
|
int retval;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* Expose the PCI resources from this device as files */
|
|
|
|
for (i = 0; i < PCI_ROM_RESOURCE; i++) {
|
|
|
|
|
|
|
|
/* skip empty resources */
|
|
|
|
if (!pci_resource_len(pdev, i))
|
|
|
|
continue;
|
|
|
|
|
2008-03-18 18:00:22 -06:00
|
|
|
retval = pci_create_attr(pdev, i, 0);
|
|
|
|
/* for prefetchable resources, create a WC mappable file */
|
|
|
|
if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
|
|
|
|
retval = pci_create_attr(pdev, i, 1);
|
|
|
|
|
|
|
|
if (retval) {
|
|
|
|
pci_remove_resource_files(pdev);
|
|
|
|
return retval;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
}
|
2006-08-28 12:43:25 -06:00
|
|
|
return 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
#else /* !HAVE_PCI_MMAP */
|
2009-02-17 03:46:53 -07:00
|
|
|
int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
|
|
|
|
void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
|
2005-04-16 16:20:36 -06:00
|
|
|
#endif /* HAVE_PCI_MMAP */
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pci_write_rom - used to enable access to the PCI ROM display
|
2010-05-12 19:28:57 -06:00
|
|
|
* @filp: sysfs file
|
2005-04-16 16:20:36 -06:00
|
|
|
* @kobj: kernel object handle
|
2009-04-10 16:17:50 -06:00
|
|
|
* @bin_attr: struct bin_attribute for this file
|
2005-04-16 16:20:36 -06:00
|
|
|
* @buf: user input
|
|
|
|
* @off: file offset
|
|
|
|
* @count: number of byte in input
|
|
|
|
*
|
|
|
|
* writing anything except 0 enables it
|
|
|
|
*/
|
|
|
|
static ssize_t
|
2010-05-12 19:28:57 -06:00
|
|
|
pci_write_rom(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *bin_attr,
|
2007-06-08 23:57:22 -06:00
|
|
|
char *buf, loff_t off, size_t count)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
|
|
|
|
|
|
|
|
if ((off == 0) && (*buf == '0') && (count == 2))
|
|
|
|
pdev->rom_attr_enabled = 0;
|
|
|
|
else
|
|
|
|
pdev->rom_attr_enabled = 1;
|
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pci_read_rom - read a PCI ROM
|
2010-05-12 19:28:57 -06:00
|
|
|
* @filp: sysfs file
|
2005-04-16 16:20:36 -06:00
|
|
|
* @kobj: kernel object handle
|
2009-04-10 16:17:50 -06:00
|
|
|
* @bin_attr: struct bin_attribute for this file
|
2005-04-16 16:20:36 -06:00
|
|
|
* @buf: where to put the data we read from the ROM
|
|
|
|
* @off: file offset
|
|
|
|
* @count: number of bytes to read
|
|
|
|
*
|
|
|
|
* Put @count bytes starting at @off into @buf from the ROM in the PCI
|
|
|
|
* device corresponding to @kobj.
|
|
|
|
*/
|
|
|
|
static ssize_t
|
2010-05-12 19:28:57 -06:00
|
|
|
pci_read_rom(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *bin_attr,
|
2007-06-08 23:57:22 -06:00
|
|
|
char *buf, loff_t off, size_t count)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
|
|
|
|
void __iomem *rom;
|
|
|
|
size_t size;
|
|
|
|
|
|
|
|
if (!pdev->rom_attr_enabled)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
|
2009-01-29 12:12:47 -07:00
|
|
|
if (!rom || !size)
|
|
|
|
return -EIO;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if (off >= size)
|
|
|
|
count = 0;
|
|
|
|
else {
|
|
|
|
if (off + count > size)
|
|
|
|
count = size - off;
|
|
|
|
|
|
|
|
memcpy_fromio(buf, rom + off, count);
|
|
|
|
}
|
|
|
|
pci_unmap_rom(pdev, rom);
|
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct bin_attribute pci_config_attr = {
|
|
|
|
.attr = {
|
|
|
|
.name = "config",
|
|
|
|
.mode = S_IRUGO | S_IWUSR,
|
|
|
|
},
|
2008-10-13 05:18:07 -06:00
|
|
|
.size = PCI_CFG_SPACE_SIZE,
|
2005-04-16 16:20:36 -06:00
|
|
|
.read = pci_read_config,
|
|
|
|
.write = pci_write_config,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct bin_attribute pcie_config_attr = {
|
|
|
|
.attr = {
|
|
|
|
.name = "config",
|
|
|
|
.mode = S_IRUGO | S_IWUSR,
|
|
|
|
},
|
2008-10-13 05:18:07 -06:00
|
|
|
.size = PCI_CFG_SPACE_EXP_SIZE,
|
2005-04-16 16:20:36 -06:00
|
|
|
.read = pci_read_config,
|
|
|
|
.write = pci_write_config,
|
|
|
|
};
|
|
|
|
|
2012-06-19 06:54:49 -06:00
|
|
|
int __weak pcibios_add_platform_entries(struct pci_dev *dev)
|
2007-05-07 20:03:07 -06:00
|
|
|
{
|
2007-05-07 20:03:08 -06:00
|
|
|
return 0;
|
2007-05-07 20:03:07 -06:00
|
|
|
}
|
|
|
|
|
2009-07-27 14:37:48 -06:00
|
|
|
static ssize_t reset_store(struct device *dev,
|
|
|
|
struct device_attribute *attr, const char *buf,
|
|
|
|
size_t count)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
unsigned long val;
|
|
|
|
ssize_t result = strict_strtoul(buf, 0, &val);
|
|
|
|
|
|
|
|
if (result < 0)
|
|
|
|
return result;
|
|
|
|
|
|
|
|
if (val != 1)
|
|
|
|
return -EINVAL;
|
2010-05-11 03:44:54 -06:00
|
|
|
|
|
|
|
result = pci_reset_function(pdev);
|
|
|
|
if (result < 0)
|
|
|
|
return result;
|
|
|
|
|
|
|
|
return count;
|
2009-07-27 14:37:48 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
|
|
|
|
|
2008-10-13 06:01:00 -06:00
|
|
|
static int pci_create_capabilities_sysfs(struct pci_dev *dev)
|
|
|
|
{
|
|
|
|
int retval;
|
|
|
|
struct bin_attribute *attr;
|
|
|
|
|
|
|
|
/* If the device has VPD, try to expose it in sysfs. */
|
|
|
|
if (dev->vpd) {
|
|
|
|
attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
|
|
|
|
if (!attr)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2010-02-11 16:23:05 -07:00
|
|
|
sysfs_bin_attr_init(attr);
|
2008-10-13 06:01:00 -06:00
|
|
|
attr->size = dev->vpd->len;
|
|
|
|
attr->attr.name = "vpd";
|
|
|
|
attr->attr.mode = S_IRUSR | S_IWUSR;
|
2008-12-18 10:17:16 -07:00
|
|
|
attr->read = read_vpd_attr;
|
|
|
|
attr->write = write_vpd_attr;
|
2008-10-13 06:01:00 -06:00
|
|
|
retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
|
|
|
|
if (retval) {
|
2011-01-13 12:47:56 -07:00
|
|
|
kfree(attr);
|
2008-10-13 06:01:00 -06:00
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
dev->vpd->attr = attr;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Active State Power Management */
|
|
|
|
pcie_aspm_create_sysfs_dev_files(dev);
|
|
|
|
|
2009-07-27 14:37:48 -06:00
|
|
|
if (!pci_probe_reset_function(dev)) {
|
|
|
|
retval = device_create_file(&dev->dev, &reset_attr);
|
|
|
|
if (retval)
|
|
|
|
goto error;
|
|
|
|
dev->reset_fn = 1;
|
|
|
|
}
|
2008-10-13 06:01:00 -06:00
|
|
|
return 0;
|
2009-07-27 14:37:48 -06:00
|
|
|
|
|
|
|
error:
|
|
|
|
pcie_aspm_remove_sysfs_dev_files(dev);
|
|
|
|
if (dev->vpd && dev->vpd->attr) {
|
|
|
|
sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
|
|
|
|
kfree(dev->vpd->attr);
|
|
|
|
}
|
|
|
|
|
|
|
|
return retval;
|
2008-10-13 06:01:00 -06:00
|
|
|
}
|
|
|
|
|
2006-08-28 12:43:25 -06:00
|
|
|
int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2006-08-28 12:43:25 -06:00
|
|
|
int retval;
|
2008-10-13 06:01:00 -06:00
|
|
|
int rom_size = 0;
|
|
|
|
struct bin_attribute *attr;
|
2006-08-28 12:43:25 -06:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
if (!sysfs_initialized)
|
|
|
|
return -EACCES;
|
|
|
|
|
2008-10-13 05:18:07 -06:00
|
|
|
if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
|
2006-08-28 12:43:25 -06:00
|
|
|
retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
|
2005-04-16 16:20:36 -06:00
|
|
|
else
|
2006-08-28 12:43:25 -06:00
|
|
|
retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
|
|
|
|
if (retval)
|
|
|
|
goto err;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2006-08-28 12:43:25 -06:00
|
|
|
retval = pci_create_resource_files(pdev);
|
|
|
|
if (retval)
|
2008-10-13 06:01:00 -06:00
|
|
|
goto err_config_file;
|
|
|
|
|
|
|
|
if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
|
|
|
|
rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
|
|
|
|
else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
|
|
|
|
rom_size = 0x20000;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* If the device has a ROM, try to expose it in sysfs. */
|
2008-10-13 06:01:00 -06:00
|
|
|
if (rom_size) {
|
2008-03-05 09:52:39 -07:00
|
|
|
attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
|
2008-10-13 06:01:00 -06:00
|
|
|
if (!attr) {
|
2006-08-28 12:43:25 -06:00
|
|
|
retval = -ENOMEM;
|
2007-04-17 21:34:12 -06:00
|
|
|
goto err_resource_files;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2010-02-11 16:23:05 -07:00
|
|
|
sysfs_bin_attr_init(attr);
|
2008-10-13 06:01:00 -06:00
|
|
|
attr->size = rom_size;
|
|
|
|
attr->attr.name = "rom";
|
2011-01-05 10:26:41 -07:00
|
|
|
attr->attr.mode = S_IRUSR | S_IWUSR;
|
2008-10-13 06:01:00 -06:00
|
|
|
attr->read = pci_read_rom;
|
|
|
|
attr->write = pci_write_rom;
|
|
|
|
retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
|
|
|
|
if (retval) {
|
|
|
|
kfree(attr);
|
|
|
|
goto err_resource_files;
|
|
|
|
}
|
|
|
|
pdev->rom_attr = attr;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2008-10-13 06:01:00 -06:00
|
|
|
|
2009-03-03 22:57:05 -07:00
|
|
|
if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
|
|
|
|
retval = device_create_file(&pdev->dev, &vga_attr);
|
|
|
|
if (retval)
|
|
|
|
goto err_rom_file;
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/* add platform-specific attributes */
|
2008-10-13 06:01:00 -06:00
|
|
|
retval = pcibios_add_platform_entries(pdev);
|
|
|
|
if (retval)
|
2009-03-03 22:57:05 -07:00
|
|
|
goto err_vga_file;
|
2006-08-28 12:43:25 -06:00
|
|
|
|
2008-10-13 06:01:00 -06:00
|
|
|
/* add sysfs entries for various capabilities */
|
|
|
|
retval = pci_create_capabilities_sysfs(pdev);
|
|
|
|
if (retval)
|
2009-03-03 22:57:05 -07:00
|
|
|
goto err_vga_file;
|
PCI: add PCI Express ASPM support
PCI Express ASPM defines a protocol for PCI Express components in the D0
state to reduce Link power by placing their Links into a low power state
and instructing the other end of the Link to do likewise. This
capability allows hardware-autonomous, dynamic Link power reduction
beyond what is achievable by software-only controlled power management.
However, The device should be configured by software appropriately.
Enabling ASPM will save power, but will introduce device latency.
This patch adds ASPM support in Linux. It introduces a global policy for
ASPM, a sysfs file /sys/module/pcie_aspm/parameters/policy can control
it. The interface can be used as a boot option too. Currently we have
below setting:
-default, BIOS default setting
-powersave, highest power saving mode, enable all available ASPM
state and clock power management
-performance, highest performance, disable ASPM and clock power
management
By default, the 'default' policy is used currently.
In my test, power difference between powersave mode and performance mode
is about 1.3w in a system with 3 PCIE links.
Note: some devices might not work well with aspm, either because chipset
issue or device issue. The patch provide API (pci_disable_link_state),
driver can disable ASPM for specific device.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-02-24 18:46:41 -07:00
|
|
|
|
2010-07-26 04:56:50 -06:00
|
|
|
pci_create_firmware_label_files(pdev);
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
return 0;
|
2006-08-28 12:43:25 -06:00
|
|
|
|
2009-03-03 22:57:05 -07:00
|
|
|
err_vga_file:
|
|
|
|
if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
|
|
|
|
device_remove_file(&pdev->dev, &vga_attr);
|
2007-05-07 20:03:08 -06:00
|
|
|
err_rom_file:
|
2008-10-13 06:01:00 -06:00
|
|
|
if (rom_size) {
|
2008-03-05 09:52:39 -07:00
|
|
|
sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
|
2008-10-13 06:01:00 -06:00
|
|
|
kfree(pdev->rom_attr);
|
|
|
|
pdev->rom_attr = NULL;
|
|
|
|
}
|
2007-04-17 21:34:12 -06:00
|
|
|
err_resource_files:
|
|
|
|
pci_remove_resource_files(pdev);
|
2008-03-05 09:52:39 -07:00
|
|
|
err_config_file:
|
2008-10-13 05:18:07 -06:00
|
|
|
if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
|
2006-08-28 12:43:25 -06:00
|
|
|
sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
|
|
|
|
else
|
|
|
|
sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
|
|
|
|
err:
|
|
|
|
return retval;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2008-10-13 06:01:00 -06:00
|
|
|
static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
|
|
|
|
{
|
|
|
|
if (dev->vpd && dev->vpd->attr) {
|
|
|
|
sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
|
|
|
|
kfree(dev->vpd->attr);
|
|
|
|
}
|
|
|
|
|
|
|
|
pcie_aspm_remove_sysfs_dev_files(dev);
|
2009-07-27 14:37:48 -06:00
|
|
|
if (dev->reset_fn) {
|
|
|
|
device_remove_file(&dev->dev, &reset_attr);
|
|
|
|
dev->reset_fn = 0;
|
|
|
|
}
|
2008-10-13 06:01:00 -06:00
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/**
|
|
|
|
* pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
|
|
|
|
* @pdev: device whose entries we should free
|
|
|
|
*
|
|
|
|
* Cleanup when @pdev is removed from sysfs.
|
|
|
|
*/
|
|
|
|
void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
|
|
|
|
{
|
2008-10-13 06:01:00 -06:00
|
|
|
int rom_size = 0;
|
|
|
|
|
2006-11-10 13:27:48 -07:00
|
|
|
if (!sysfs_initialized)
|
|
|
|
return;
|
|
|
|
|
2008-10-13 06:01:00 -06:00
|
|
|
pci_remove_capabilities_sysfs(pdev);
|
PCI: add PCI Express ASPM support
PCI Express ASPM defines a protocol for PCI Express components in the D0
state to reduce Link power by placing their Links into a low power state
and instructing the other end of the Link to do likewise. This
capability allows hardware-autonomous, dynamic Link power reduction
beyond what is achievable by software-only controlled power management.
However, The device should be configured by software appropriately.
Enabling ASPM will save power, but will introduce device latency.
This patch adds ASPM support in Linux. It introduces a global policy for
ASPM, a sysfs file /sys/module/pcie_aspm/parameters/policy can control
it. The interface can be used as a boot option too. Currently we have
below setting:
-default, BIOS default setting
-powersave, highest power saving mode, enable all available ASPM
state and clock power management
-performance, highest performance, disable ASPM and clock power
management
By default, the 'default' policy is used currently.
In my test, power difference between powersave mode and performance mode
is about 1.3w in a system with 3 PCIE links.
Note: some devices might not work well with aspm, either because chipset
issue or device issue. The patch provide API (pci_disable_link_state),
driver can disable ASPM for specific device.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-02-24 18:46:41 -07:00
|
|
|
|
2008-10-13 05:18:07 -06:00
|
|
|
if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
|
2005-04-16 16:20:36 -06:00
|
|
|
sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
|
|
|
|
else
|
|
|
|
sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
|
|
|
|
|
|
|
|
pci_remove_resource_files(pdev);
|
|
|
|
|
2008-10-13 06:01:00 -06:00
|
|
|
if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
|
|
|
|
rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
|
|
|
|
else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
|
|
|
|
rom_size = 0x20000;
|
|
|
|
|
|
|
|
if (rom_size && pdev->rom_attr) {
|
|
|
|
sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
|
|
|
|
kfree(pdev->rom_attr);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2010-07-26 04:56:50 -06:00
|
|
|
|
|
|
|
pci_remove_firmware_label_files(pdev);
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static int __init pci_sysfs_init(void)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = NULL;
|
2006-08-28 12:43:25 -06:00
|
|
|
int retval;
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
sysfs_initialized = 1;
|
2006-08-28 12:43:25 -06:00
|
|
|
for_each_pci_dev(pdev) {
|
|
|
|
retval = pci_create_sysfs_dev_files(pdev);
|
2007-11-20 00:41:16 -07:00
|
|
|
if (retval) {
|
|
|
|
pci_dev_put(pdev);
|
2006-08-28 12:43:25 -06:00
|
|
|
return retval;
|
2007-11-20 00:41:16 -07:00
|
|
|
}
|
2006-08-28 12:43:25 -06:00
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-03-24 12:03:32 -06:00
|
|
|
late_initcall(pci_sysfs_init);
|
2012-11-05 13:20:34 -07:00
|
|
|
|
|
|
|
static struct attribute *pci_dev_dev_attrs[] = {
|
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
|
|
|
static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
|
|
|
|
struct attribute *a, int n)
|
|
|
|
{
|
|
|
|
return a->mode;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct attribute_group pci_dev_attr_group = {
|
|
|
|
.attrs = pci_dev_dev_attrs,
|
|
|
|
.is_visible = pci_dev_attrs_are_visible,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct attribute_group *pci_dev_attr_groups[] = {
|
|
|
|
&pci_dev_attr_group,
|
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
|
|
|
struct device_type pci_dev_type = {
|
|
|
|
.groups = pci_dev_attr_groups,
|
|
|
|
};
|