2009-08-07 09:35:16 -06:00
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/*
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* MPC85xx RDB Board Setup
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*
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* Copyright 2009 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/interrupt.h>
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#include <linux/of_platform.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <mm/mmu_decl.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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2011-12-01 23:27:58 -07:00
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#include "smp.h"
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2009-08-07 09:35:16 -06:00
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2011-11-17 10:56:16 -07:00
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#include "mpc85xx.h"
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2009-08-07 09:35:16 -06:00
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
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#else
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#define DBG(fmt, args...)
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#endif
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void __init mpc85xx_rdb_pic_init(void)
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{
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struct mpic *mpic;
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powerpc/85xx: Create dts for each core in CAMP mode for P2020RDB
This patch creates the dts files for each core and splits the devices
between the two cores for P2020RDB.
core0 has memory, L2, i2c, spi, dma1, usb, eth0, eth1, crypto,
global-util, pci0,
core1 has L2, dma2, eth0, pci1, msi.
MPIC is shared between two cores but each core will protect its
interrupts from other core by using "protected-sources" of mpic.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-19 11:13:56 -06:00
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unsigned long root = of_get_flat_dt_root();
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2009-08-07 09:35:16 -06:00
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2011-07-12 01:49:43 -06:00
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if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
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2011-12-22 03:19:14 -07:00
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mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
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2011-12-22 03:19:12 -07:00
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MPIC_BIG_ENDIAN |
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2011-07-12 01:49:43 -06:00
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MPIC_SINGLE_DEST_CPU,
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powerpc/85xx: Create dts for each core in CAMP mode for P2020RDB
This patch creates the dts files for each core and splits the devices
between the two cores for P2020RDB.
core0 has memory, L2, i2c, spi, dma1, usb, eth0, eth1, crypto,
global-util, pci0,
core1 has L2, dma2, eth0, pci1, msi.
MPIC is shared between two cores but each core will protect its
interrupts from other core by using "protected-sources" of mpic.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-19 11:13:56 -06:00
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0, 256, " OpenPIC ");
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} else {
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2011-12-01 23:28:02 -07:00
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mpic = mpic_alloc(NULL, 0,
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2011-12-22 03:19:12 -07:00
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MPIC_BIG_ENDIAN |
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2009-08-07 09:35:16 -06:00
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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powerpc/85xx: Create dts for each core in CAMP mode for P2020RDB
This patch creates the dts files for each core and splits the devices
between the two cores for P2020RDB.
core0 has memory, L2, i2c, spi, dma1, usb, eth0, eth1, crypto,
global-util, pci0,
core1 has L2, dma2, eth0, pci1, msi.
MPIC is shared between two cores but each core will protect its
interrupts from other core by using "protected-sources" of mpic.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-19 11:13:56 -06:00
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}
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2009-08-07 09:35:16 -06:00
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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}
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/*
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* Setup the architecture
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*/
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static void __init mpc85xx_rdb_setup_arch(void)
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{
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#ifdef CONFIG_PCI
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struct device_node *np;
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#endif
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if (ppc_md.progress)
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ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
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#ifdef CONFIG_PCI
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for_each_node_by_type(np, "pci") {
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if (of_device_is_compatible(np, "fsl,mpc8548-pcie"))
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fsl_add_bridge(np, 0);
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}
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#endif
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mpc85xx_smp_init();
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printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
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}
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2011-11-17 10:56:17 -07:00
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machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
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2011-12-27 20:41:47 -07:00
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machine_device_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
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2011-11-17 10:56:17 -07:00
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machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
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2012-01-17 01:01:30 -07:00
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machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
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2009-08-07 09:35:16 -06:00
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init p2020_rdb_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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if (of_flat_dt_is_compatible(root, "fsl,P2020RDB"))
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return 1;
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return 0;
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}
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2009-09-24 22:20:28 -06:00
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static int __init p1020_rdb_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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if (of_flat_dt_is_compatible(root, "fsl,P1020RDB"))
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return 1;
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return 0;
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}
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2012-01-17 01:01:30 -07:00
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static int __init p1021_rdb_pc_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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if (of_flat_dt_is_compatible(root, "fsl,P1021RDB-PC"))
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return 1;
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return 0;
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}
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2011-12-27 20:41:47 -07:00
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static int __init p2020_rdb_pc_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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if (of_flat_dt_is_compatible(root, "fsl,P2020RDB-PC"))
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return 1;
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return 0;
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}
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2009-08-07 09:35:16 -06:00
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define_machine(p2020_rdb) {
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.name = "P2020 RDB",
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.probe = p2020_rdb_probe,
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.setup_arch = mpc85xx_rdb_setup_arch,
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.init_IRQ = mpc85xx_rdb_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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.get_irq = mpic_get_irq,
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.restart = fsl_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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2009-09-24 22:20:28 -06:00
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define_machine(p1020_rdb) {
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.name = "P1020 RDB",
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.probe = p1020_rdb_probe,
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.setup_arch = mpc85xx_rdb_setup_arch,
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.init_IRQ = mpc85xx_rdb_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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.get_irq = mpic_get_irq,
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.restart = fsl_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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2012-01-17 01:01:30 -07:00
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define_machine(p1021_rdb_pc) {
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.name = "P1021 RDB-PC",
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.probe = p1021_rdb_pc_probe,
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.setup_arch = mpc85xx_rdb_setup_arch,
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.init_IRQ = mpc85xx_rdb_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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.get_irq = mpic_get_irq,
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.restart = fsl_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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2011-12-27 20:41:47 -07:00
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define_machine(p2020_rdb_pc) {
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.name = "P2020RDB-PC",
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.probe = p2020_rdb_pc_probe,
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.setup_arch = mpc85xx_rdb_setup_arch,
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.init_IRQ = mpc85xx_rdb_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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.get_irq = mpic_get_irq,
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.restart = fsl_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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