2018-07-02 00:25:11 -06:00
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/* SPDX-License-Identifier: GPL-2.0+
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*
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2012-02-22 02:49:08 -07:00
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* Copyright (C) 2012, Analog Devices Inc.
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* Author: Lars-Peter Clausen <lars@metafoo.de>
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*/
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2018-07-02 00:25:11 -06:00
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2012-02-22 02:49:08 -07:00
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#ifndef __SOUND_DMAENGINE_PCM_H__
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#define __SOUND_DMAENGINE_PCM_H__
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#include <sound/pcm.h>
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2013-04-15 11:19:51 -06:00
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#include <sound/soc.h>
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2012-02-22 02:49:08 -07:00
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#include <linux/dmaengine.h>
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/**
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* snd_pcm_substream_to_dma_direction - Get dma_transfer_direction for a PCM
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* substream
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* @substream: PCM substream
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*/
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static inline enum dma_transfer_direction
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snd_pcm_substream_to_dma_direction(const struct snd_pcm_substream *substream)
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{
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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return DMA_MEM_TO_DEV;
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else
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return DMA_DEV_TO_MEM;
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}
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int snd_hwparams_to_dma_slave_config(const struct snd_pcm_substream *substream,
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const struct snd_pcm_hw_params *params, struct dma_slave_config *slave_config);
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int snd_dmaengine_pcm_trigger(struct snd_pcm_substream *substream, int cmd);
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2012-06-11 12:11:42 -06:00
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snd_pcm_uframes_t snd_dmaengine_pcm_pointer(struct snd_pcm_substream *substream);
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2012-06-11 12:11:41 -06:00
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snd_pcm_uframes_t snd_dmaengine_pcm_pointer_no_residue(struct snd_pcm_substream *substream);
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2012-02-22 02:49:08 -07:00
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int snd_dmaengine_pcm_open(struct snd_pcm_substream *substream,
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struct dma_chan *chan);
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int snd_dmaengine_pcm_close(struct snd_pcm_substream *substream);
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2013-04-15 11:19:48 -06:00
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int snd_dmaengine_pcm_open_request_chan(struct snd_pcm_substream *substream,
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dma_filter_fn filter_fn, void *filter_data);
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int snd_dmaengine_pcm_close_release_chan(struct snd_pcm_substream *substream);
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2013-04-15 11:19:51 -06:00
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struct dma_chan *snd_dmaengine_pcm_request_channel(dma_filter_fn filter_fn,
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void *filter_data);
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struct dma_chan *snd_dmaengine_pcm_get_chan(struct snd_pcm_substream *substream);
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2016-04-27 07:26:51 -06:00
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/*
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* The DAI supports packed transfers, eg 2 16-bit samples in a 32-bit word.
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* If this flag is set the dmaengine driver won't put any restriction on
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* the supported sample formats and set the DMA transfer size to undefined.
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* The DAI driver is responsible to disable any unsupported formats in it's
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* configuration and catch corner cases that are not already handled in
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* the ALSA core.
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*/
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#define SND_DMAENGINE_PCM_DAI_FLAG_PACK BIT(0)
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2013-04-03 03:06:02 -06:00
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/**
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* struct snd_dmaengine_dai_dma_data - DAI DMA configuration data
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* @addr: Address of the DAI data source or destination register.
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* @addr_width: Width of the DAI data source or destination register.
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* @maxburst: Maximum number of words(note: words, as in units of the
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* src_addr_width member, not bytes) that can be send to or received from the
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* DAI in one burst.
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* @slave_id: Slave requester id for the DMA channel.
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* @filter_data: Custom DMA channel filter data, this will usually be used when
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* requesting the DMA channel.
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2017-01-17 06:16:41 -07:00
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* @chan_name: Custom channel name to use when requesting DMA channel.
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2013-10-08 07:07:59 -06:00
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* @fifo_size: FIFO size of the DAI controller in bytes
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2016-04-27 07:26:51 -06:00
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* @flags: PCM_DAI flags, only SND_DMAENGINE_PCM_DAI_FLAG_PACK for now
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*/
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struct snd_dmaengine_dai_dma_data {
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dma_addr_t addr;
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enum dma_slave_buswidth addr_width;
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u32 maxburst;
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unsigned int slave_id;
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void *filter_data;
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const char *chan_name;
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unsigned int fifo_size;
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unsigned int flags;
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};
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void snd_dmaengine_pcm_set_config_from_dai_data(
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const struct snd_pcm_substream *substream,
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const struct snd_dmaengine_dai_dma_data *dma_data,
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struct dma_slave_config *config);
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2013-04-15 11:19:51 -06:00
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/*
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* Try to request the DMA channel using compat_request_channel or
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* compat_filter_fn if it couldn't be requested through devicetree.
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*/
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#define SND_DMAENGINE_PCM_FLAG_COMPAT BIT(0)
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/*
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* Don't try to request the DMA channels through devicetree. This flag only
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* makes sense if SND_DMAENGINE_PCM_FLAG_COMPAT is set as well.
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*/
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#define SND_DMAENGINE_PCM_FLAG_NO_DT BIT(1)
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2013-04-20 11:29:00 -06:00
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/*
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* The PCM is half duplex and the DMA channel is shared between capture and
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* playback.
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*/
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#define SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX BIT(3)
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/*
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* The PCM streams have custom channel names specified.
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*/
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#define SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME BIT(4)
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2013-04-15 11:19:50 -06:00
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/**
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* struct snd_dmaengine_pcm_config - Configuration data for dmaengine based PCM
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* @prepare_slave_config: Callback used to fill in the DMA slave_config for a
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* PCM substream. Will be called from the PCM drivers hwparams callback.
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* @compat_request_channel: Callback to request a DMA channel for platforms
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* which do not use devicetree.
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* @process: Callback used to apply processing on samples transferred from/to
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* user space.
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2013-04-15 11:19:51 -06:00
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* @compat_filter_fn: Will be used as the filter function when requesting a
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* channel for platforms which do not use devicetree. The filter parameter
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* will be the DAI's DMA data.
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ASoC: dmaengine: add custom DMA config to snd_dmaengine_pcm_config
Add fields to struct snd_dmaengine_pcm_config to allow custom:
- DMA channel names.
This is useful when the default "tx" and "rx" channel names don't
apply, for example if a HW module supports multiple channels, each
having different DMA channel names. This is the case with the FIFOs
in Tegra's AHUB. This new facility can replace
SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME.
- DMA device
This allows requesting DMA channels for a device other than the device
which is registering the "PCM" driver. This is quite unusual, but is
currently useful on Tegra. In much HW, and in Tegra20, each DAI HW
module contains its own FIFOs which DMA writes to. However, in Tegra30,
the DMA FIFOs were split out AHUB HW module, which then routes the data
through a cross-bar, and into the DAI HW modules. However, the current
ASoC driver structure does not expose this detail, and acts as if the
FIFOs are still part of the DAI HW modules. Consequently, the "PCM"
driver is registered with the DAI HW module, yet the DMA channels must
be looked up in the AHUB HW module's device tree node. This new config
field allows that to happen. Eventually, the Tegra drivers will be
reworked to fully expose the AHUB, and this config field can be
removed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
2013-12-03 14:26:34 -07:00
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* @dma_dev: If set, request DMA channel on this device rather than the DAI
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* device.
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* @chan_names: If set, these custom DMA channel names will be requested at
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* registration time.
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* @pcm_hardware: snd_pcm_hardware struct to be used for the PCM.
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* @prealloc_buffer_size: Size of the preallocated audio buffer.
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*
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* Note: If both compat_request_channel and compat_filter_fn are set
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* compat_request_channel will be used to request the channel and
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* compat_filter_fn will be ignored. Otherwise the channel will be requested
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* using dma_request_channel with compat_filter_fn as the filter function.
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*/
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struct snd_dmaengine_pcm_config {
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int (*prepare_slave_config)(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct dma_slave_config *slave_config);
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struct dma_chan *(*compat_request_channel)(
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struct snd_soc_pcm_runtime *rtd,
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struct snd_pcm_substream *substream);
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2018-02-19 08:00:36 -07:00
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int (*process)(struct snd_pcm_substream *substream,
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int channel, unsigned long hwoff,
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void *buf, unsigned long bytes);
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2013-04-15 11:19:51 -06:00
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dma_filter_fn compat_filter_fn;
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ASoC: dmaengine: add custom DMA config to snd_dmaengine_pcm_config
Add fields to struct snd_dmaengine_pcm_config to allow custom:
- DMA channel names.
This is useful when the default "tx" and "rx" channel names don't
apply, for example if a HW module supports multiple channels, each
having different DMA channel names. This is the case with the FIFOs
in Tegra's AHUB. This new facility can replace
SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME.
- DMA device
This allows requesting DMA channels for a device other than the device
which is registering the "PCM" driver. This is quite unusual, but is
currently useful on Tegra. In much HW, and in Tegra20, each DAI HW
module contains its own FIFOs which DMA writes to. However, in Tegra30,
the DMA FIFOs were split out AHUB HW module, which then routes the data
through a cross-bar, and into the DAI HW modules. However, the current
ASoC driver structure does not expose this detail, and acts as if the
FIFOs are still part of the DAI HW modules. Consequently, the "PCM"
driver is registered with the DAI HW module, yet the DMA channels must
be looked up in the AHUB HW module's device tree node. This new config
field allows that to happen. Eventually, the Tegra drivers will be
reworked to fully expose the AHUB, and this config field can be
removed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
2013-12-03 14:26:34 -07:00
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struct device *dma_dev;
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const char *chan_names[SNDRV_PCM_STREAM_LAST + 1];
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2013-04-15 11:19:50 -06:00
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const struct snd_pcm_hardware *pcm_hardware;
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unsigned int prealloc_buffer_size;
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};
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int snd_dmaengine_pcm_register(struct device *dev,
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const struct snd_dmaengine_pcm_config *config,
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unsigned int flags);
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void snd_dmaengine_pcm_unregister(struct device *dev);
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2013-11-28 00:50:32 -07:00
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int devm_snd_dmaengine_pcm_register(struct device *dev,
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const struct snd_dmaengine_pcm_config *config,
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unsigned int flags);
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2013-04-15 11:19:50 -06:00
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int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct dma_slave_config *slave_config);
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2018-01-28 19:41:09 -07:00
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#define SND_DMAENGINE_PCM_DRV_NAME "snd_dmaengine_pcm"
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2012-02-22 02:49:08 -07:00
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#endif
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