2011-12-13 18:26:46 -07:00
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/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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/include/ "imx6q.dtsi"
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/ {
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model = "Freescale i.MX6 Quad SABRE Lite Board";
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compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
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memory {
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reg = <0x10000000 0x40000000>;
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};
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soc {
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aips-bus@02100000 { /* AIPS2 */
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enet@02188000 {
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phy-mode = "rgmii";
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phy-reset-gpios = <&gpio3 23 0>;
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status = "okay";
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};
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usdhc@02198000 { /* uSDHC3 */
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cd-gpios = <&gpio7 0 0>;
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wp-gpios = <&gpio7 1 0>;
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2012-02-27 02:15:12 -07:00
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vmmc-supply = <®_3p3v>;
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2011-12-13 18:26:46 -07:00
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status = "okay";
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};
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usdhc@0219c000 { /* uSDHC4 */
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cd-gpios = <&gpio2 6 0>;
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wp-gpios = <&gpio2 7 0>;
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2012-02-27 02:15:12 -07:00
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vmmc-supply = <®_3p3v>;
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2011-12-13 18:26:46 -07:00
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status = "okay";
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};
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uart2: uart@021e8000 {
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status = "okay";
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};
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2012-02-01 19:12:03 -07:00
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i2c@021a0000 { /* I2C1 */
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status = "okay";
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clock-frequency = <100000>;
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codec: sgtl5000@0a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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VDDA-supply = <®_2p5v>;
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VDDIO-supply = <®_3p3v>;
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};
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};
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2011-12-13 18:26:46 -07:00
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};
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};
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2012-02-01 19:12:02 -07:00
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regulators {
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compatible = "simple-bus";
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reg_2p5v: 2p5v {
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compatible = "regulator-fixed";
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regulator-name = "2P5V";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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reg_3p3v: 3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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2011-12-13 18:26:46 -07:00
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};
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