2005-04-16 16:20:36 -06:00
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#ifndef __ASM_MACH_WAKECPU_H
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#define __ASM_MACH_WAKECPU_H
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/*
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* This file copes with machines that wakeup secondary CPUs by the
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* INIT, INIT, STARTUP sequence.
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*/
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#ifdef CONFIG_ES7000_CLUSTERED_APIC
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#define WAKE_SECONDARY_VIA_MIP
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#else
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#define WAKE_SECONDARY_VIA_INIT
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#endif
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#ifdef WAKE_SECONDARY_VIA_MIP
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extern int es7000_start_cpu(int cpu, unsigned long eip);
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static inline int
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wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
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{
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int boot_error = 0;
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boot_error = es7000_start_cpu(phys_apicid, start_eip);
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return boot_error;
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}
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#endif
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#define TRAMPOLINE_LOW phys_to_virt(0x467)
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#define TRAMPOLINE_HIGH phys_to_virt(0x469)
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#define boot_cpu_apicid boot_cpu_physical_apicid
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static inline void wait_for_init_deassert(atomic_t *deassert)
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{
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#ifdef WAKE_SECONDARY_VIA_INIT
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2007-08-15 18:39:25 -06:00
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while (!atomic_read(deassert))
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cpu_relax();
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2005-04-16 16:20:36 -06:00
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#endif
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return;
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}
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/* Nothing to do for most platforms, since cleared by the INIT cycle */
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static inline void smp_callin_clear_local_apic(void)
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{
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}
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static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
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{
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}
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static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
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{
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}
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#if APIC_DEBUG
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#define inquire_remote_apic(apicid) __inquire_remote_apic(apicid)
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#else
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#define inquire_remote_apic(apicid) {}
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#endif
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#endif /* __ASM_MACH_WAKECPU_H */
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