87 lines
2 KiB
C
87 lines
2 KiB
C
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#ifndef _ASM_SPARC64_TOPOLOGY_H
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#define _ASM_SPARC64_TOPOLOGY_H
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#ifdef CONFIG_NUMA
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#include <asm/mmzone.h>
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static inline int cpu_to_node(int cpu)
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{
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return numa_cpu_lookup_table[cpu];
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}
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#define parent_node(node) (node)
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static inline cpumask_t node_to_cpumask(int node)
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{
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return numa_cpumask_lookup_table[node];
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}
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/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
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#define node_to_cpumask_ptr(v, node) \
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cpumask_t *v = &(numa_cpumask_lookup_table[node])
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#define node_to_cpumask_ptr_next(v, node) \
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v = &(numa_cpumask_lookup_table[node])
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static inline int node_to_first_cpu(int node)
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{
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cpumask_t tmp;
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tmp = node_to_cpumask(node);
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return first_cpu(tmp);
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}
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struct pci_bus;
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#ifdef CONFIG_PCI
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extern int pcibus_to_node(struct pci_bus *pbus);
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#else
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static inline int pcibus_to_node(struct pci_bus *pbus)
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{
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return -1;
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}
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#endif
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#define pcibus_to_cpumask(bus) \
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(pcibus_to_node(bus) == -1 ? \
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CPU_MASK_ALL : \
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node_to_cpumask(pcibus_to_node(bus)))
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#define SD_NODE_INIT (struct sched_domain) { \
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.min_interval = 8, \
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.max_interval = 32, \
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.busy_factor = 32, \
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.imbalance_pct = 125, \
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.cache_nice_tries = 2, \
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.busy_idx = 3, \
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.idle_idx = 2, \
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.newidle_idx = 0, \
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.wake_idx = 1, \
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.forkexec_idx = 1, \
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.flags = SD_LOAD_BALANCE \
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| SD_BALANCE_FORK \
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| SD_BALANCE_EXEC \
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| SD_SERIALIZE \
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| SD_WAKE_BALANCE, \
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.last_balance = jiffies, \
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.balance_interval = 1, \
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}
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#else /* CONFIG_NUMA */
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#include <asm-generic/topology.h>
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#endif /* !(CONFIG_NUMA) */
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#ifdef CONFIG_SMP
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#define topology_physical_package_id(cpu) (cpu_data(cpu).proc_id)
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#define topology_core_id(cpu) (cpu_data(cpu).core_id)
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#define topology_core_siblings(cpu) (cpu_core_map[cpu])
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#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu))
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#define mc_capable() (sparc64_multi_core)
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#define smt_capable() (sparc64_multi_core)
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#endif /* CONFIG_SMP */
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#define cpu_coregroup_map(cpu) (cpu_core_map[cpu])
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#endif /* _ASM_SPARC64_TOPOLOGY_H */
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