2012-01-19 01:16:35 -07:00
|
|
|
NVIDIA Tegra GPIO controller
|
2011-06-15 14:54:14 -06:00
|
|
|
|
|
|
|
Required properties:
|
2012-01-19 01:16:35 -07:00
|
|
|
- compatible : "nvidia,tegra<chip>-gpio"
|
2012-01-04 01:39:34 -07:00
|
|
|
- reg : Physical base address and length of the controller's registers.
|
2012-01-19 01:16:35 -07:00
|
|
|
- interrupts : The interrupt outputs from the controller. For Tegra20,
|
|
|
|
there should be 7 interrupts specified, and for Tegra30, there should
|
|
|
|
be 8 interrupts specified.
|
2011-06-15 14:54:14 -06:00
|
|
|
- #gpio-cells : Should be two. The first cell is the pin number and the
|
2011-07-14 23:17:13 -06:00
|
|
|
second cell is used to specify optional parameters:
|
|
|
|
- bit 0 specifies polarity (0 for normal, 1 for inverted)
|
2011-06-15 14:54:14 -06:00
|
|
|
- gpio-controller : Marks the device node as a GPIO controller.
|
2012-01-04 01:39:37 -07:00
|
|
|
- #interrupt-cells : Should be 2.
|
|
|
|
The first cell is the GPIO number.
|
|
|
|
The second cell is used to specify flags:
|
|
|
|
bits[3:0] trigger type and level flags:
|
|
|
|
1 = low-to-high edge triggered.
|
|
|
|
2 = high-to-low edge triggered.
|
|
|
|
4 = active high level-sensitive.
|
|
|
|
8 = active low level-sensitive.
|
|
|
|
Valid combinations are 1, 2, 3, 4, 8.
|
|
|
|
- interrupt-controller : Marks the device node as an interrupt controller.
|
2012-01-04 01:39:34 -07:00
|
|
|
|
|
|
|
Example:
|
|
|
|
|
|
|
|
gpio: gpio@6000d000 {
|
|
|
|
compatible = "nvidia,tegra20-gpio";
|
|
|
|
reg = < 0x6000d000 0x1000 >;
|
|
|
|
interrupts = < 0 32 0x04
|
|
|
|
0 33 0x04
|
|
|
|
0 34 0x04
|
|
|
|
0 35 0x04
|
|
|
|
0 55 0x04
|
|
|
|
0 87 0x04
|
|
|
|
0 89 0x04 >;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
gpio-controller;
|
2012-01-04 01:39:37 -07:00
|
|
|
#interrupt-cells = <2>;
|
|
|
|
interrupt-controller;
|
2012-01-04 01:39:34 -07:00
|
|
|
};
|