2012-05-09 07:27:20 -06:00
|
|
|
/**
|
|
|
|
* tpci200.h
|
|
|
|
*
|
|
|
|
* driver for the carrier TEWS TPCI-200
|
2012-11-16 08:19:58 -07:00
|
|
|
*
|
|
|
|
* Copyright (C) 2009-2012 CERN (www.cern.ch)
|
|
|
|
* Author: Nicolas Serafini, EIC2 SA
|
|
|
|
* Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
|
2012-05-09 07:27:20 -06:00
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
|
|
* under the terms of the GNU General Public License as published by the Free
|
2012-05-11 02:17:14 -06:00
|
|
|
* Software Foundation; version 2 of the License.
|
2012-05-09 07:27:20 -06:00
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef _TPCI200_H_
|
|
|
|
#define _TPCI200_H_
|
|
|
|
|
|
|
|
#include <linux/limits.h>
|
|
|
|
#include <linux/pci.h>
|
|
|
|
#include <linux/spinlock.h>
|
|
|
|
#include <linux/swab.h>
|
|
|
|
#include <linux/io.h>
|
2012-11-16 11:33:45 -07:00
|
|
|
#include <linux/ipack.h>
|
2012-05-09 07:27:20 -06:00
|
|
|
|
|
|
|
#define TPCI200_NB_SLOT 0x4
|
|
|
|
#define TPCI200_NB_BAR 0x6
|
|
|
|
|
|
|
|
#define TPCI200_VENDOR_ID 0x1498
|
|
|
|
#define TPCI200_DEVICE_ID 0x30C8
|
|
|
|
#define TPCI200_SUBVENDOR_ID 0x1498
|
|
|
|
#define TPCI200_SUBDEVICE_ID 0x300A
|
|
|
|
|
2012-09-04 09:01:07 -06:00
|
|
|
#define TPCI200_CFG_MEM_BAR 0
|
2012-05-09 07:27:20 -06:00
|
|
|
#define TPCI200_IP_INTERFACE_BAR 2
|
|
|
|
#define TPCI200_IO_ID_INT_SPACES_BAR 3
|
|
|
|
#define TPCI200_MEM16_SPACE_BAR 4
|
|
|
|
#define TPCI200_MEM8_SPACE_BAR 5
|
|
|
|
|
2012-09-11 05:34:54 -06:00
|
|
|
struct tpci200_regs {
|
2012-09-12 06:55:46 -06:00
|
|
|
__le16 revision;
|
2012-09-11 05:34:54 -06:00
|
|
|
/* writes to control should occur with the mutex held to protect
|
|
|
|
* read-modify-write operations */
|
2012-09-12 06:55:46 -06:00
|
|
|
__le16 control[4];
|
|
|
|
__le16 reset;
|
|
|
|
__le16 status;
|
2012-09-11 05:34:54 -06:00
|
|
|
u8 reserved[242];
|
|
|
|
} __packed;
|
2012-05-09 07:27:20 -06:00
|
|
|
|
|
|
|
#define TPCI200_IFACE_SIZE 0x100
|
|
|
|
|
|
|
|
#define TPCI200_IO_SPACE_OFF 0x0000
|
2012-09-27 04:37:30 -06:00
|
|
|
#define TPCI200_IO_SPACE_INTERVAL 0x0100
|
2012-05-09 07:27:20 -06:00
|
|
|
#define TPCI200_IO_SPACE_SIZE 0x0080
|
|
|
|
#define TPCI200_ID_SPACE_OFF 0x0080
|
2012-09-27 04:37:30 -06:00
|
|
|
#define TPCI200_ID_SPACE_INTERVAL 0x0100
|
2012-05-09 07:27:20 -06:00
|
|
|
#define TPCI200_ID_SPACE_SIZE 0x0040
|
|
|
|
#define TPCI200_INT_SPACE_OFF 0x00C0
|
2012-09-27 04:37:30 -06:00
|
|
|
#define TPCI200_INT_SPACE_INTERVAL 0x0100
|
2012-05-09 07:27:20 -06:00
|
|
|
#define TPCI200_INT_SPACE_SIZE 0x0040
|
|
|
|
#define TPCI200_IOIDINT_SIZE 0x0400
|
|
|
|
|
2012-09-27 04:37:30 -06:00
|
|
|
#define TPCI200_MEM8_SPACE_INTERVAL 0x00400000
|
|
|
|
#define TPCI200_MEM8_SPACE_SIZE 0x00400000
|
|
|
|
#define TPCI200_MEM16_SPACE_INTERVAL 0x00800000
|
|
|
|
#define TPCI200_MEM16_SPACE_SIZE 0x00800000
|
2012-05-09 07:27:20 -06:00
|
|
|
|
2012-09-11 05:34:54 -06:00
|
|
|
/* control field in tpci200_regs */
|
2012-05-09 07:27:20 -06:00
|
|
|
#define TPCI200_INT0_EN 0x0040
|
|
|
|
#define TPCI200_INT1_EN 0x0080
|
|
|
|
#define TPCI200_INT0_EDGE 0x0010
|
|
|
|
#define TPCI200_INT1_EDGE 0x0020
|
|
|
|
#define TPCI200_ERR_INT_EN 0x0008
|
|
|
|
#define TPCI200_TIME_INT_EN 0x0004
|
|
|
|
#define TPCI200_RECOVER_EN 0x0002
|
|
|
|
#define TPCI200_CLK32 0x0001
|
|
|
|
|
2012-09-11 05:34:54 -06:00
|
|
|
/* reset field in tpci200_regs */
|
2012-05-09 07:27:20 -06:00
|
|
|
#define TPCI200_A_RESET 0x0001
|
|
|
|
#define TPCI200_B_RESET 0x0002
|
|
|
|
#define TPCI200_C_RESET 0x0004
|
|
|
|
#define TPCI200_D_RESET 0x0008
|
|
|
|
|
2012-09-11 05:34:54 -06:00
|
|
|
/* status field in tpci200_regs */
|
2012-05-09 07:27:20 -06:00
|
|
|
#define TPCI200_A_TIMEOUT 0x1000
|
|
|
|
#define TPCI200_B_TIMEOUT 0x2000
|
|
|
|
#define TPCI200_C_TIMEOUT 0x4000
|
|
|
|
#define TPCI200_D_TIMEOUT 0x8000
|
|
|
|
|
|
|
|
#define TPCI200_A_ERROR 0x0100
|
|
|
|
#define TPCI200_B_ERROR 0x0200
|
|
|
|
#define TPCI200_C_ERROR 0x0400
|
|
|
|
#define TPCI200_D_ERROR 0x0800
|
|
|
|
|
|
|
|
#define TPCI200_A_INT0 0x0001
|
|
|
|
#define TPCI200_A_INT1 0x0002
|
|
|
|
#define TPCI200_B_INT0 0x0004
|
|
|
|
#define TPCI200_B_INT1 0x0008
|
|
|
|
#define TPCI200_C_INT0 0x0010
|
|
|
|
#define TPCI200_C_INT1 0x0020
|
|
|
|
#define TPCI200_D_INT0 0x0040
|
|
|
|
#define TPCI200_D_INT1 0x0080
|
|
|
|
|
|
|
|
#define TPCI200_SLOT_INT_MASK 0x00FF
|
|
|
|
|
2012-09-04 09:01:07 -06:00
|
|
|
/* PCI Configuration registers. The PCI bridge is a PLX Technology PCI9030. */
|
|
|
|
#define LAS1_DESC 0x2C
|
|
|
|
#define LAS2_DESC 0x30
|
|
|
|
|
|
|
|
/* Bits in the LAS?_DESC registers */
|
|
|
|
#define LAS_BIT_BIGENDIAN 24
|
|
|
|
|
2012-05-09 07:27:20 -06:00
|
|
|
#define VME_IOID_SPACE "IOID"
|
|
|
|
#define VME_MEM_SPACE "MEM"
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct slot_irq - slot IRQ definition.
|
|
|
|
* @vector Vector number
|
|
|
|
* @handler Handler called when IRQ arrives
|
|
|
|
* @arg Handler argument
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
struct slot_irq {
|
2012-09-11 05:35:13 -06:00
|
|
|
struct ipack_device *holder;
|
2012-05-18 03:10:06 -06:00
|
|
|
int vector;
|
2012-09-12 06:55:38 -06:00
|
|
|
irqreturn_t (*handler)(void *);
|
2012-05-18 03:10:06 -06:00
|
|
|
void *arg;
|
2012-05-09 07:27:20 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct tpci200_slot - data specific to the tpci200 slot.
|
|
|
|
* @slot_id Slot identification gived to external interface
|
|
|
|
* @irq Slot IRQ infos
|
|
|
|
* @io_phys IO physical base address register of the slot
|
|
|
|
* @id_phys ID physical base address register of the slot
|
2012-09-13 04:32:19 -06:00
|
|
|
* @int_phys INT physical base address register of the slot
|
2012-05-09 07:27:20 -06:00
|
|
|
* @mem_phys MEM physical base address register of the slot
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
struct tpci200_slot {
|
2012-09-27 04:37:28 -06:00
|
|
|
struct slot_irq *irq;
|
2012-05-09 07:27:20 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct tpci200_infos - informations specific of the TPCI200 tpci200.
|
|
|
|
* @pci_dev PCI device
|
|
|
|
* @interface_regs Pointer to IP interface space (Bar 2)
|
|
|
|
* @ioidint_space Pointer to IP ID, IO and INT space (Bar 3)
|
|
|
|
* @mem8_space Pointer to MEM space (Bar 4)
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
struct tpci200_infos {
|
|
|
|
struct pci_dev *pdev;
|
|
|
|
struct pci_device_id *id_table;
|
2012-09-11 05:34:54 -06:00
|
|
|
struct tpci200_regs __iomem *interface_regs;
|
2012-09-04 09:01:07 -06:00
|
|
|
void __iomem *cfg_regs;
|
2012-05-18 03:10:05 -06:00
|
|
|
struct ipack_bus_device *ipack_bus;
|
2012-05-09 07:27:20 -06:00
|
|
|
};
|
|
|
|
struct tpci200_board {
|
|
|
|
unsigned int number;
|
|
|
|
struct mutex mutex;
|
2012-09-12 06:55:33 -06:00
|
|
|
spinlock_t regs_lock;
|
2012-05-09 07:27:20 -06:00
|
|
|
struct tpci200_slot *slots;
|
|
|
|
struct tpci200_infos *info;
|
2012-09-27 04:37:29 -06:00
|
|
|
phys_addr_t mod_mem[IPACK_SPACE_COUNT];
|
2012-05-09 07:27:20 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
#endif /* _TPCI200_H_ */
|