257 lines
6 KiB
C
257 lines
6 KiB
C
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/*
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* The generic setup file for PMC-Sierra MSP processors
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*
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* Copyright 2005-2007 PMC-Sierra, Inc,
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* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <asm/bootinfo.h>
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#include <asm/cacheflush.h>
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#include <asm/r4kcache.h>
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#include <asm/reboot.h>
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#include <asm/time.h>
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#include <msp_prom.h>
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#include <msp_regs.h>
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#if defined(CONFIG_PMC_MSP7120_GW)
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#include <msp_regops.h>
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#include <msp_gpio.h>
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#define MSP_BOARD_RESET_GPIO 9
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#endif
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extern void msp_timer_init(void);
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extern void msp_serial_setup(void);
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extern void pmctwiled_setup(void);
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#if defined(CONFIG_PMC_MSP7120_EVAL) || \
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defined(CONFIG_PMC_MSP7120_GW) || \
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defined(CONFIG_PMC_MSP7120_FPGA)
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/*
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* Performs the reset for MSP7120-based boards
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*/
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void msp7120_reset(void)
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{
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void *start, *end, *iptr;
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register int i;
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/* Diasble all interrupts */
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local_irq_disable();
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#ifdef CONFIG_SYS_SUPPORTS_MULTITHREADING
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dvpe();
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#endif
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/* Cache the reset code of this function */
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__asm__ __volatile__ (
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" .set push \n"
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" .set mips3 \n"
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" la %0,startpoint \n"
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" la %1,endpoint \n"
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" .set pop \n"
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: "=r" (start), "=r" (end)
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:
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);
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for (iptr = (void *)((unsigned int)start & ~(L1_CACHE_BYTES - 1));
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iptr < end; iptr += L1_CACHE_BYTES)
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cache_op(Fill, iptr);
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__asm__ __volatile__ (
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"startpoint: \n"
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);
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/* Put the DDRC into self-refresh mode */
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DDRC_INDIRECT_WRITE(DDRC_CTL(10), 0xb, 1 << 16);
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/*
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* IMPORTANT!
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* DO NOT do anything from here on out that might even
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* think about fetching from RAM - i.e., don't call any
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* non-inlined functions, and be VERY sure that any inline
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* functions you do call do NOT access any sort of RAM
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* anywhere!
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*/
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/* Wait a bit for the DDRC to settle */
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for (i = 0; i < 100000000; i++);
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#if defined(CONFIG_PMC_MSP7120_GW)
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/*
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* Set GPIO 9 HI, (tied to board reset logic)
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* GPIO 9 is the 4th GPIO of register 3
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*
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* NOTE: We cannot use the higher-level msp_gpio_mode()/out()
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* as GPIO char driver may not be enabled and it would look up
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* data inRAM!
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*/
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set_value_reg32(GPIO_CFG3_REG,
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basic_mode_mask(MSP_BOARD_RESET_GPIO),
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basic_mode(MSP_GPIO_OUTPUT, MSP_BOARD_RESET_GPIO));
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set_reg32(GPIO_DATA3_REG,
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basic_data_mask(MSP_BOARD_RESET_GPIO));
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/*
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* In case GPIO9 doesn't reset the board (jumper configurable!)
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* fallback to device reset below.
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*/
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#endif
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/* Set bit 1 of the MSP7120 reset register */
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*RST_SET_REG = 0x00000001;
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__asm__ __volatile__ (
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"endpoint: \n"
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);
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}
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#endif
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void msp_restart(char *command)
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{
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printk(KERN_WARNING "Now rebooting .......\n");
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#if defined(CONFIG_PMC_MSP7120_EVAL) || \
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defined(CONFIG_PMC_MSP7120_GW) || \
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defined(CONFIG_PMC_MSP7120_FPGA)
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msp7120_reset();
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#else
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/* No chip-specific reset code, just jump to the ROM reset vector */
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set_c0_status(ST0_BEV | ST0_ERL);
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change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
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flush_cache_all();
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write_c0_wired(0);
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__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
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#endif
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}
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void msp_halt(void)
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{
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printk(KERN_WARNING "\n** You can safely turn off the power\n");
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while (1)
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/* If possible call official function to get CPU WARs */
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if (cpu_wait)
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(*cpu_wait)();
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else
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__asm__(".set\tmips3\n\t" "wait\n\t" ".set\tmips0");
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}
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void msp_power_off(void)
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{
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msp_halt();
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}
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void __init plat_mem_setup(void)
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{
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_machine_restart = msp_restart;
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_machine_halt = msp_halt;
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pm_power_off = msp_power_off;
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board_time_init = msp_timer_init;
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}
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void __init prom_init(void)
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{
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unsigned long family;
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unsigned long revision;
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prom_argc = fw_arg0;
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prom_argv = (char **)fw_arg1;
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prom_envp = (char **)fw_arg2;
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/*
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* Someday we can use this with PMON2000 to get a
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* platform call prom routines for output etc. without
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* having to use grody hacks. For now it's unused.
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*
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* struct callvectors *cv = (struct callvectors *) fw_arg3;
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*/
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family = identify_family();
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revision = identify_revision();
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switch (family) {
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case FAMILY_FPGA:
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if (FPGA_IS_MSP4200(revision)) {
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/* Old-style revision ID */
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mips_machgroup = MACH_GROUP_MSP;
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mips_machtype = MACH_MSP4200_FPGA;
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} else {
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mips_machgroup = MACH_GROUP_MSP;
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mips_machtype = MACH_MSP_OTHER;
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}
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break;
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case FAMILY_MSP4200:
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mips_machgroup = MACH_GROUP_MSP;
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#if defined(CONFIG_PMC_MSP4200_EVAL)
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mips_machtype = MACH_MSP4200_EVAL;
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#elif defined(CONFIG_PMC_MSP4200_GW)
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mips_machtype = MACH_MSP4200_GW;
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#else
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mips_machtype = MACH_MSP_OTHER;
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#endif
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break;
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case FAMILY_MSP4200_FPGA:
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mips_machgroup = MACH_GROUP_MSP;
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mips_machtype = MACH_MSP4200_FPGA;
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break;
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case FAMILY_MSP7100:
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mips_machgroup = MACH_GROUP_MSP;
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#if defined(CONFIG_PMC_MSP7120_EVAL)
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mips_machtype = MACH_MSP7120_EVAL;
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#elif defined(CONFIG_PMC_MSP7120_GW)
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mips_machtype = MACH_MSP7120_GW;
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#else
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mips_machtype = MACH_MSP_OTHER;
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#endif
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break;
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case FAMILY_MSP7100_FPGA:
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mips_machgroup = MACH_GROUP_MSP;
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mips_machtype = MACH_MSP7120_FPGA;
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break;
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default:
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/* we don't recognize the machine */
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mips_machgroup = MACH_GROUP_UNKNOWN;
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mips_machtype = MACH_UNKNOWN;
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break;
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}
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/* make sure we have the right initialization routine - sanity */
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if (mips_machgroup != MACH_GROUP_MSP) {
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ppfinit("Unknown machine group in a "
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"MSP initialization routine\n");
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panic("***Bogosity factor five***, exiting\n");
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}
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prom_init_cmdline();
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prom_meminit();
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/*
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* Sub-system setup follows.
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* Setup functions can either be called here or using the
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* subsys_initcall mechanism (i.e. see msp_pci_setup). The
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* order in which they are called can be changed by using the
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* link order in arch/mips/pmc-sierra/msp71xx/Makefile.
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*
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* NOTE: Please keep sub-system specific initialization code
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* in separate specific files.
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*/
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msp_serial_setup();
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#ifdef CONFIG_PMCTWILED
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/*
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* Setup LED states before the subsys_initcall loads other
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* dependant drivers/modules.
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*/
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pmctwiled_setup();
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#endif
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}
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