2005-04-16 16:20:36 -06:00
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/*
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* include/asm-parisc/processor.h
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*
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* Copyright (C) 1994 Linus Torvalds
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* Copyright (C) 2001 Grant Grundler
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*/
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#ifndef __ASM_PARISC_PROCESSOR_H
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#define __ASM_PARISC_PROCESSOR_H
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#ifndef __ASSEMBLY__
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#include <linux/config.h>
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#include <linux/threads.h>
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[PATCH] spinlock consolidation
This patch (written by me and also containing many suggestions of Arjan van
de Ven) does a major cleanup of the spinlock code. It does the following
things:
- consolidates and enhances the spinlock/rwlock debugging code
- simplifies the asm/spinlock.h files
- encapsulates the raw spinlock type and moves generic spinlock
features (such as ->break_lock) into the generic code.
- cleans up the spinlock code hierarchy to get rid of the spaghetti.
Most notably there's now only a single variant of the debugging code,
located in lib/spinlock_debug.c. (previously we had one SMP debugging
variant per architecture, plus a separate generic one for UP builds)
Also, i've enhanced the rwlock debugging facility, it will now track
write-owners. There is new spinlock-owner/CPU-tracking on SMP builds too.
All locks have lockup detection now, which will work for both soft and hard
spin/rwlock lockups.
The arch-level include files now only contain the minimally necessary
subset of the spinlock code - all the rest that can be generalized now
lives in the generic headers:
include/asm-i386/spinlock_types.h | 16
include/asm-x86_64/spinlock_types.h | 16
I have also split up the various spinlock variants into separate files,
making it easier to see which does what. The new layout is:
SMP | UP
----------------------------|-----------------------------------
asm/spinlock_types_smp.h | linux/spinlock_types_up.h
linux/spinlock_types.h | linux/spinlock_types.h
asm/spinlock_smp.h | linux/spinlock_up.h
linux/spinlock_api_smp.h | linux/spinlock_api_up.h
linux/spinlock.h | linux/spinlock.h
/*
* here's the role of the various spinlock/rwlock related include files:
*
* on SMP builds:
*
* asm/spinlock_types.h: contains the raw_spinlock_t/raw_rwlock_t and the
* initializers
*
* linux/spinlock_types.h:
* defines the generic type and initializers
*
* asm/spinlock.h: contains the __raw_spin_*()/etc. lowlevel
* implementations, mostly inline assembly code
*
* (also included on UP-debug builds:)
*
* linux/spinlock_api_smp.h:
* contains the prototypes for the _spin_*() APIs.
*
* linux/spinlock.h: builds the final spin_*() APIs.
*
* on UP builds:
*
* linux/spinlock_type_up.h:
* contains the generic, simplified UP spinlock type.
* (which is an empty structure on non-debug builds)
*
* linux/spinlock_types.h:
* defines the generic type and initializers
*
* linux/spinlock_up.h:
* contains the __raw_spin_*()/etc. version of UP
* builds. (which are NOPs on non-debug, non-preempt
* builds)
*
* (included on UP-non-debug builds:)
*
* linux/spinlock_api_up.h:
* builds the _spin_*() APIs.
*
* linux/spinlock.h: builds the final spin_*() APIs.
*/
All SMP and UP architectures are converted by this patch.
arm, i386, ia64, ppc, ppc64, s390/s390x, x64 was build-tested via
crosscompilers. m32r, mips, sh, sparc, have not been tested yet, but should
be mostly fine.
From: Grant Grundler <grundler@parisc-linux.org>
Booted and lightly tested on a500-44 (64-bit, SMP kernel, dual CPU).
Builds 32-bit SMP kernel (not booted or tested). I did not try to build
non-SMP kernels. That should be trivial to fix up later if necessary.
I converted bit ops atomic_hash lock to raw_spinlock_t. Doing so avoids
some ugly nesting of linux/*.h and asm/*.h files. Those particular locks
are well tested and contained entirely inside arch specific code. I do NOT
expect any new issues to arise with them.
If someone does ever need to use debug/metrics with them, then they will
need to unravel this hairball between spinlocks, atomic ops, and bit ops
that exist only because parisc has exactly one atomic instruction: LDCW
(load and clear word).
From: "Luck, Tony" <tony.luck@intel.com>
ia64 fix
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Arjan van de Ven <arjanv@infradead.org>
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Cc: Matthew Wilcox <willy@debian.org>
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Signed-off-by: Mikael Pettersson <mikpe@csd.uu.se>
Signed-off-by: Benoit Boissinot <benoit.boissinot@ens-lyon.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-10 01:25:56 -06:00
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#include <linux/spinlock_types.h>
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2005-04-16 16:20:36 -06:00
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#include <asm/hardware.h>
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#include <asm/page.h>
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#include <asm/pdc.h>
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#include <asm/ptrace.h>
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#include <asm/types.h>
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#include <asm/system.h>
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#endif /* __ASSEMBLY__ */
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#define KERNEL_STACK_SIZE (4*PAGE_SIZE)
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/*
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* Default implementation of macro that returns current
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* instruction pointer ("program counter").
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*/
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/* We cannot use MFIA as it was added for PA2.0 - prumpf
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At one point there were no "0f/0b" type local symbols in gas for
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PA-RISC. This is no longer true, but this still seems like the
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nicest way to implement this. */
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#define current_text_addr() ({ void *pc; __asm__("\n\tblr 0,%0\n\tnop":"=r" (pc)); pc; })
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#define TASK_SIZE (current->thread.task_size)
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#define TASK_UNMAPPED_BASE (current->thread.map_base)
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#define DEFAULT_TASK_SIZE32 (0xFFF00000UL)
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#define DEFAULT_MAP_BASE32 (0x40000000UL)
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#ifdef __LP64__
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#define DEFAULT_TASK_SIZE (MAX_ADDRESS-0xf000000)
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#define DEFAULT_MAP_BASE (0x200000000UL)
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#else
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#define DEFAULT_TASK_SIZE DEFAULT_TASK_SIZE32
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#define DEFAULT_MAP_BASE DEFAULT_MAP_BASE32
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#endif
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#ifndef __ASSEMBLY__
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/*
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* Data detected about CPUs at boot time which is the same for all CPU's.
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* HP boxes are SMP - ie identical processors.
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*
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* FIXME: some CPU rev info may be processor specific...
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*/
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struct system_cpuinfo_parisc {
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unsigned int cpu_count;
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unsigned int cpu_hz;
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unsigned int hversion;
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unsigned int sversion;
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enum cpu_type cpu_type;
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struct {
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struct pdc_model model;
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unsigned long versions;
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unsigned long cpuid;
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unsigned long capabilities;
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char sys_model_name[81]; /* PDC-ROM returnes this model name */
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} pdc;
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char *cpu_name; /* e.g. "PA7300LC (PCX-L2)" */
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char *family_name; /* e.g. "1.1e" */
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};
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/* Per CPU data structure - ie varies per CPU. */
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struct cpuinfo_parisc {
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unsigned long it_value; /* Interval Timer at last timer Intr */
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unsigned long it_delta; /* Interval delta (tic_10ms / HZ * 100) */
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unsigned long irq_count; /* number of IRQ's since boot */
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unsigned long irq_max_cr16; /* longest time to handle a single IRQ */
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unsigned long cpuid; /* aka slot_number or set to NO_PROC_ID */
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unsigned long hpa; /* Host Physical address */
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unsigned long txn_addr; /* MMIO addr of EIR or id_eid */
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#ifdef CONFIG_SMP
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spinlock_t lock; /* synchronization for ipi's */
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unsigned long pending_ipi; /* bitmap of type ipi_message_type */
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unsigned long ipi_count; /* number ipi Interrupts */
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#endif
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unsigned long bh_count; /* number of times bh was invoked */
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unsigned long prof_counter; /* per CPU profiling support */
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unsigned long prof_multiplier; /* per CPU profiling support */
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unsigned long fp_rev;
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unsigned long fp_model;
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unsigned int state;
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struct parisc_device *dev;
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unsigned long loops_per_jiffy;
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};
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extern struct system_cpuinfo_parisc boot_cpu_data;
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extern struct cpuinfo_parisc cpu_data[NR_CPUS];
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#define current_cpu_data cpu_data[smp_processor_id()]
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#define CPU_HVERSION ((boot_cpu_data.hversion >> 4) & 0x0FFF)
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typedef struct {
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int seg;
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} mm_segment_t;
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#define ARCH_MIN_TASKALIGN 8
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struct thread_struct {
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struct pt_regs regs;
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unsigned long task_size;
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unsigned long map_base;
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unsigned long flags;
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};
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/* Thread struct flags. */
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2005-10-21 20:43:15 -06:00
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#define PARISC_UAC_NOPRINT (1UL << 0) /* see prctl and unaligned.c */
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#define PARISC_UAC_SIGBUS (1UL << 1)
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2005-04-16 16:20:36 -06:00
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#define PARISC_KERNEL_DEATH (1UL << 31) /* see die_if_kernel()... */
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2005-10-21 20:43:15 -06:00
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#define PARISC_UAC_SHIFT 0
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#define PARISC_UAC_MASK (PARISC_UAC_NOPRINT|PARISC_UAC_SIGBUS)
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#define SET_UNALIGN_CTL(task,value) \
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({ \
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(task)->thread.flags = (((task)->thread.flags & ~PARISC_UAC_MASK) \
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| (((value) << PARISC_UAC_SHIFT) & \
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PARISC_UAC_MASK)); \
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0; \
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})
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#define GET_UNALIGN_CTL(task,addr) \
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({ \
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put_user(((task)->thread.flags & PARISC_UAC_MASK) \
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>> PARISC_UAC_SHIFT, (int __user *) (addr)); \
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})
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2005-04-16 16:20:36 -06:00
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#define INIT_THREAD { \
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2006-01-10 18:48:02 -07:00
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.regs = { .gr = { 0, }, \
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.fr = { 0, }, \
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.sr = { 0, }, \
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.iasq = { 0, }, \
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.iaoq = { 0, }, \
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.cr27 = 0, \
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2005-04-16 16:20:36 -06:00
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}, \
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2006-01-10 18:48:02 -07:00
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.task_size = DEFAULT_TASK_SIZE, \
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.map_base = DEFAULT_MAP_BASE, \
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.flags = 0 \
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2005-04-16 16:20:36 -06:00
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}
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/*
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* Return saved PC of a blocked thread. This is used by ps mostly.
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*/
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unsigned long thread_saved_pc(struct task_struct *t);
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void show_trace(struct task_struct *task, unsigned long *stack);
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/*
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* Start user thread in another space.
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*
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* Note that we set both the iaoq and r31 to the new pc. When
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* the kernel initially calls execve it will return through an
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* rfi path that will use the values in the iaoq. The execve
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* syscall path will return through the gateway page, and
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* that uses r31 to branch to.
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*
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* For ELF we clear r23, because the dynamic linker uses it to pass
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* the address of the finalizer function.
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*
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* We also initialize sr3 to an illegal value (illegal for our
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* implementation, not for the architecture).
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*/
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typedef unsigned int elf_caddr_t;
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#define start_thread_som(regs, new_pc, new_sp) do { \
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unsigned long *sp = (unsigned long *)new_sp; \
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__u32 spaceid = (__u32)current->mm->context; \
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unsigned long pc = (unsigned long)new_pc; \
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/* offset pc for priv. level */ \
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pc |= 3; \
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\
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set_fs(USER_DS); \
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regs->iasq[0] = spaceid; \
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regs->iasq[1] = spaceid; \
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regs->iaoq[0] = pc; \
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regs->iaoq[1] = pc + 4; \
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regs->sr[2] = LINUX_GATEWAY_SPACE; \
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regs->sr[3] = 0xffff; \
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regs->sr[4] = spaceid; \
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regs->sr[5] = spaceid; \
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regs->sr[6] = spaceid; \
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regs->sr[7] = spaceid; \
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regs->gr[ 0] = USER_PSW; \
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regs->gr[30] = ((new_sp)+63)&~63; \
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regs->gr[31] = pc; \
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\
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get_user(regs->gr[26],&sp[0]); \
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get_user(regs->gr[25],&sp[-1]); \
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get_user(regs->gr[24],&sp[-2]); \
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get_user(regs->gr[23],&sp[-3]); \
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} while(0)
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/* The ELF abi wants things done a "wee bit" differently than
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* som does. Supporting this behavior here avoids
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* having our own version of create_elf_tables.
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*
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* Oh, and yes, that is not a typo, we are really passing argc in r25
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* and argv in r24 (rather than r26 and r25). This is because that's
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* where __libc_start_main wants them.
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*
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* Duplicated from dl-machine.h for the benefit of readers:
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*
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* Our initial stack layout is rather different from everyone else's
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* due to the unique PA-RISC ABI. As far as I know it looks like
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* this:
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----------------------------------- (user startup code creates this frame)
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| 32 bytes of magic |
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|---------------------------------|
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| 32 bytes argument/sp save area |
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|---------------------------------| (bprm->p)
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| ELF auxiliary info |
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| (up to 28 words) |
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|---------------------------------|
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| NULL |
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|---------------------------------|
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| Environment pointers |
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|---------------------------------|
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| NULL |
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|---------------------------------|
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| Argument pointers |
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|---------------------------------| <- argv
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| argc (1 word) |
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|---------------------------------| <- bprm->exec (HACK!)
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| N bytes of slack |
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|---------------------------------|
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| filename passed to execve |
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|---------------------------------| (mm->env_end)
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| env strings |
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|---------------------------------| (mm->env_start, mm->arg_end)
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| arg strings |
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|---------------------------------|
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| additional faked arg strings if |
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| we're invoked via binfmt_script |
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|---------------------------------| (mm->arg_start)
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stack base is at TASK_SIZE - rlim_max.
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on downward growing arches, it looks like this:
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stack base at TASK_SIZE
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| filename passed to execve
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| env strings
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| arg strings
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| faked arg strings
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| slack
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| ELF
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| envps
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| argvs
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| argc
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* The pleasant part of this is that if we need to skip arguments we
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* can just decrement argc and move argv, because the stack pointer
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* is utterly unrelated to the location of the environment and
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* argument vectors.
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*
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* Note that the S/390 people took the easy way out and hacked their
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* GCC to make the stack grow downwards.
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*
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* Final Note: For entry from syscall, the W (wide) bit of the PSW
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* is stuffed into the lowest bit of the user sp (%r30), so we fill
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* it in here from the current->personality
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*/
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#ifdef __LP64__
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#define USER_WIDE_MODE (personality(current->personality) == PER_LINUX)
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#else
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#define USER_WIDE_MODE 0
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#endif
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#define start_thread(regs, new_pc, new_sp) do { \
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elf_addr_t *sp = (elf_addr_t *)new_sp; \
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__u32 spaceid = (__u32)current->mm->context; \
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elf_addr_t pc = (elf_addr_t)new_pc | 3; \
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elf_caddr_t *argv = (elf_caddr_t *)bprm->exec + 1; \
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\
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set_fs(USER_DS); \
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regs->iasq[0] = spaceid; \
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regs->iasq[1] = spaceid; \
|
|
|
|
regs->iaoq[0] = pc; \
|
|
|
|
regs->iaoq[1] = pc + 4; \
|
|
|
|
regs->sr[2] = LINUX_GATEWAY_SPACE; \
|
|
|
|
regs->sr[3] = 0xffff; \
|
|
|
|
regs->sr[4] = spaceid; \
|
|
|
|
regs->sr[5] = spaceid; \
|
|
|
|
regs->sr[6] = spaceid; \
|
|
|
|
regs->sr[7] = spaceid; \
|
|
|
|
regs->gr[ 0] = USER_PSW | (USER_WIDE_MODE ? PSW_W : 0); \
|
|
|
|
regs->fr[ 0] = 0LL; \
|
|
|
|
regs->fr[ 1] = 0LL; \
|
|
|
|
regs->fr[ 2] = 0LL; \
|
|
|
|
regs->fr[ 3] = 0LL; \
|
|
|
|
regs->gr[30] = (((unsigned long)sp + 63) &~ 63) | (USER_WIDE_MODE ? 1 : 0); \
|
|
|
|
regs->gr[31] = pc; \
|
|
|
|
\
|
|
|
|
get_user(regs->gr[25], (argv - 1)); \
|
|
|
|
regs->gr[24] = (long) argv; \
|
|
|
|
regs->gr[23] = 0; \
|
|
|
|
} while(0)
|
|
|
|
|
|
|
|
struct task_struct;
|
|
|
|
struct mm_struct;
|
|
|
|
|
|
|
|
/* Free all resources held by a thread. */
|
|
|
|
extern void release_thread(struct task_struct *);
|
|
|
|
extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
|
|
|
|
|
|
|
|
/* Prepare to copy thread state - unlazy all lazy status */
|
|
|
|
#define prepare_to_copy(tsk) do { } while (0)
|
|
|
|
|
|
|
|
extern void map_hpux_gateway_page(struct task_struct *tsk, struct mm_struct *mm);
|
|
|
|
|
|
|
|
extern unsigned long get_wchan(struct task_struct *p);
|
|
|
|
|
|
|
|
#define KSTK_EIP(tsk) ((tsk)->thread.regs.iaoq[0])
|
|
|
|
#define KSTK_ESP(tsk) ((tsk)->thread.regs.gr[30])
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book.
|
|
|
|
* In addition, many implementations do hardware prefetching of both
|
|
|
|
* instructions and data.
|
|
|
|
*
|
|
|
|
* PA7300LC (page 14-4 of the ERS) also implements prefetching by a load
|
|
|
|
* to gr0 but not in a way that Linux can use. If the load would cause an
|
|
|
|
* interruption (eg due to prefetching 0), it is suppressed on PA2.0
|
|
|
|
* processors, but not on 7300LC.
|
|
|
|
*/
|
|
|
|
#ifdef CONFIG_PREFETCH
|
|
|
|
#define ARCH_HAS_PREFETCH
|
|
|
|
#define ARCH_HAS_PREFETCHW
|
|
|
|
|
|
|
|
extern inline void prefetch(const void *addr)
|
|
|
|
{
|
|
|
|
__asm__("ldw 0(%0), %%r0" : : "r" (addr));
|
|
|
|
}
|
|
|
|
|
|
|
|
extern inline void prefetchw(const void *addr)
|
|
|
|
{
|
|
|
|
__asm__("ldd 0(%0), %%r0" : : "r" (addr));
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#define cpu_relax() barrier()
|
|
|
|
|
|
|
|
#endif /* __ASSEMBLY__ */
|
|
|
|
|
|
|
|
#endif /* __ASM_PARISC_PROCESSOR_H */
|