945 lines
26 KiB
C
945 lines
26 KiB
C
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/* $Id: gpio.c,v 1.12 2004/08/24 07:19:59 starvik Exp $
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*
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* Etrax general port I/O device
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*
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* Copyright (c) 1999, 2000, 2001, 2002 Axis Communications AB
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*
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* Authors: Bjorn Wesen (initial version)
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* Ola Knutsson (LED handling)
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* Johan Adolfsson (read/set directions, write, port G)
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*
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* $Log: gpio.c,v $
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* Revision 1.12 2004/08/24 07:19:59 starvik
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* Whitespace cleanup
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*
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* Revision 1.11 2004/05/14 07:58:03 starvik
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* Merge of changes from 2.4
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*
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* Revision 1.9 2003/09/11 07:29:48 starvik
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* Merge of Linux 2.6.0-test5
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*
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* Revision 1.8 2003/07/04 08:27:37 starvik
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* Merge of Linux 2.5.74
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*
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* Revision 1.7 2003/01/10 07:44:07 starvik
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* init_ioremap is now called by kernel before drivers are initialized
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*
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* Revision 1.6 2002/12/11 13:13:57 starvik
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* Added arch/ to v10 specific includes
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* Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
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*
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* Revision 1.5 2002/11/20 11:56:11 starvik
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* Merge of Linux 2.5.48
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*
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* Revision 1.4 2002/11/18 10:10:05 starvik
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* Linux 2.5 port of latest gpio.c from Linux 2.4
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*
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* Revision 1.20 2002/10/16 21:16:24 johana
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* Added support for PA high level interrupt.
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* That gives 2ms response time with iodtest for high levels and 2-12 ms
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* response time on low levels if the check is not made in
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* process.c:cpu_idle() as well.
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*
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* Revision 1.19 2002/10/14 18:27:33 johana
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* Implemented alarm handling so select() now works.
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* Latency is around 6-9 ms with a etrax_gpio_wake_up_check() in
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* cpu_idle().
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* Otherwise I get 15-18 ms (same as doing the poll in userspace -
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* but less overhead).
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* TODO? Perhaps we should add the check in IMMEDIATE_BH (or whatever it
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* is in 2.4) as well?
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* TODO? Perhaps call request_irq()/free_irq() only when needed?
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* Increased version to 2.5
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*
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* Revision 1.18 2002/10/11 15:02:00 johana
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* Mask inverted 8 bit value in setget_input().
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*
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* Revision 1.17 2002/06/17 15:53:01 johana
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* Added IO_READ_INBITS, IO_READ_OUTBITS, IO_SETGET_INPUT and IO_SETGET_OUTPUT
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* that take a pointer as argument and thus can handle 32 bit ports (G)
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* correctly.
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* These should be used instead of IO_READBITS, IO_SETINPUT and IO_SETOUTPUT.
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* (especially if Port G bit 31 is used)
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*
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* Revision 1.16 2002/06/17 09:59:51 johana
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* Returning 32 bit values in the ioctl return value doesn't work if bit
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* 31 is set (could happen for port G), so mask it of with 0x7FFFFFFF.
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* A new set of ioctl's will be added.
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*
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* Revision 1.15 2002/05/06 13:19:13 johana
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* IO_SETINPUT returns mask with bit set = inputs for PA and PB as well.
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*
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* Revision 1.14 2002/04/12 12:01:53 johana
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* Use global r_port_g_data_shadow.
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* Moved gpio_init_port_g() closer to gpio_init() and marked it __init.
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*
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* Revision 1.13 2002/04/10 12:03:55 johana
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* Added support for port G /dev/gpiog (minor 3).
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* Changed indentation on switch cases.
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* Fixed other spaces to tabs.
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*
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* Revision 1.12 2001/11/12 19:42:15 pkj
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* * Corrected return values from gpio_leds_ioctl().
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* * Fixed compiler warnings.
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*
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* Revision 1.11 2001/10/30 14:39:12 johana
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* Added D() around gpio_write printk.
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*
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* Revision 1.10 2001/10/25 10:24:42 johana
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* Added IO_CFG_WRITE_MODE ioctl and write method that can do fast
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* bittoggling in the kernel. (This speeds up programming an FPGA with 450kB
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* from ~60 seconds to 4 seconds).
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* Added save_flags/cli/restore_flags in ioctl.
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*
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* Revision 1.9 2001/05/04 14:16:07 matsfg
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* Corrected spelling error
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*
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* Revision 1.8 2001/04/27 13:55:26 matsfg
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* Moved initioremap.
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* Turns off all LEDS on init.
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* Added support for shutdown and powerbutton.
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*
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* Revision 1.7 2001/04/04 13:30:08 matsfg
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* Added bitset and bitclear for leds. Calls init_ioremap to set up memmapping
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*
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* Revision 1.6 2001/03/26 16:03:06 bjornw
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* Needs linux/config.h
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*
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* Revision 1.5 2001/03/26 14:22:03 bjornw
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* Namechange of some config options
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*
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* Revision 1.4 2001/02/27 13:52:48 bjornw
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* malloc.h -> slab.h
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*
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* Revision 1.3 2001/01/24 15:06:48 bjornw
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* gpio_wq correct type
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*
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* Revision 1.2 2001/01/18 16:07:30 bjornw
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* 2.4 port
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*
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* Revision 1.1 2001/01/18 15:55:16 bjornw
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* Verbatim copy of etraxgpio.c from elinux 2.0 added
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*
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*
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/ioport.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/string.h>
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#include <linux/poll.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <asm/etraxgpio.h>
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#include <asm/arch/svinto.h>
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#include <asm/io.h>
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#include <asm/system.h>
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#include <asm/irq.h>
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#define GPIO_MAJOR 120 /* experimental MAJOR number */
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#define D(x)
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#if 0
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static int dp_cnt;
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#define DP(x) do { dp_cnt++; if (dp_cnt % 1000 == 0) x; }while(0)
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#else
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#define DP(x)
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#endif
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static char gpio_name[] = "etrax gpio";
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#if 0
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static wait_queue_head_t *gpio_wq;
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#endif
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static int gpio_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg);
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static ssize_t gpio_write(struct file * file, const char * buf, size_t count,
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loff_t *off);
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static int gpio_open(struct inode *inode, struct file *filp);
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static int gpio_release(struct inode *inode, struct file *filp);
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static unsigned int gpio_poll(struct file *filp, struct poll_table_struct *wait);
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/* private data per open() of this driver */
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struct gpio_private {
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struct gpio_private *next;
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/* These fields are for PA and PB only */
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volatile unsigned char *port, *shadow;
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volatile unsigned char *dir, *dir_shadow;
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unsigned char changeable_dir;
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unsigned char changeable_bits;
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unsigned char clk_mask;
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unsigned char data_mask;
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unsigned char write_msb;
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unsigned char pad1, pad2, pad3;
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/* These fields are generic */
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unsigned long highalarm, lowalarm;
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wait_queue_head_t alarm_wq;
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int minor;
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};
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/* linked list of alarms to check for */
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static struct gpio_private *alarmlist = 0;
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static int gpio_some_alarms = 0; /* Set if someone uses alarm */
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static unsigned long gpio_pa_irq_enabled_mask = 0;
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/* Port A and B use 8 bit access, but Port G is 32 bit */
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#define NUM_PORTS (GPIO_MINOR_B+1)
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static volatile unsigned char *ports[NUM_PORTS] = {
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R_PORT_PA_DATA,
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R_PORT_PB_DATA,
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};
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static volatile unsigned char *shads[NUM_PORTS] = {
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&port_pa_data_shadow,
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&port_pb_data_shadow
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};
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/* What direction bits that are user changeable 1=changeable*/
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#ifndef CONFIG_ETRAX_PA_CHANGEABLE_DIR
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#define CONFIG_ETRAX_PA_CHANGEABLE_DIR 0x00
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#endif
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#ifndef CONFIG_ETRAX_PB_CHANGEABLE_DIR
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#define CONFIG_ETRAX_PB_CHANGEABLE_DIR 0x00
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#endif
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#ifndef CONFIG_ETRAX_PA_CHANGEABLE_BITS
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#define CONFIG_ETRAX_PA_CHANGEABLE_BITS 0xFF
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#endif
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#ifndef CONFIG_ETRAX_PB_CHANGEABLE_BITS
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#define CONFIG_ETRAX_PB_CHANGEABLE_BITS 0xFF
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#endif
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static unsigned char changeable_dir[NUM_PORTS] = {
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CONFIG_ETRAX_PA_CHANGEABLE_DIR,
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CONFIG_ETRAX_PB_CHANGEABLE_DIR
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};
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static unsigned char changeable_bits[NUM_PORTS] = {
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CONFIG_ETRAX_PA_CHANGEABLE_BITS,
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CONFIG_ETRAX_PB_CHANGEABLE_BITS
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};
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static volatile unsigned char *dir[NUM_PORTS] = {
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R_PORT_PA_DIR,
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R_PORT_PB_DIR
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};
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static volatile unsigned char *dir_shadow[NUM_PORTS] = {
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&port_pa_dir_shadow,
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&port_pb_dir_shadow
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};
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/* Port G is 32 bit, handle it special, some bits are both inputs
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and outputs at the same time, only some of the bits can change direction
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and some of them in groups of 8 bit. */
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static unsigned long changeable_dir_g;
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static unsigned long dir_g_in_bits;
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static unsigned long dir_g_out_bits;
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static unsigned long dir_g_shadow; /* 1=output */
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#define USE_PORTS(priv) ((priv)->minor <= GPIO_MINOR_B)
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static unsigned int
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gpio_poll(struct file *file,
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poll_table *wait)
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{
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unsigned int mask = 0;
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struct gpio_private *priv = (struct gpio_private *)file->private_data;
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unsigned long data;
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poll_wait(file, &priv->alarm_wq, wait);
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if (priv->minor == GPIO_MINOR_A) {
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unsigned long flags;
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unsigned long tmp;
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data = *R_PORT_PA_DATA;
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/* PA has support for high level interrupt -
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* lets activate for those low and with highalarm set
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*/
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tmp = ~data & priv->highalarm & 0xFF;
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tmp = (tmp << R_IRQ_MASK1_SET__pa0__BITNR);
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save_flags(flags); cli();
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gpio_pa_irq_enabled_mask |= tmp;
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*R_IRQ_MASK1_SET = tmp;
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restore_flags(flags);
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} else if (priv->minor == GPIO_MINOR_B)
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data = *R_PORT_PB_DATA;
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else if (priv->minor == GPIO_MINOR_G)
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data = *R_PORT_G_DATA;
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else
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return 0;
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if ((data & priv->highalarm) ||
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(~data & priv->lowalarm)) {
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mask = POLLIN|POLLRDNORM;
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}
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DP(printk("gpio_poll ready: mask 0x%08X\n", mask));
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return mask;
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}
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int etrax_gpio_wake_up_check(void)
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{
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struct gpio_private *priv = alarmlist;
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unsigned long data = 0;
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int ret = 0;
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while (priv) {
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if (USE_PORTS(priv)) {
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data = *priv->port;
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} else if (priv->minor == GPIO_MINOR_G) {
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data = *R_PORT_G_DATA;
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}
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if ((data & priv->highalarm) ||
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(~data & priv->lowalarm)) {
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DP(printk("etrax_gpio_wake_up_check %i\n",priv->minor));
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wake_up_interruptible(&priv->alarm_wq);
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ret = 1;
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}
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priv = priv->next;
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}
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return ret;
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}
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static irqreturn_t
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gpio_poll_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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if (gpio_some_alarms) {
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etrax_gpio_wake_up_check();
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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static irqreturn_t
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gpio_pa_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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unsigned long tmp;
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/* Find what PA interrupts are active */
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tmp = (*R_IRQ_READ1);
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/* Find those that we have enabled */
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tmp &= gpio_pa_irq_enabled_mask;
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/* Clear them.. */
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*R_IRQ_MASK1_CLR = tmp;
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gpio_pa_irq_enabled_mask &= ~tmp;
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if (gpio_some_alarms) {
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return IRQ_RETVAL(etrax_gpio_wake_up_check());
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}
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return IRQ_NONE;
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}
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static ssize_t gpio_write(struct file * file, const char * buf, size_t count,
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loff_t *off)
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{
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struct gpio_private *priv = (struct gpio_private *)file->private_data;
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unsigned char data, clk_mask, data_mask, write_msb;
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unsigned long flags;
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ssize_t retval = count;
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if (priv->minor !=GPIO_MINOR_A && priv->minor != GPIO_MINOR_B) {
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return -EFAULT;
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}
|
||
|
|
|
||
|
|
if (!access_ok(VERIFY_READ, buf, count)) {
|
||
|
|
return -EFAULT;
|
||
|
|
}
|
||
|
|
clk_mask = priv->clk_mask;
|
||
|
|
data_mask = priv->data_mask;
|
||
|
|
/* It must have been configured using the IO_CFG_WRITE_MODE */
|
||
|
|
/* Perhaps a better error code? */
|
||
|
|
if (clk_mask == 0 || data_mask == 0) {
|
||
|
|
return -EPERM;
|
||
|
|
}
|
||
|
|
write_msb = priv->write_msb;
|
||
|
|
D(printk("gpio_write: %lu to data 0x%02X clk 0x%02X msb: %i\n",count, data_mask, clk_mask, write_msb));
|
||
|
|
while (count--) {
|
||
|
|
int i;
|
||
|
|
data = *buf++;
|
||
|
|
if (priv->write_msb) {
|
||
|
|
for (i = 7; i >= 0;i--) {
|
||
|
|
local_irq_save(flags); local_irq_disable();
|
||
|
|
*priv->port = *priv->shadow &= ~clk_mask;
|
||
|
|
if (data & 1<<i)
|
||
|
|
*priv->port = *priv->shadow |= data_mask;
|
||
|
|
else
|
||
|
|
*priv->port = *priv->shadow &= ~data_mask;
|
||
|
|
/* For FPGA: min 5.0ns (DCC) before CCLK high */
|
||
|
|
*priv->port = *priv->shadow |= clk_mask;
|
||
|
|
local_irq_restore(flags);
|
||
|
|
}
|
||
|
|
} else {
|
||
|
|
for (i = 0; i <= 7;i++) {
|
||
|
|
local_irq_save(flags); local_irq_disable();
|
||
|
|
*priv->port = *priv->shadow &= ~clk_mask;
|
||
|
|
if (data & 1<<i)
|
||
|
|
*priv->port = *priv->shadow |= data_mask;
|
||
|
|
else
|
||
|
|
*priv->port = *priv->shadow &= ~data_mask;
|
||
|
|
/* For FPGA: min 5.0ns (DCC) before CCLK high */
|
||
|
|
*priv->port = *priv->shadow |= clk_mask;
|
||
|
|
local_irq_restore(flags);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
return retval;
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
static int
|
||
|
|
gpio_open(struct inode *inode, struct file *filp)
|
||
|
|
{
|
||
|
|
struct gpio_private *priv;
|
||
|
|
int p = MINOR(inode->i_rdev);
|
||
|
|
|
||
|
|
if (p > GPIO_MINOR_LAST)
|
||
|
|
return -EINVAL;
|
||
|
|
|
||
|
|
priv = (struct gpio_private *)kmalloc(sizeof(struct gpio_private),
|
||
|
|
GFP_KERNEL);
|
||
|
|
|
||
|
|
if (!priv)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
priv->minor = p;
|
||
|
|
|
||
|
|
/* initialize the io/alarm struct and link it into our alarmlist */
|
||
|
|
|
||
|
|
priv->next = alarmlist;
|
||
|
|
alarmlist = priv;
|
||
|
|
if (USE_PORTS(priv)) { /* A and B */
|
||
|
|
priv->port = ports[p];
|
||
|
|
priv->shadow = shads[p];
|
||
|
|
priv->dir = dir[p];
|
||
|
|
priv->dir_shadow = dir_shadow[p];
|
||
|
|
priv->changeable_dir = changeable_dir[p];
|
||
|
|
priv->changeable_bits = changeable_bits[p];
|
||
|
|
} else {
|
||
|
|
priv->port = NULL;
|
||
|
|
priv->shadow = NULL;
|
||
|
|
priv->dir = NULL;
|
||
|
|
priv->dir_shadow = NULL;
|
||
|
|
priv->changeable_dir = 0;
|
||
|
|
priv->changeable_bits = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
priv->highalarm = 0;
|
||
|
|
priv->lowalarm = 0;
|
||
|
|
priv->clk_mask = 0;
|
||
|
|
priv->data_mask = 0;
|
||
|
|
init_waitqueue_head(&priv->alarm_wq);
|
||
|
|
|
||
|
|
filp->private_data = (void *)priv;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int
|
||
|
|
gpio_release(struct inode *inode, struct file *filp)
|
||
|
|
{
|
||
|
|
struct gpio_private *p = alarmlist;
|
||
|
|
struct gpio_private *todel = (struct gpio_private *)filp->private_data;
|
||
|
|
|
||
|
|
/* unlink from alarmlist and free the private structure */
|
||
|
|
|
||
|
|
if (p == todel) {
|
||
|
|
alarmlist = todel->next;
|
||
|
|
} else {
|
||
|
|
while (p->next != todel)
|
||
|
|
p = p->next;
|
||
|
|
p->next = todel->next;
|
||
|
|
}
|
||
|
|
|
||
|
|
kfree(todel);
|
||
|
|
/* Check if there are still any alarms set */
|
||
|
|
p = alarmlist;
|
||
|
|
while (p) {
|
||
|
|
if (p->highalarm | p->lowalarm) {
|
||
|
|
gpio_some_alarms = 1;
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
p = p->next;
|
||
|
|
}
|
||
|
|
gpio_some_alarms = 0;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Main device API. ioctl's to read/set/clear bits, as well as to
|
||
|
|
* set alarms to wait for using a subsequent select().
|
||
|
|
*/
|
||
|
|
|
||
|
|
unsigned long inline setget_input(struct gpio_private *priv, unsigned long arg)
|
||
|
|
{
|
||
|
|
/* Set direction 0=unchanged 1=input,
|
||
|
|
* return mask with 1=input
|
||
|
|
*/
|
||
|
|
unsigned long flags;
|
||
|
|
if (USE_PORTS(priv)) {
|
||
|
|
local_irq_save(flags); local_irq_disable();
|
||
|
|
*priv->dir = *priv->dir_shadow &=
|
||
|
|
~((unsigned char)arg & priv->changeable_dir);
|
||
|
|
local_irq_restore(flags);
|
||
|
|
return ~(*priv->dir_shadow) & 0xFF; /* Only 8 bits */
|
||
|
|
} else if (priv->minor == GPIO_MINOR_G) {
|
||
|
|
/* We must fiddle with R_GEN_CONFIG to change dir */
|
||
|
|
save_flags(flags); cli();
|
||
|
|
if (((arg & dir_g_in_bits) != arg) &&
|
||
|
|
(arg & changeable_dir_g)) {
|
||
|
|
arg &= changeable_dir_g;
|
||
|
|
/* Clear bits in genconfig to set to input */
|
||
|
|
if (arg & (1<<0)) {
|
||
|
|
genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG,g0dir);
|
||
|
|
dir_g_in_bits |= (1<<0);
|
||
|
|
dir_g_out_bits &= ~(1<<0);
|
||
|
|
}
|
||
|
|
if ((arg & 0x0000FF00) == 0x0000FF00) {
|
||
|
|
genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG,g8_15dir);
|
||
|
|
dir_g_in_bits |= 0x0000FF00;
|
||
|
|
dir_g_out_bits &= ~0x0000FF00;
|
||
|
|
}
|
||
|
|
if ((arg & 0x00FF0000) == 0x00FF0000) {
|
||
|
|
genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG,g16_23dir);
|
||
|
|
dir_g_in_bits |= 0x00FF0000;
|
||
|
|
dir_g_out_bits &= ~0x00FF0000;
|
||
|
|
}
|
||
|
|
if (arg & (1<<24)) {
|
||
|
|
genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG,g24dir);
|
||
|
|
dir_g_in_bits |= (1<<24);
|
||
|
|
dir_g_out_bits &= ~(1<<24);
|
||
|
|
}
|
||
|
|
D(printk(KERN_INFO "gpio: SETINPUT on port G set "
|
||
|
|
"genconfig to 0x%08lX "
|
||
|
|
"in_bits: 0x%08lX "
|
||
|
|
"out_bits: 0x%08lX\n",
|
||
|
|
(unsigned long)genconfig_shadow,
|
||
|
|
dir_g_in_bits, dir_g_out_bits));
|
||
|
|
*R_GEN_CONFIG = genconfig_shadow;
|
||
|
|
/* Must be a >120 ns delay before writing this again */
|
||
|
|
|
||
|
|
}
|
||
|
|
restore_flags(flags);
|
||
|
|
return dir_g_in_bits;
|
||
|
|
}
|
||
|
|
return 0;
|
||
|
|
} /* setget_input */
|
||
|
|
|
||
|
|
unsigned long inline setget_output(struct gpio_private *priv, unsigned long arg)
|
||
|
|
{
|
||
|
|
unsigned long flags;
|
||
|
|
if (USE_PORTS(priv)) {
|
||
|
|
local_irq_save(flags); local_irq_disable();
|
||
|
|
*priv->dir = *priv->dir_shadow |=
|
||
|
|
((unsigned char)arg & priv->changeable_dir);
|
||
|
|
local_irq_restore(flags);
|
||
|
|
return *priv->dir_shadow;
|
||
|
|
} else if (priv->minor == GPIO_MINOR_G) {
|
||
|
|
/* We must fiddle with R_GEN_CONFIG to change dir */
|
||
|
|
save_flags(flags); cli();
|
||
|
|
if (((arg & dir_g_out_bits) != arg) &&
|
||
|
|
(arg & changeable_dir_g)) {
|
||
|
|
/* Set bits in genconfig to set to output */
|
||
|
|
if (arg & (1<<0)) {
|
||
|
|
genconfig_shadow |= IO_MASK(R_GEN_CONFIG,g0dir);
|
||
|
|
dir_g_out_bits |= (1<<0);
|
||
|
|
dir_g_in_bits &= ~(1<<0);
|
||
|
|
}
|
||
|
|
if ((arg & 0x0000FF00) == 0x0000FF00) {
|
||
|
|
genconfig_shadow |= IO_MASK(R_GEN_CONFIG,g8_15dir);
|
||
|
|
dir_g_out_bits |= 0x0000FF00;
|
||
|
|
dir_g_in_bits &= ~0x0000FF00;
|
||
|
|
}
|
||
|
|
if ((arg & 0x00FF0000) == 0x00FF0000) {
|
||
|
|
genconfig_shadow |= IO_MASK(R_GEN_CONFIG,g16_23dir);
|
||
|
|
dir_g_out_bits |= 0x00FF0000;
|
||
|
|
dir_g_in_bits &= ~0x00FF0000;
|
||
|
|
}
|
||
|
|
if (arg & (1<<24)) {
|
||
|
|
genconfig_shadow |= IO_MASK(R_GEN_CONFIG,g24dir);
|
||
|
|
dir_g_out_bits |= (1<<24);
|
||
|
|
dir_g_in_bits &= ~(1<<24);
|
||
|
|
}
|
||
|
|
D(printk(KERN_INFO "gpio: SETOUTPUT on port G set "
|
||
|
|
"genconfig to 0x%08lX "
|
||
|
|
"in_bits: 0x%08lX "
|
||
|
|
"out_bits: 0x%08lX\n",
|
||
|
|
(unsigned long)genconfig_shadow,
|
||
|
|
dir_g_in_bits, dir_g_out_bits));
|
||
|
|
*R_GEN_CONFIG = genconfig_shadow;
|
||
|
|
/* Must be a >120 ns delay before writing this again */
|
||
|
|
}
|
||
|
|
restore_flags(flags);
|
||
|
|
return dir_g_out_bits & 0x7FFFFFFF;
|
||
|
|
}
|
||
|
|
return 0;
|
||
|
|
} /* setget_output */
|
||
|
|
|
||
|
|
static int
|
||
|
|
gpio_leds_ioctl(unsigned int cmd, unsigned long arg);
|
||
|
|
|
||
|
|
static int
|
||
|
|
gpio_ioctl(struct inode *inode, struct file *file,
|
||
|
|
unsigned int cmd, unsigned long arg)
|
||
|
|
{
|
||
|
|
unsigned long flags;
|
||
|
|
unsigned long val;
|
||
|
|
struct gpio_private *priv = (struct gpio_private *)file->private_data;
|
||
|
|
if (_IOC_TYPE(cmd) != ETRAXGPIO_IOCTYPE) {
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
|
||
|
|
switch (_IOC_NR(cmd)) {
|
||
|
|
case IO_READBITS: /* Use IO_READ_INBITS and IO_READ_OUTBITS instead */
|
||
|
|
// read the port
|
||
|
|
if (USE_PORTS(priv)) {
|
||
|
|
return *priv->port;
|
||
|
|
} else if (priv->minor == GPIO_MINOR_G) {
|
||
|
|
return (*R_PORT_G_DATA) & 0x7FFFFFFF;
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
case IO_SETBITS:
|
||
|
|
local_irq_save(flags); local_irq_disable();
|
||
|
|
// set changeable bits with a 1 in arg
|
||
|
|
if (USE_PORTS(priv)) {
|
||
|
|
*priv->port = *priv->shadow |=
|
||
|
|
((unsigned char)arg & priv->changeable_bits);
|
||
|
|
} else if (priv->minor == GPIO_MINOR_G) {
|
||
|
|
*R_PORT_G_DATA = port_g_data_shadow |= (arg & dir_g_out_bits);
|
||
|
|
}
|
||
|
|
local_irq_restore(flags);
|
||
|
|
break;
|
||
|
|
case IO_CLRBITS:
|
||
|
|
local_irq_save(flags); local_irq_disable();
|
||
|
|
// clear changeable bits with a 1 in arg
|
||
|
|
if (USE_PORTS(priv)) {
|
||
|
|
*priv->port = *priv->shadow &=
|
||
|
|
~((unsigned char)arg & priv->changeable_bits);
|
||
|
|
} else if (priv->minor == GPIO_MINOR_G) {
|
||
|
|
*R_PORT_G_DATA = port_g_data_shadow &= ~((unsigned long)arg & dir_g_out_bits);
|
||
|
|
}
|
||
|
|
local_irq_restore(flags);
|
||
|
|
break;
|
||
|
|
case IO_HIGHALARM:
|
||
|
|
// set alarm when bits with 1 in arg go high
|
||
|
|
priv->highalarm |= arg;
|
||
|
|
gpio_some_alarms = 1;
|
||
|
|
break;
|
||
|
|
case IO_LOWALARM:
|
||
|
|
// set alarm when bits with 1 in arg go low
|
||
|
|
priv->lowalarm |= arg;
|
||
|
|
gpio_some_alarms = 1;
|
||
|
|
break;
|
||
|
|
case IO_CLRALARM:
|
||
|
|
// clear alarm for bits with 1 in arg
|
||
|
|
priv->highalarm &= ~arg;
|
||
|
|
priv->lowalarm &= ~arg;
|
||
|
|
{
|
||
|
|
/* Must update gpio_some_alarms */
|
||
|
|
struct gpio_private *p = alarmlist;
|
||
|
|
int some_alarms;
|
||
|
|
some_alarms = 0;
|
||
|
|
while (p) {
|
||
|
|
if (p->highalarm | p->lowalarm) {
|
||
|
|
some_alarms = 1;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
p = p->next;
|
||
|
|
}
|
||
|
|
gpio_some_alarms = some_alarms;
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
case IO_READDIR: /* Use IO_SETGET_INPUT/OUTPUT instead! */
|
||
|
|
/* Read direction 0=input 1=output */
|
||
|
|
if (USE_PORTS(priv)) {
|
||
|
|
return *priv->dir_shadow;
|
||
|
|
} else if (priv->minor == GPIO_MINOR_G) {
|
||
|
|
/* Note: Some bits are both in and out,
|
||
|
|
* Those that are dual is set here as well.
|
||
|
|
*/
|
||
|
|
return (dir_g_shadow | dir_g_out_bits) & 0x7FFFFFFF;
|
||
|
|
}
|
||
|
|
case IO_SETINPUT: /* Use IO_SETGET_INPUT instead! */
|
||
|
|
/* Set direction 0=unchanged 1=input,
|
||
|
|
* return mask with 1=input
|
||
|
|
*/
|
||
|
|
return setget_input(priv, arg) & 0x7FFFFFFF;
|
||
|
|
break;
|
||
|
|
case IO_SETOUTPUT: /* Use IO_SETGET_OUTPUT instead! */
|
||
|
|
/* Set direction 0=unchanged 1=output,
|
||
|
|
* return mask with 1=output
|
||
|
|
*/
|
||
|
|
return setget_output(priv, arg) & 0x7FFFFFFF;
|
||
|
|
|
||
|
|
case IO_SHUTDOWN:
|
||
|
|
SOFT_SHUTDOWN();
|
||
|
|
break;
|
||
|
|
case IO_GET_PWR_BT:
|
||
|
|
#if defined (CONFIG_ETRAX_SOFT_SHUTDOWN)
|
||
|
|
return (*R_PORT_G_DATA & ( 1 << CONFIG_ETRAX_POWERBUTTON_BIT));
|
||
|
|
#else
|
||
|
|
return 0;
|
||
|
|
#endif
|
||
|
|
break;
|
||
|
|
case IO_CFG_WRITE_MODE:
|
||
|
|
priv->clk_mask = arg & 0xFF;
|
||
|
|
priv->data_mask = (arg >> 8) & 0xFF;
|
||
|
|
priv->write_msb = (arg >> 16) & 0x01;
|
||
|
|
/* Check if we're allowed to change the bits and
|
||
|
|
* the direction is correct
|
||
|
|
*/
|
||
|
|
if (!((priv->clk_mask & priv->changeable_bits) &&
|
||
|
|
(priv->data_mask & priv->changeable_bits) &&
|
||
|
|
(priv->clk_mask & *priv->dir_shadow) &&
|
||
|
|
(priv->data_mask & *priv->dir_shadow)))
|
||
|
|
{
|
||
|
|
priv->clk_mask = 0;
|
||
|
|
priv->data_mask = 0;
|
||
|
|
return -EPERM;
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
case IO_READ_INBITS:
|
||
|
|
/* *arg is result of reading the input pins */
|
||
|
|
if (USE_PORTS(priv)) {
|
||
|
|
val = *priv->port;
|
||
|
|
} else if (priv->minor == GPIO_MINOR_G) {
|
||
|
|
val = *R_PORT_G_DATA;
|
||
|
|
}
|
||
|
|
if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
|
||
|
|
return -EFAULT;
|
||
|
|
return 0;
|
||
|
|
break;
|
||
|
|
case IO_READ_OUTBITS:
|
||
|
|
/* *arg is result of reading the output shadow */
|
||
|
|
if (USE_PORTS(priv)) {
|
||
|
|
val = *priv->shadow;
|
||
|
|
} else if (priv->minor == GPIO_MINOR_G) {
|
||
|
|
val = port_g_data_shadow;
|
||
|
|
}
|
||
|
|
if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
|
||
|
|
return -EFAULT;
|
||
|
|
break;
|
||
|
|
case IO_SETGET_INPUT:
|
||
|
|
/* bits set in *arg is set to input,
|
||
|
|
* *arg updated with current input pins.
|
||
|
|
*/
|
||
|
|
if (copy_from_user(&val, (unsigned long*)arg, sizeof(val)))
|
||
|
|
return -EFAULT;
|
||
|
|
val = setget_input(priv, val);
|
||
|
|
if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
|
||
|
|
return -EFAULT;
|
||
|
|
break;
|
||
|
|
case IO_SETGET_OUTPUT:
|
||
|
|
/* bits set in *arg is set to output,
|
||
|
|
* *arg updated with current output pins.
|
||
|
|
*/
|
||
|
|
if (copy_from_user(&val, (unsigned long*)arg, sizeof(val)))
|
||
|
|
return -EFAULT;
|
||
|
|
val = setget_output(priv, val);
|
||
|
|
if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
|
||
|
|
return -EFAULT;
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
if (priv->minor == GPIO_MINOR_LEDS)
|
||
|
|
return gpio_leds_ioctl(cmd, arg);
|
||
|
|
else
|
||
|
|
return -EINVAL;
|
||
|
|
} /* switch */
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int
|
||
|
|
gpio_leds_ioctl(unsigned int cmd, unsigned long arg)
|
||
|
|
{
|
||
|
|
unsigned char green;
|
||
|
|
unsigned char red;
|
||
|
|
|
||
|
|
switch (_IOC_NR(cmd)) {
|
||
|
|
case IO_LEDACTIVE_SET:
|
||
|
|
green = ((unsigned char) arg) & 1;
|
||
|
|
red = (((unsigned char) arg) >> 1) & 1;
|
||
|
|
LED_ACTIVE_SET_G(green);
|
||
|
|
LED_ACTIVE_SET_R(red);
|
||
|
|
break;
|
||
|
|
|
||
|
|
case IO_LED_SETBIT:
|
||
|
|
LED_BIT_SET(arg);
|
||
|
|
break;
|
||
|
|
|
||
|
|
case IO_LED_CLRBIT:
|
||
|
|
LED_BIT_CLR(arg);
|
||
|
|
break;
|
||
|
|
|
||
|
|
default:
|
||
|
|
return -EINVAL;
|
||
|
|
} /* switch */
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
struct file_operations gpio_fops = {
|
||
|
|
.owner = THIS_MODULE,
|
||
|
|
.poll = gpio_poll,
|
||
|
|
.ioctl = gpio_ioctl,
|
||
|
|
.write = gpio_write,
|
||
|
|
.open = gpio_open,
|
||
|
|
.release = gpio_release,
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
static void __init gpio_init_port_g(void)
|
||
|
|
{
|
||
|
|
#define GROUPA (0x0000FF3F)
|
||
|
|
#define GROUPB (1<<6 | 1<<7)
|
||
|
|
#define GROUPC (1<<30 | 1<<31)
|
||
|
|
#define GROUPD (0x3FFF0000)
|
||
|
|
#define GROUPD_LOW (0x00FF0000)
|
||
|
|
unsigned long used_in_bits = 0;
|
||
|
|
unsigned long used_out_bits = 0;
|
||
|
|
if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, scsi0, select)){
|
||
|
|
used_in_bits |= GROUPA | GROUPB | 0 | 0;
|
||
|
|
used_out_bits |= GROUPA | GROUPB | 0 | 0;
|
||
|
|
}
|
||
|
|
if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, ata, select)) {
|
||
|
|
used_in_bits |= GROUPA | GROUPB | GROUPC | (GROUPD & ~(1<<25|1<<26));
|
||
|
|
used_out_bits |= GROUPA | GROUPB | GROUPC | GROUPD;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, par0, select)) {
|
||
|
|
used_in_bits |= (GROUPA & ~(1<<0)) | 0 | 0 | 0;
|
||
|
|
used_out_bits |= (GROUPA & ~(1<<0)) | 0 | 0 | 0;
|
||
|
|
}
|
||
|
|
if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, ser2, select)) {
|
||
|
|
used_in_bits |= 0 | GROUPB | 0 | 0;
|
||
|
|
used_out_bits |= 0 | GROUPB | 0 | 0;
|
||
|
|
}
|
||
|
|
/* mio same as shared RAM ? */
|
||
|
|
if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, mio, select)) {
|
||
|
|
used_in_bits |= (GROUPA & ~(1<<0)) | 0 |0 |GROUPD_LOW;
|
||
|
|
used_out_bits |= (GROUPA & ~(1<<0|1<<1|1<<2)) | 0 |0 |GROUPD_LOW;
|
||
|
|
}
|
||
|
|
if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, scsi1, select)) {
|
||
|
|
used_in_bits |= 0 | 0 | GROUPC | GROUPD;
|
||
|
|
used_out_bits |= 0 | 0 | GROUPC | GROUPD;
|
||
|
|
}
|
||
|
|
if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, scsi0w, select)) {
|
||
|
|
used_in_bits |= GROUPA | GROUPB | 0 | (GROUPD_LOW | 1<<24);
|
||
|
|
used_out_bits |= GROUPA | GROUPB | 0 | (GROUPD_LOW | 1<<24 | 1<<25|1<<26);
|
||
|
|
}
|
||
|
|
|
||
|
|
if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, par1, select)) {
|
||
|
|
used_in_bits |= 0 | 0 | 0 | (GROUPD & ~(1<<24));
|
||
|
|
used_out_bits |= 0 | 0 | 0 | (GROUPD & ~(1<<24));
|
||
|
|
}
|
||
|
|
if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, ser3, select)) {
|
||
|
|
used_in_bits |= 0 | 0 | GROUPC | 0;
|
||
|
|
used_out_bits |= 0 | 0 | GROUPC | 0;
|
||
|
|
}
|
||
|
|
/* mio same as shared RAM-W? */
|
||
|
|
if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, mio_w, select)) {
|
||
|
|
used_in_bits |= (GROUPA & ~(1<<0)) | 0 | 0 |GROUPD_LOW;
|
||
|
|
used_out_bits |= (GROUPA & ~(1<<0|1<<1|1<<2)) | 0 | 0 |GROUPD_LOW;
|
||
|
|
}
|
||
|
|
/* TODO: USB p2, parw, sync ser3? */
|
||
|
|
|
||
|
|
/* Initialise the dir_g_shadow etc. depending on genconfig */
|
||
|
|
/* 0=input 1=output */
|
||
|
|
if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, g0dir, out))
|
||
|
|
dir_g_shadow |= (1 << 0);
|
||
|
|
if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, g8_15dir, out))
|
||
|
|
dir_g_shadow |= 0x0000FF00;
|
||
|
|
if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, g16_23dir, out))
|
||
|
|
dir_g_shadow |= 0x00FF0000;
|
||
|
|
if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, g24dir, out))
|
||
|
|
dir_g_shadow |= (1 << 24);
|
||
|
|
|
||
|
|
dir_g_in_bits = ~used_in_bits;
|
||
|
|
dir_g_out_bits = ~used_out_bits;
|
||
|
|
|
||
|
|
changeable_dir_g = 0x01FFFF01; /* all that can change dir */
|
||
|
|
changeable_dir_g &= dir_g_out_bits;
|
||
|
|
changeable_dir_g &= dir_g_in_bits;
|
||
|
|
/* Correct the bits that can change direction */
|
||
|
|
dir_g_out_bits &= ~changeable_dir_g;
|
||
|
|
dir_g_out_bits |= dir_g_shadow;
|
||
|
|
dir_g_in_bits &= ~changeable_dir_g;
|
||
|
|
dir_g_in_bits |= (~dir_g_shadow & changeable_dir_g);
|
||
|
|
|
||
|
|
|
||
|
|
printk(KERN_INFO "GPIO port G: in_bits: 0x%08lX out_bits: 0x%08lX val: %08lX\n",
|
||
|
|
dir_g_in_bits, dir_g_out_bits, (unsigned long)*R_PORT_G_DATA);
|
||
|
|
printk(KERN_INFO "GPIO port G: dir: %08lX changeable: %08lX\n",
|
||
|
|
dir_g_shadow, changeable_dir_g);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* main driver initialization routine, called from mem.c */
|
||
|
|
|
||
|
|
static __init int
|
||
|
|
gpio_init(void)
|
||
|
|
{
|
||
|
|
int res;
|
||
|
|
#if defined (CONFIG_ETRAX_CSP0_LEDS)
|
||
|
|
int i;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/* do the formalities */
|
||
|
|
|
||
|
|
res = register_chrdev(GPIO_MAJOR, gpio_name, &gpio_fops);
|
||
|
|
if (res < 0) {
|
||
|
|
printk(KERN_ERR "gpio: couldn't get a major number.\n");
|
||
|
|
return res;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Clear all leds */
|
||
|
|
#if defined (CONFIG_ETRAX_CSP0_LEDS) || defined (CONFIG_ETRAX_PA_LEDS) || defined (CONFIG_ETRAX_PB_LEDS)
|
||
|
|
LED_NETWORK_SET(0);
|
||
|
|
LED_ACTIVE_SET(0);
|
||
|
|
LED_DISK_READ(0);
|
||
|
|
LED_DISK_WRITE(0);
|
||
|
|
|
||
|
|
#if defined (CONFIG_ETRAX_CSP0_LEDS)
|
||
|
|
for (i = 0; i < 32; i++) {
|
||
|
|
LED_BIT_SET(i);
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif
|
||
|
|
gpio_init_port_g();
|
||
|
|
printk(KERN_INFO "ETRAX 100LX GPIO driver v2.5, (c) 2001, 2002 Axis Communications AB\n");
|
||
|
|
/* We call etrax_gpio_wake_up_check() from timer interrupt and
|
||
|
|
* from cpu_idle() in kernel/process.c
|
||
|
|
* The check in cpu_idle() reduces latency from ~15 ms to ~6 ms
|
||
|
|
* in some tests.
|
||
|
|
*/
|
||
|
|
if (request_irq(TIMER0_IRQ_NBR, gpio_poll_timer_interrupt,
|
||
|
|
SA_SHIRQ | SA_INTERRUPT,"gpio poll", NULL)) {
|
||
|
|
printk(KERN_CRIT "err: timer0 irq for gpio\n");
|
||
|
|
}
|
||
|
|
if (request_irq(PA_IRQ_NBR, gpio_pa_interrupt,
|
||
|
|
SA_SHIRQ | SA_INTERRUPT,"gpio PA", NULL)) {
|
||
|
|
printk(KERN_CRIT "err: PA irq for gpio\n");
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
return res;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* this makes sure that gpio_init is called during kernel boot */
|
||
|
|
|
||
|
|
module_init(gpio_init);
|