2007-05-08 19:00:38 -06:00
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/*
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* Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
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2008-07-25 11:32:52 -06:00
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* Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
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2007-05-08 19:00:38 -06:00
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef MLX4_IB_H
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#define MLX4_IB_H
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#include <linux/compiler.h>
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#include <linux/list.h>
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2007-06-10 23:56:10 -06:00
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#include <linux/mutex.h>
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2007-05-08 19:00:38 -06:00
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#include <rdma/ib_verbs.h>
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#include <rdma/ib_umem.h>
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#include <linux/mlx4/device.h>
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#include <linux/mlx4/doorbell.h>
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struct mlx4_ib_ucontext {
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struct ib_ucontext ibucontext;
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struct mlx4_uar uar;
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struct list_head db_page_list;
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struct mutex db_page_mutex;
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};
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struct mlx4_ib_pd {
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struct ib_pd ibpd;
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u32 pdn;
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};
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struct mlx4_ib_cq_buf {
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struct mlx4_buf buf;
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struct mlx4_mtt mtt;
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};
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2008-04-16 22:09:33 -06:00
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struct mlx4_ib_cq_resize {
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struct mlx4_ib_cq_buf buf;
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int cqe;
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};
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2007-05-08 19:00:38 -06:00
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struct mlx4_ib_cq {
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struct ib_cq ibcq;
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struct mlx4_cq mcq;
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struct mlx4_ib_cq_buf buf;
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2008-04-16 22:09:33 -06:00
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struct mlx4_ib_cq_resize *resize_buf;
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2008-04-23 12:55:45 -06:00
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struct mlx4_db db;
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2007-05-08 19:00:38 -06:00
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spinlock_t lock;
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2008-04-16 22:09:33 -06:00
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struct mutex resize_mutex;
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2007-05-08 19:00:38 -06:00
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struct ib_umem *umem;
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2008-04-16 22:09:33 -06:00
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struct ib_umem *resize_umem;
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2007-05-08 19:00:38 -06:00
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};
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struct mlx4_ib_mr {
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struct ib_mr ibmr;
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struct mlx4_mr mmr;
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struct ib_umem *umem;
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};
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2008-07-23 09:12:26 -06:00
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struct mlx4_ib_fast_reg_page_list {
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struct ib_fast_reg_page_list ibfrpl;
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2009-05-07 22:35:13 -06:00
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__be64 *mapped_page_list;
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2008-07-23 09:12:26 -06:00
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dma_addr_t map;
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};
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2007-08-01 03:29:05 -06:00
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struct mlx4_ib_fmr {
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struct ib_fmr ibfmr;
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struct mlx4_fmr mfmr;
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};
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2007-05-08 19:00:38 -06:00
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struct mlx4_ib_wq {
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u64 *wrid;
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spinlock_t lock;
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2007-06-18 09:13:48 -06:00
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int wqe_cnt;
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int max_post;
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2007-05-08 19:00:38 -06:00
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int max_gs;
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int offset;
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int wqe_shift;
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unsigned head;
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unsigned tail;
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};
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2008-04-16 22:09:27 -06:00
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enum mlx4_ib_qp_flags {
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2008-07-15 00:48:48 -06:00
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MLX4_IB_QP_LSO = 1 << 0,
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MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = 1 << 1,
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2008-04-16 22:09:27 -06:00
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};
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2007-05-08 19:00:38 -06:00
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struct mlx4_ib_qp {
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struct ib_qp ibqp;
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struct mlx4_qp mqp;
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struct mlx4_buf buf;
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2008-04-23 12:55:45 -06:00
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struct mlx4_db db;
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2007-05-08 19:00:38 -06:00
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struct mlx4_ib_wq rq;
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u32 doorbell_qpn;
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__be32 sq_signal_bits;
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IB/mlx4: Use multiple WQ blocks to post smaller send WQEs
ConnectX HCA supports shrinking WQEs, so that a single work request
can be made of multiple units of wqe_shift. This way, WRs can differ
in size, and do not have to be a power of 2 in size, saving memory and
speeding up send WR posting. Unfortunately, if we do this then the
wqe_index field in CQEs can't be used to look up the WR ID anymore, so
our implementation does this only if selective signaling is off.
Further, on 32-bit platforms, we can't use vmap() to make the QP
buffer virtually contigious. Thus we have to use constant-sized WRs to
make sure a WR is always fully within a single page-sized chunk.
Finally, we use WRs with the NOP opcode to avoid wrapping around the
queue buffer in the middle of posting a WR, and we set the
NoErrorCompletion bit to avoid getting completions with error for NOP
WRs. However, NEC is only supported starting with firmware 2.2.232,
so we use constant-sized WRs for older firmware. And, since MLX QPs
only support SEND, we use constant-sized WRs in this case.
When stamping during NOP posting, do stamping following setting of the
NOP WQE valid bit.
Signed-off-by: Michael S. Tsirkin <mst@dev.mellanox.co.il>
Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
2008-01-28 01:40:59 -07:00
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unsigned sq_next_wqe;
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int sq_max_wqes_per_wr;
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2007-06-18 09:13:48 -06:00
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int sq_spare_wqes;
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2007-05-08 19:00:38 -06:00
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struct mlx4_ib_wq sq;
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struct ib_umem *umem;
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struct mlx4_mtt mtt;
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int buf_size;
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struct mutex mutex;
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2008-04-16 22:09:27 -06:00
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u32 flags;
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2007-05-08 19:00:38 -06:00
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u8 port;
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u8 alt_port;
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u8 atomic_rd_en;
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u8 resp_depth;
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2007-06-18 09:13:48 -06:00
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u8 sq_no_prefetch;
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2007-05-08 19:00:38 -06:00
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u8 state;
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};
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struct mlx4_ib_srq {
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struct ib_srq ibsrq;
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struct mlx4_srq msrq;
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struct mlx4_buf buf;
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2008-04-23 12:55:45 -06:00
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struct mlx4_db db;
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2007-05-08 19:00:38 -06:00
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u64 *wrid;
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spinlock_t lock;
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int head;
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int tail;
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u16 wqe_ctr;
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struct ib_umem *umem;
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struct mlx4_mtt mtt;
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struct mutex mutex;
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};
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struct mlx4_ib_ah {
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struct ib_ah ibah;
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struct mlx4_av av;
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};
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struct mlx4_ib_dev {
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struct ib_device ib_dev;
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struct mlx4_dev *dev;
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2008-10-22 16:38:42 -06:00
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int num_ports;
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2007-05-08 19:00:38 -06:00
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void __iomem *uar_map;
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struct mlx4_uar priv_uar;
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u32 priv_pdn;
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MLX4_DECLARE_DOORBELL_LOCK(uar_lock);
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struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2];
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struct ib_ah *sm_ah[MLX4_MAX_PORTS];
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spinlock_t sm_lock;
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struct mutex cap_mask_mutex;
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};
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static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev)
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{
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return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
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}
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static inline struct mlx4_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
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{
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return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
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}
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static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd)
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{
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return container_of(ibpd, struct mlx4_ib_pd, ibpd);
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}
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static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq)
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{
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return container_of(ibcq, struct mlx4_ib_cq, ibcq);
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}
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static inline struct mlx4_ib_cq *to_mibcq(struct mlx4_cq *mcq)
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{
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return container_of(mcq, struct mlx4_ib_cq, mcq);
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}
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static inline struct mlx4_ib_mr *to_mmr(struct ib_mr *ibmr)
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{
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return container_of(ibmr, struct mlx4_ib_mr, ibmr);
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}
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2008-07-23 09:12:26 -06:00
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static inline struct mlx4_ib_fast_reg_page_list *to_mfrpl(struct ib_fast_reg_page_list *ibfrpl)
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{
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return container_of(ibfrpl, struct mlx4_ib_fast_reg_page_list, ibfrpl);
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}
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2007-08-01 03:29:05 -06:00
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static inline struct mlx4_ib_fmr *to_mfmr(struct ib_fmr *ibfmr)
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{
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return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
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}
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2007-05-08 19:00:38 -06:00
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static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp)
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{
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return container_of(ibqp, struct mlx4_ib_qp, ibqp);
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}
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static inline struct mlx4_ib_qp *to_mibqp(struct mlx4_qp *mqp)
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{
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return container_of(mqp, struct mlx4_ib_qp, mqp);
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}
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static inline struct mlx4_ib_srq *to_msrq(struct ib_srq *ibsrq)
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{
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return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
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}
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static inline struct mlx4_ib_srq *to_mibsrq(struct mlx4_srq *msrq)
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{
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return container_of(msrq, struct mlx4_ib_srq, msrq);
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}
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static inline struct mlx4_ib_ah *to_mah(struct ib_ah *ibah)
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{
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return container_of(ibah, struct mlx4_ib_ah, ibah);
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}
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int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
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2008-04-23 12:55:45 -06:00
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struct mlx4_db *db);
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void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext *context, struct mlx4_db *db);
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2007-05-08 19:00:38 -06:00
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struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc);
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int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
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struct ib_umem *umem);
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struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
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u64 virt_addr, int access_flags,
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struct ib_udata *udata);
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int mlx4_ib_dereg_mr(struct ib_mr *mr);
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2008-07-23 09:12:26 -06:00
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struct ib_mr *mlx4_ib_alloc_fast_reg_mr(struct ib_pd *pd,
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int max_page_list_len);
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struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
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int page_list_len);
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void mlx4_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);
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2007-05-08 19:00:38 -06:00
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2008-04-16 22:09:33 -06:00
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int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
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2008-04-16 22:09:33 -06:00
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int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata);
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2007-05-08 19:00:38 -06:00
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struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev, int entries, int vector,
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struct ib_ucontext *context,
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struct ib_udata *udata);
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int mlx4_ib_destroy_cq(struct ib_cq *cq);
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int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
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int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
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void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
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void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
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struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
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int mlx4_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr);
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int mlx4_ib_destroy_ah(struct ib_ah *ah);
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struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
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struct ib_srq_init_attr *init_attr,
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struct ib_udata *udata);
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int mlx4_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
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enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
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2007-06-21 04:03:11 -06:00
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int mlx4_ib_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
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2007-05-08 19:00:38 -06:00
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int mlx4_ib_destroy_srq(struct ib_srq *srq);
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void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
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int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
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struct ib_recv_wr **bad_wr);
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struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd,
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struct ib_qp_init_attr *init_attr,
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struct ib_udata *udata);
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int mlx4_ib_destroy_qp(struct ib_qp *qp);
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int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
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int attr_mask, struct ib_udata *udata);
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2007-06-21 03:27:47 -06:00
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int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
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struct ib_qp_init_attr *qp_init_attr);
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2007-05-08 19:00:38 -06:00
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int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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struct ib_send_wr **bad_wr);
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int mlx4_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
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struct ib_recv_wr **bad_wr);
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int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int ignore_mkey, int ignore_bkey,
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int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
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void *in_mad, void *response_mad);
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int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
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struct ib_wc *in_wc, struct ib_grh *in_grh,
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struct ib_mad *in_mad, struct ib_mad *out_mad);
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int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
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void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);
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2007-08-01 03:29:05 -06:00
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struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int mr_access_flags,
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struct ib_fmr_attr *fmr_attr);
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int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, int npages,
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u64 iova);
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int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
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int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
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2007-05-08 19:00:38 -06:00
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static inline int mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
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{
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return !!(ah->av.g_slid & 0x80);
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}
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#endif /* MLX4_IB_H */
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